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authornickysn <nickysn@3ad0048d-3df7-0310-abae-a5850022a9f2>2020-04-26 16:38:29 +0000
committernickysn <nickysn@3ad0048d-3df7-0310-abae-a5850022a9f2>2020-04-26 16:38:29 +0000
commitde0ef5519fcd88d384c20fc00942df9d052748b5 (patch)
tree8d0d88df7f4a5c5e2e003650db632021d3c77e62
parent9c6d5bd346ffffffa3c7f169ac96456564855e98 (diff)
downloadfpc-de0ef5519fcd88d384c20fc00942df9d052748b5.tar.gz
- removed tcgz80.maybegetcpuregister, because it isn't used
git-svn-id: https://svn.freepascal.org/svn/fpc/branches/z80@45106 3ad0048d-3df7-0310-abae-a5850022a9f2
-rw-r--r--compiler/z80/cgcpu.pas9
1 files changed, 0 insertions, 9 deletions
diff --git a/compiler/z80/cgcpu.pas b/compiler/z80/cgcpu.pas
index b76870483e..d75f50a2b4 100644
--- a/compiler/z80/cgcpu.pas
+++ b/compiler/z80/cgcpu.pas
@@ -120,7 +120,6 @@ unit cgcpu;
procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
procedure gen_multiply(list: TAsmList; op: topcg; size: TCgSize; src2, src1, dst: tregister; check_overflow: boolean);
- procedure maybegetcpuregister(list : tasmlist; reg : tregister);
end;
tcg64fz80 = class(tcg64f32)
@@ -1391,14 +1390,6 @@ unit cgcpu;
end;
- procedure tcgz80.maybegetcpuregister(list:tasmlist;reg : tregister);
- begin
- { allocate the register only, if a cpu register is passed }
- if getsupreg(reg)<first_int_imreg then
- getcpuregister(list,reg);
- end;
-
-
function tcgz80.normalize_ref(list: TAsmList; ref: treference;
const refopertypes: trefoperandtypes; out allocatedregs: tregisterlist): treference;
var