+ unit handling rewrite branch created

git-svn-id: http://svn.freepascal.org/svn/fpc/branches/unitrw@133 3ad0048d-3df7-0310-abae-a5850022a9f2

1 files changed, 140 insertions, 0 deletions

diff --git a/compiler/sparc/rspcon.inc b/compiler/sparc/rspcon.inc
new file mode 100644
index 0000000000..5a84a0ba4e
--- /dev/null
+++ b/compiler/sparc/rspcon.inc
@@ -0,0 +1,140 @@
+{ don't edit, this file is generated from spreg.dat }
+NR_NO = tregister($00000000);
+NR_G0 = tregister($01040000);
+NR_G1 = tregister($01040001);
+NR_G2 = tregister($01040002);
+NR_G3 = tregister($01040003);
+NR_G4 = tregister($01040004);
+NR_G5 = tregister($01040005);
+NR_G6 = tregister($01040006);
+NR_G7 = tregister($01040007);
+NR_O0 = tregister($01040008);
+NR_O1 = tregister($01040009);
+NR_O2 = tregister($0104000a);
+NR_O3 = tregister($0104000b);
+NR_O4 = tregister($0104000c);
+NR_O5 = tregister($0104000d);
+NR_O6 = tregister($0104000e);
+NR_O7 = tregister($0104000f);
+NR_L0 = tregister($01040010);
+NR_L1 = tregister($01040011);
+NR_L2 = tregister($01040012);
+NR_L3 = tregister($01040013);
+NR_L4 = tregister($01040014);
+NR_L5 = tregister($01040015);
+NR_L6 = tregister($01040016);
+NR_L7 = tregister($01040017);
+NR_I0 = tregister($01040018);
+NR_I1 = tregister($01040019);
+NR_I2 = tregister($0104001a);
+NR_I3 = tregister($0104001b);
+NR_I4 = tregister($0104001c);
+NR_I5 = tregister($0104001d);
+NR_I6 = tregister($0104001e);
+NR_I7 = tregister($0104001f);
+NR_FP = tregister($0104001e);
+NR_SP = tregister($0104000e);
+NR_F0 = tregister($02060000);
+NR_F1 = tregister($02060001);
+NR_F2 = tregister($02060002);
+NR_F3 = tregister($02060003);
+NR_F4 = tregister($02060004);
+NR_F5 = tregister($02060005);
+NR_F6 = tregister($02060006);
+NR_F7 = tregister($02060007);
+NR_F8 = tregister($02060008);
+NR_F9 = tregister($02060009);
+NR_F10 = tregister($0206000a);
+NR_F11 = tregister($0206000b);
+NR_F12 = tregister($0206000c);
+NR_F13 = tregister($0206000d);
+NR_F14 = tregister($0206000e);
+NR_F15 = tregister($0206000f);
+NR_F16 = tregister($02060010);
+NR_F17 = tregister($02060011);
+NR_F18 = tregister($02060012);
+NR_F19 = tregister($02060013);
+NR_F20 = tregister($02060014);
+NR_F21 = tregister($02060015);
+NR_F22 = tregister($02060016);
+NR_F23 = tregister($02060017);
+NR_F24 = tregister($02060018);
+NR_F25 = tregister($02060019);
+NR_F26 = tregister($0206001a);
+NR_F27 = tregister($0206001b);
+NR_F28 = tregister($0206001c);
+NR_F29 = tregister($0206001d);
+NR_F30 = tregister($0206001e);
+NR_F31 = tregister($0206001f);
+NR_C0 = tregister($03000000);
+NR_C1 = tregister($03000001);
+NR_C2 = tregister($03000002);
+NR_C3 = tregister($03000003);
+NR_C4 = tregister($03000004);
+NR_C5 = tregister($03000005);
+NR_C6 = tregister($03000006);
+NR_C7 = tregister($03000007);
+NR_C8 = tregister($03000008);
+NR_C9 = tregister($03000009);
+NR_C10 = tregister($0300000a);
+NR_C11 = tregister($0300000b);
+NR_C12 = tregister($0300000c);
+NR_C13 = tregister($0300000d);
+NR_C14 = tregister($0300000e);
+NR_C15 = tregister($0300000f);
+NR_C16 = tregister($03000010);
+NR_C17 = tregister($03000011);
+NR_C18 = tregister($03000012);
+NR_C19 = tregister($03000013);
+NR_C20 = tregister($03000014);
+NR_C21 = tregister($03000015);
+NR_C22 = tregister($03000016);
+NR_C23 = tregister($03000017);
+NR_C24 = tregister($03000018);
+NR_C25 = tregister($03000019);
+NR_C26 = tregister($0300001a);
+NR_C27 = tregister($0300001b);
+NR_C28 = tregister($0300001c);
+NR_C29 = tregister($0300001d);
+NR_C30 = tregister($0300001e);
+NR_C31 = tregister($0300001f);
+NR_FSR = tregister($05000000);
+NR_FQ = tregister($05000001);
+NR_CSR = tregister($05000002);
+NR_CQ = tregister($05000003);
+NR_PSR = tregister($05000004);
+NR_TBR = tregister($05000005);
+NR_WIM = tregister($05000006);
+NR_Y = tregister($05000007);
+NR_ASR0 = tregister($04000000);
+NR_ASR1 = tregister($04000001);
+NR_ASR2 = tregister($04000002);
+NR_ASR3 = tregister($04000003);
+NR_ASR4 = tregister($04000004);
+NR_ASR5 = tregister($04000005);
+NR_ASR6 = tregister($04000006);
+NR_ASR7 = tregister($04000007);
+NR_ASR8 = tregister($04000008);
+NR_ASR9 = tregister($04000009);
+NR_ASR10 = tregister($0400000a);
+NR_ASR11 = tregister($0400000b);
+NR_ASR12 = tregister($0400000c);
+NR_ASR13 = tregister($0400000d);
+NR_ASR14 = tregister($0400000e);
+NR_ASR15 = tregister($0400000f);
+NR_ASR16 = tregister($04000010);
+NR_ASR17 = tregister($04000011);
+NR_ASR18 = tregister($04000012);
+NR_ASR19 = tregister($04000013);
+NR_ASR20 = tregister($04000014);
+NR_ASR21 = tregister($04000015);
+NR_ASR22 = tregister($04000016);
+NR_ASR23 = tregister($04000017);
+NR_ASR24 = tregister($04000018);
+NR_ASR25 = tregister($04000019);
+NR_ASR26 = tregister($0400001a);
+NR_ASR27 = tregister($0400001b);
+NR_ASR28 = tregister($0400001c);
+NR_ASR29 = tregister($0400001d);
+NR_ASR30 = tregister($0400001e);
+NR_ASR31 = tregister($0400001f);