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author | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2018-08-19 15:26:00 +0000 |
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committer | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2018-08-19 15:26:00 +0000 |
commit | 7700a23409089e824dfa17f35313e21bc4a706ef (patch) | |
tree | 5b3daab74866a8a5130acc11df21f93d4d4ea1f8 /riscv_new/rtl/riscv64/riscv64.inc | |
parent | 790674f80c91c18ebbcd6946fdd1c8c58ce34cec (diff) | |
download | fpc-7700a23409089e824dfa17f35313e21bc4a706ef.tar.gz |
o fix several issues with floating point exceptions
+ mask underflow and precision on startup
+ check for floating point exceptions after inlined float routine helpers
- do not check for floating point exceptions after floating point moves
git-svn-id: https://svn.freepascal.org/svn/fpc/branches/laksen@39645 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'riscv_new/rtl/riscv64/riscv64.inc')
-rw-r--r-- | riscv_new/rtl/riscv64/riscv64.inc | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/riscv_new/rtl/riscv64/riscv64.inc b/riscv_new/rtl/riscv64/riscv64.inc index cac65a5b85..964c6babf6 100644 --- a/riscv_new/rtl/riscv64/riscv64.inc +++ b/riscv_new/rtl/riscv64/riscv64.inc @@ -15,10 +15,6 @@ **********************************************************************} -procedure fpc_cpuinit;{$ifdef SYSTEMINLINE}inline;{$endif} - begin - end; - {**************************************************************************** fpu exception related stuff ****************************************************************************} @@ -86,6 +82,11 @@ procedure fpc_throwfpuexception;[public,alias:'FPC_THROWFPUEXCEPTION']; end; +procedure fpc_cpuinit;{$ifdef SYSTEMINLINE}inline;{$endif} + begin + softfloat_exception_mask:=[exPrecision,exUnderflow]; + end; + {**************************************************************************** stack frame related stuff ****************************************************************************} |