diff options
Diffstat (limited to 'avx512-0037785/compiler/x86/aasmcpu.pas')
| -rw-r--r-- | avx512-0037785/compiler/x86/aasmcpu.pas | 46 |
1 files changed, 33 insertions, 13 deletions
diff --git a/avx512-0037785/compiler/x86/aasmcpu.pas b/avx512-0037785/compiler/x86/aasmcpu.pas index dd53ebbf8a..fb2384c25f 100644 --- a/avx512-0037785/compiler/x86/aasmcpu.pas +++ b/avx512-0037785/compiler/x86/aasmcpu.pas @@ -968,7 +968,7 @@ implementation while (localsize>0) do begin {$ifndef i8086} - if CPUX86_HAS_CMOV in cpu_capabilities[current_settings.cputype] then + if (CPUX86_HAS_CMOV in cpu_capabilities[current_settings.cputype]) then begin for j:=low(alignarray_cmovcpus) to high(alignarray_cmovcpus) do if (localsize>=length(alignarray_cmovcpus[j])) then @@ -2140,7 +2140,7 @@ implementation case aIsEVEXW1 of false: if aIsVector512 then tuplesize := 32; else - Internalerror(2019081003); + Internalerror(2019081013); end; end else if IF_THVM in aInsEntry^.Flags then @@ -2818,7 +2818,7 @@ implementation if ((input.ref^.index<>NR_NO) and (getregtype(input.ref^.index)=R_MMREGISTER) and (input.ref^.base<>NR_NO) and (getregtype(input.ref^.base)<>R_INTREGISTER)) or // vector memory (AVX2) ((input.ref^.index<>NR_NO) and (getregtype(input.ref^.index)<>R_INTREGISTER) and (getregtype(input.ref^.index)<>R_MMREGISTER)) or ((input.ref^.base<>NR_NO) and (getregtype(input.ref^.base)<>R_INTREGISTER)) then - internalerror(200301081); + internalerror(2003010802); ir:=input.ref^.index; @@ -2992,7 +2992,7 @@ implementation result:=false; if ((input.ref^.index<>NR_NO) and (getregtype(input.ref^.index)<>R_INTREGISTER)) or ((input.ref^.base<>NR_NO) and (getregtype(input.ref^.base)<>R_INTREGISTER)) then - internalerror(200301081); + internalerror(2003010803); ir:=input.ref^.index; @@ -3859,7 +3859,7 @@ implementation end; end; else - Internalerror(2019081004); + Internalerror(2019081014); end; @@ -4320,7 +4320,7 @@ implementation else objdata_writereloc(currval-insend,2,nil,currabsreloc) {$else i8086} - InternalError(777006); + InternalError(2020100821); {$endif i8086} end; &64,&65,&66 : // 064..066 - select between 16/32 address mode, but we support only 32 (only 16 on i8086) @@ -4477,7 +4477,7 @@ implementation else InternalError(2015041503); {$else i8086} - InternalError(777006); + InternalError(2020100822); {$endif i8086} end; else @@ -4772,6 +4772,16 @@ implementation R_SUBQ, R_SUBMMWHOLE: result:=taicpu.op_ref_reg(A_VMOVQ,S_NO,tmpref,r); + R_SUBMMY: + if ref.alignment>=32 then + result:=taicpu.op_ref_reg(A_VMOVDQA,S_NO,tmpref,r) + else + result:=taicpu.op_ref_reg(A_VMOVDQU,S_NO,tmpref,r); + R_SUBMMZ: + if ref.alignment>=64 then + result:=taicpu.op_ref_reg(A_VMOVDQA64,S_NO,tmpref,r) + else + result:=taicpu.op_ref_reg(A_VMOVDQU64,S_NO,tmpref,r); R_SUBMMX: result:=taicpu.op_ref_reg(A_VMOVDQU,S_NO,tmpref,r); else @@ -4789,10 +4799,10 @@ implementation R_SUBMMX: result:=taicpu.op_ref_reg(A_MOVDQA,S_NO,tmpref,r); else - internalerror(200506043); + internalerror(2005060405); end; else - internalerror(200401041); + internalerror(2004010411); end; end; @@ -4831,6 +4841,16 @@ implementation result:=taicpu.op_reg_ref(A_VMOVSD,S_NO,r,tmpref); R_SUBMMS: result:=taicpu.op_reg_ref(A_VMOVSS,S_NO,r,tmpref); + R_SUBMMY: + if ref.alignment>=32 then + result:=taicpu.op_reg_ref(A_VMOVDQA,S_NO,r,tmpref) + else + result:=taicpu.op_reg_ref(A_VMOVDQU,S_NO,r,tmpref); + R_SUBMMZ: + if ref.alignment>=64 then + result:=taicpu.op_reg_ref(A_VMOVDQA64,S_NO,r,tmpref) + else + result:=taicpu.op_reg_ref(A_VMOVDQU64,S_NO,r,tmpref); R_SUBQ, R_SUBMMWHOLE: result:=taicpu.op_reg_ref(A_VMOVQ,S_NO,r,tmpref); @@ -4847,10 +4867,10 @@ implementation R_SUBMMWHOLE: result:=taicpu.op_reg_ref(A_MOVQ,S_NO,r,tmpref); else - internalerror(200506042); + internalerror(2005060404); end; else - internalerror(200401041); + internalerror(2004010412); end; end; @@ -5162,7 +5182,7 @@ implementation msiYMem64: RegYMMSizeMask := RegYMMSizeMask or OT_BITS256; msiZMem32, msiZMem64: RegYMMSizeMask := RegYMMSizeMask or OT_BITS512; - else InternalError(777211); + else InternalError(2020100823); end; OT_ZMMREG: case MRefInfo of msiXMem32, @@ -5171,7 +5191,7 @@ implementation msiYMem64: RegZMMSizeMask := RegZMMSizeMask or OT_BITS256; msiZMem32, msiZMem64: RegZMMSizeMask := RegZMMSizeMask or OT_BITS512; - else InternalError(777211); + else InternalError(2020100824); end; //else InternalError(777209); |