diff options
Diffstat (limited to 'avx512-0037785/compiler/xtensa')
| -rw-r--r-- | avx512-0037785/compiler/xtensa/aasmcpu.pas | 2 | ||||
| -rw-r--r-- | avx512-0037785/compiler/xtensa/agcpugas.pas | 30 | ||||
| -rw-r--r-- | avx512-0037785/compiler/xtensa/cgcpu.pas | 66 | ||||
| -rw-r--r-- | avx512-0037785/compiler/xtensa/cpuinfo.pas | 5 | ||||
| -rw-r--r-- | avx512-0037785/compiler/xtensa/cpupara.pas | 4 | ||||
| -rw-r--r-- | avx512-0037785/compiler/xtensa/ncpuadd.pas | 10 | ||||
| -rw-r--r-- | avx512-0037785/compiler/xtensa/ncpuinl.pas | 146 | ||||
| -rw-r--r-- | avx512-0037785/compiler/xtensa/ncpumat.pas | 4 | ||||
| -rw-r--r-- | avx512-0037785/compiler/xtensa/ncpumem.pas | 4 | ||||
| -rw-r--r-- | avx512-0037785/compiler/xtensa/racpugas.pas | 2 |
10 files changed, 234 insertions, 39 deletions
diff --git a/avx512-0037785/compiler/xtensa/aasmcpu.pas b/avx512-0037785/compiler/xtensa/aasmcpu.pas index eef3de8de7..f163a61c14 100644 --- a/avx512-0037785/compiler/xtensa/aasmcpu.pas +++ b/avx512-0037785/compiler/xtensa/aasmcpu.pas @@ -492,7 +492,7 @@ uses cutils, cclasses; R_FPUREGISTER: result:=taicpu.op_reg_ref(A_SSI,r,ref); else - internalerror(2020030701); + internalerror(2020030702); end; end; diff --git a/avx512-0037785/compiler/xtensa/agcpugas.pas b/avx512-0037785/compiler/xtensa/agcpugas.pas index f6cc381962..24e0168372 100644 --- a/avx512-0037785/compiler/xtensa/agcpugas.pas +++ b/avx512-0037785/compiler/xtensa/agcpugas.pas @@ -78,30 +78,32 @@ unit agcpugas; begin with ref do begin -{$ifdef extdebug} - // if base=NR_NO then - // internalerror(200308292); - - // if ((index<>NR_NO) or (shiftmode<>SM_None)) and ((offset<>0) or (symbol<>nil)) then - // internalerror(200308293); -{$endif extdebug} - if assigned(symbol) then begin s:=symbol.name; if offset<>0 then s:=s+tostr_with_plus(offset); - if refaddr=addr_pic then - s:=s+'(PLT)' - {else if refaddr=addr_tlscall then - s:=s+'(tlscall)'}; + case refaddr of + addr_pic: + s:=s+'(PLT)'; + addr_full, + addr_no: + ; + else + Internalerror(2020112403); + end; end else begin s:=gas_regname(base); if index<>NR_NO then - Internalerror(2020030802); - s:=s+','+tostr(offset); + begin + s:=s+','+gas_regname(index); + if offset<>0 then + Internalerror(2020112402); + end + else + s:=s+','+tostr(offset); end; end; getreferencestring:=s; diff --git a/avx512-0037785/compiler/xtensa/cgcpu.pas b/avx512-0037785/compiler/xtensa/cgcpu.pas index 7c1828ee17..d0e66c52b1 100644 --- a/avx512-0037785/compiler/xtensa/cgcpu.pas +++ b/avx512-0037785/compiler/xtensa/cgcpu.pas @@ -283,7 +283,7 @@ implementation OS_32, OS_S32: op:=A_L32I; else - internalerror(2020030801); + internalerror(2020030805); end; href:=ref; @@ -688,7 +688,16 @@ implementation if LocalSize<>0 then begin a_reg_alloc(list,NR_STACK_POINTER_REG); - list.concat(taicpu.op_reg_reg_const(A_ADDI,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,-localsize)); + { not sure if 32512 is the correct value or if it can be larger } + if Localsize>32512 then + begin + reference_reset(ref,4,[]); + ref.symbol:=create_data_entry(nil,-localsize); + list.concat(taicpu.op_reg_ref(A_L32R,NR_A8,ref)); + list.concat(taicpu.op_reg_reg_reg(A_ADD,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,NR_A8)); + end + else + list.concat(taicpu.op_reg_reg_const(A_ADDI,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,-localsize)); end; reference_reset(ref,4,[]); @@ -703,8 +712,15 @@ implementation ref.base:=NR_A8; end else - { fix me! } - Internalerror(2020031101); + begin + reference_reset(ref,4,[]); + ref.symbol:=create_data_entry(nil,localsize-registerarea); + list.concat(taicpu.op_reg_ref(A_L32R,NR_A8,ref)); + list.concat(taicpu.op_reg_reg_reg(A_ADD,NR_A8,NR_A8,NR_STACK_POINTER_REG)); + reference_reset(ref,4,[]); + ref.base:=NR_A8; + ref.offset:=registerarea; + end; end; if current_procinfo.framepointer<>NR_STACK_POINTER_REG then @@ -831,8 +847,15 @@ implementation ref.base:=NR_A8; end else - { fix me! } - Internalerror(2020031102); + begin + reference_reset(ref,4,[]); + ref.symbol:=create_data_entry(nil,ref.offset); + list.concat(taicpu.op_reg_ref(A_L32R,NR_A8,ref)); + list.concat(taicpu.op_reg_reg_reg(A_ADD,NR_A8,NR_A8,NR_STACK_POINTER_REG)); + reference_reset(ref,4,[]); + ref.base:=NR_A8; + ref.offset:=0; + end; end; // restore a15 if used @@ -855,7 +878,16 @@ implementation end; // restore stack pointer - list.concat(taicpu.op_reg_reg_const(A_ADDI,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,localsize)); + { not sure if 32512 is the correct value or if it can be larger } + if Localsize>32512 then + begin + reference_reset(ref,4,[]); + ref.symbol:=create_data_entry(nil,localsize); + list.concat(taicpu.op_reg_ref(A_L32R,NR_A8,ref)); + list.concat(taicpu.op_reg_reg_reg(A_ADD,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,NR_A8)); + end + else + list.concat(taicpu.op_reg_reg_const(A_ADDI,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,localsize)); a_reg_dealloc(list,NR_STACK_POINTER_REG); end; end; @@ -904,7 +936,7 @@ implementation OC_LT: op:=C_LTZ; OC_GTE: op:=C_GEZ; else - Internalerror(2020030801); + Internalerror(2020030806); end; instr:=taicpu.op_reg_sym(A_B,reg,l); instr.condition:=op; @@ -920,7 +952,7 @@ implementation OC_LT: op:=C_LTI; OC_GTE: op:=C_GEI; else - Internalerror(2020030801); + Internalerror(2020030807); end; instr:=taicpu.op_reg_const_sym(A_B,reg,a,l); @@ -935,7 +967,7 @@ implementation OC_B: op:=C_LTUI; OC_AE: op:=C_GEUI; else - Internalerror(2020030801); + Internalerror(2020030808); end; instr:=taicpu.op_reg_const_sym(A_B,reg,a,l); @@ -1179,11 +1211,14 @@ implementation InternalError(2020032602); href:=ref; if assigned(href.symbol) or - (href.index<>NR_NO) or + ((href.index<>NR_NO) and (href.offset<>0)) or (((href.offset<0) or (href.offset>1020) or (href.offset mod 4<>0))) then fixref(list,href); - list.concat(taicpu.op_reg_ref(A_LSI,reg,href)); + if (href.base<>NR_NO) and (href.index<>NR_NO) then + list.concat(taicpu.op_reg_ref(A_LSX,reg,href)) + else + list.concat(taicpu.op_reg_ref(A_LSI,reg,href)); if fromsize<>tosize then a_loadfpu_reg_reg(list,fromsize,tosize,reg,reg); @@ -1198,11 +1233,14 @@ implementation InternalError(2020032604); href:=ref; if assigned(href.symbol) or - (href.index<>NR_NO) or + ((href.index<>NR_NO) and (href.offset<>0)) or (((href.offset<0) or (href.offset>1020) or (href.offset mod 4<>0))) then fixref(list,href); - list.concat(taicpu.op_reg_ref(A_SSI,reg,href)); + if (href.base<>NR_NO) and (href.index<>NR_NO) then + list.concat(taicpu.op_reg_ref(A_SSX,reg,href)) + else + list.concat(taicpu.op_reg_ref(A_SSI,reg,href)); end; diff --git a/avx512-0037785/compiler/xtensa/cpuinfo.pas b/avx512-0037785/compiler/xtensa/cpuinfo.pas index a33337580b..22ea0e9b2c 100644 --- a/avx512-0037785/compiler/xtensa/cpuinfo.pas +++ b/avx512-0037785/compiler/xtensa/cpuinfo.pas @@ -141,7 +141,8 @@ Const CPUXTENSA_HAS_BOOLEAN_OPTION, CPUXTENSA_HAS_MUL32HIGH, CPUXTENSA_HAS_DIV, - CPUXTENSA_HAS_LOOPS + CPUXTENSA_HAS_LOOPS, + CPUXTENSA_HAS_MINMAX ); tfpuflags = @@ -155,7 +156,7 @@ Const ( { cpu_none } [], { cpu_lx106 } [], - { cpu_lx6 } [CPUXTENSA_REGWINDOW, CPUXTENSA_HAS_SEXT, CPUXTENSA_HAS_NSAx, CPUXTENSA_HAS_BOOLEAN_OPTION, CPUXTENSA_HAS_MUL32HIGH, CPUXTENSA_HAS_DIV, CPUXTENSA_HAS_LOOPS] + { cpu_lx6 } [CPUXTENSA_REGWINDOW, CPUXTENSA_HAS_SEXT, CPUXTENSA_HAS_NSAx, CPUXTENSA_HAS_BOOLEAN_OPTION, CPUXTENSA_HAS_MUL32HIGH, CPUXTENSA_HAS_DIV, CPUXTENSA_HAS_LOOPS, CPUXTENSA_HAS_MINMAX] ); fpu_capabilities : array[tfputype] of set of tfpuflags = diff --git a/avx512-0037785/compiler/xtensa/cpupara.pas b/avx512-0037785/compiler/xtensa/cpupara.pas index 5676738bc3..892e1898c0 100644 --- a/avx512-0037785/compiler/xtensa/cpupara.pas +++ b/avx512-0037785/compiler/xtensa/cpupara.pas @@ -221,7 +221,7 @@ unit cpupara; { only call8 used/supported so far } paraloc^.register:=newreg(R_INTREGISTER,RS_A11,cgsize2subreg(R_INTREGISTER,retcgsize)); else - Internalerror(2020032202); + Internalerror(2020032204); end else paraloc^.register:=NR_A3; @@ -290,7 +290,7 @@ unit cpupara; result:=create_paraloc_info_intern(p,side,p.paras,curintreg,cur_stack_offset,false); if result<cur_stack_offset then - Internalerror(2020083001); + Internalerror(2020083002); create_funcretloc_info(p,side); end; diff --git a/avx512-0037785/compiler/xtensa/ncpuadd.pas b/avx512-0037785/compiler/xtensa/ncpuadd.pas index 69daf0c942..f9177787df 100644 --- a/avx512-0037785/compiler/xtensa/ncpuadd.pas +++ b/avx512-0037785/compiler/xtensa/ncpuadd.pas @@ -47,6 +47,7 @@ interface procedure second_cmpfloat;override; procedure second_addfloat;override; procedure second_cmp; + function use_fma: boolean;override; end; implementation @@ -67,6 +68,13 @@ interface TCPUAddNode *****************************************************************************} + function TCPUAddNode.use_fma : boolean; + begin + Result:=is_single(left.resultdef) and is_single(right.resultdef) and + (FPUXTENSA_SINGLE in fpu_capabilities[current_settings.fputype]); + end; + + procedure TCPUAddNode.second_addordinal; var ophigh: tasmop; @@ -180,7 +188,7 @@ interface gtn: cond:=OC_A; gten: cond:=OC_AE; else - internalerror(2020030801); + internalerror(2020030803); end; if (right.nodetype=ordconstn) and not(nf_swapped in flags) then diff --git a/avx512-0037785/compiler/xtensa/ncpuinl.pas b/avx512-0037785/compiler/xtensa/ncpuinl.pas index 75b199502d..aa4e6bb615 100644 --- a/avx512-0037785/compiler/xtensa/ncpuinl.pas +++ b/avx512-0037785/compiler/xtensa/ncpuinl.pas @@ -33,6 +33,10 @@ unit ncpuinl; function first_abs_real: tnode; override; procedure second_abs_long; override; procedure second_abs_real; override; + function first_fma: tnode; override; + procedure second_fma; override; + function first_minmax: tnode; override; + procedure second_minmax; override; end; implementation @@ -48,6 +52,7 @@ unit ncpuinl; hlcgobj, pass_2, cgbase, cgobj, cgutils, + ncal, cpubase; procedure tcpuinlinenode.second_abs_long; @@ -84,6 +89,147 @@ unit ncpuinl; end; + function tcpuinlinenode.first_fma : tnode; + begin + if is_single(resultdef) then + begin + expectloc:=LOC_FPUREGISTER; + Result:=nil; + end + else + Result:=inherited first_fma; + end; + + + procedure tcpuinlinenode.second_fma; + const + op : array[false..true] of TAsmOp = + (A_MADD, + A_MSUB); + + var + paraarray : array[1..3] of tnode; + i : integer; + negproduct : boolean; + oppostfix : TOpPostfix; + ai: taicpu; + begin + if is_single(resultdef)and + (FPUXTENSA_SINGLE in fpu_capabilities[current_settings.fputype]) then + begin + negproduct:=false; + paraarray[1]:=tcallparanode(tcallparanode(tcallparanode(parameters).nextpara).nextpara).paravalue; + paraarray[2]:=tcallparanode(tcallparanode(parameters).nextpara).paravalue; + paraarray[3]:=tcallparanode(parameters).paravalue; + + { check if a neg. node can be removed + this is possible because changing the sign of + a floating point number does not affect its absolute + value in any way + } + if paraarray[1].nodetype=unaryminusn then + begin + paraarray[1]:=tunarynode(paraarray[1]).left; + { do not release the unused unary minus node, it is kept and release together with the other nodes, + only no code is generated for it } + negproduct:=not(negproduct); + end; + + if paraarray[2].nodetype=unaryminusn then + begin + paraarray[2]:=tunarynode(paraarray[2]).left; + { do not release the unused unary minus node, it is kept and release together with the other nodes, + only no code is generated for it } + negproduct:=not(negproduct); + end; + for i:=1 to 3 do + secondpass(paraarray[i]); + + { no memory operand is allowed } + for i:=1 to 3 do + begin + if not(paraarray[i].location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER]) then + hlcg.location_force_fpureg(current_asmdata.CurrAsmList,paraarray[i].location,paraarray[i].resultdef,true); + end; + + location_reset(location,LOC_FPUREGISTER,paraarray[1].location.size); + location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size); + + hlcg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,paraarray[3].resultdef,resultdef, + paraarray[3].location.register,location.register); + + ai:=taicpu.op_reg_reg_reg(op[negproduct], + location.register,paraarray[1].location.register,paraarray[2].location.register); + ai.oppostfix:=PF_S; + current_asmdata.CurrAsmList.concat(ai); + + cg.maybe_check_for_fpu_exception(current_asmdata.CurrAsmList); + end + else + internalerror(2020112401); + end; + + + function tcpuinlinenode.first_minmax : tnode; + begin + if is_32bitint(resultdef) then + begin + expectloc:=LOC_REGISTER; + Result:=nil; + end + else + Result:=inherited first_minmax; + end; + + + procedure tcpuinlineNode.second_minmax; + var + paraarray : array[1..2] of tnode; + i: Integer; + ai: taicpu; + op: TAsmOp; + begin + if is_32bitint(resultdef) then + begin + paraarray[1]:=tcallparanode(tcallparanode(parameters).nextpara).paravalue; + paraarray[2]:=tcallparanode(parameters).paravalue; + + for i:=low(paraarray) to high(paraarray) do + secondpass(paraarray[i]); + + { no memory operand is allowed } + for i:=low(paraarray) to high(paraarray) do + begin + if not(paraarray[i].location.loc in [LOC_REGISTER,LOC_CREGISTER]) then + hlcg.location_force_reg(current_asmdata.CurrAsmList,paraarray[i].location, + paraarray[i].resultdef,resultdef,true); + end; + + location_reset(location,LOC_REGISTER,paraarray[1].location.size); + location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size); + + case inlinenumber of + in_min_dword: + op:=A_MINU; + in_max_dword: + op:=A_MAXU; + in_min_longint: + op:=A_MIN; + in_max_longint: + op:=A_MAX; + else + Internalerror(2020120505); + end; + + current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op, + location.register,paraarray[1].location.register,paraarray[2].location.register)); + + cg.maybe_check_for_fpu_exception(current_asmdata.CurrAsmList); + end + else + internalerror(2020120502); + end; + begin cinlinenode:=tcpuinlinenode; diff --git a/avx512-0037785/compiler/xtensa/ncpumat.pas b/avx512-0037785/compiler/xtensa/ncpumat.pas index 46952b3b62..243856a223 100644 --- a/avx512-0037785/compiler/xtensa/ncpumat.pas +++ b/avx512-0037785/compiler/xtensa/ncpumat.pas @@ -241,7 +241,7 @@ implementation cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,location.register64.reglo); end; else - internalerror(2014033101); + internalerror(2014033102); end; end else @@ -319,7 +319,7 @@ implementation end else begin - internalerror(2020082209); + internalerror(2020082204); { load right operators in a register - this is done since most target cpu which will use this node do not support a shift count in a mem. location (cec) diff --git a/avx512-0037785/compiler/xtensa/ncpumem.pas b/avx512-0037785/compiler/xtensa/ncpumem.pas index 5ba9109f5a..9ce7fed4fb 100644 --- a/avx512-0037785/compiler/xtensa/ncpumem.pas +++ b/avx512-0037785/compiler/xtensa/ncpumem.pas @@ -73,10 +73,10 @@ implementation location.reference.index:=hreg; end else - Internalerror(2020042202); + Internalerror(2020042214); { update alignment } if (location.reference.alignment=0) then - internalerror(2020042203); + internalerror(2020042217); location.reference.alignment:=newalignment(location.reference.alignment,l); end else diff --git a/avx512-0037785/compiler/xtensa/racpugas.pas b/avx512-0037785/compiler/xtensa/racpugas.pas index be04bd703f..76bfe864bd 100644 --- a/avx512-0037785/compiler/xtensa/racpugas.pas +++ b/avx512-0037785/compiler/xtensa/racpugas.pas @@ -536,7 +536,7 @@ Unit racpugas; OPR_REFERENCE : inc(oper.opr.ref.offset,l); else - internalerror(200309202); + internalerror(2003092004); end; end end; |