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-rw-r--r--compiler/x86/agx86att.pas4
-rw-r--r--compiler/x86/aoptx86.pas3
-rw-r--r--compiler/x86/cpubase.pas2
-rw-r--r--compiler/x86/nx86inl.pas3
-rw-r--r--compiler/x86/rgx86.pas6
-rw-r--r--compiler/x86/x86ins.dat16
6 files changed, 20 insertions, 14 deletions
diff --git a/compiler/x86/agx86att.pas b/compiler/x86/agx86att.pas
index d9845c9c47..f91b44228b 100644
--- a/compiler/x86/agx86att.pas
+++ b/compiler/x86/agx86att.pas
@@ -514,7 +514,7 @@ interface
asmbin : 'clang';
asmcmd : '-x assembler -c -target $TRIPLET -o $OBJ $EXTRAOPT -x assembler $ASM';
supported_targets : [system_x86_64_darwin,system_x86_64_iphonesim];
- flags : [af_needar,af_smartlink_sections,af_supports_dwarf,af_no_stabs,af_llvm];
+ flags : [af_needar,af_smartlink_sections,af_supports_dwarf,af_no_stabs,af_llvm,af_supports_hlcfi];
labelprefix : 'L';
labelmaxlen : -1;
comment : '# ';
@@ -593,7 +593,7 @@ interface
asmbin : 'clang';
asmcmd : '-x assembler -c -target $TRIPLET -o $OBJ $EXTRAOPT -x assembler $ASM';
supported_targets : [system_i386_darwin,system_i386_iphonesim];
- flags : [af_needar,af_smartlink_sections,af_supports_dwarf,af_no_stabs,af_llvm];
+ flags : [af_needar,af_smartlink_sections,af_supports_dwarf,af_no_stabs,af_llvm,af_supports_hlcfi];
labelprefix : 'L';
labelmaxlen : -1;
comment : '# ';
diff --git a/compiler/x86/aoptx86.pas b/compiler/x86/aoptx86.pas
index 44e2363b91..a6141d8895 100644
--- a/compiler/x86/aoptx86.pas
+++ b/compiler/x86/aoptx86.pas
@@ -2380,6 +2380,7 @@ unit aoptx86;
mov mem, %reg"
}
+ AllocRegBetween(taicpu(hp1).oper[1]^.reg,p,hp1,usedregs);
taicpu(p).loadreg(1, taicpu(hp1).oper[1]^.reg);
DebugMsg(SPeepholeOptimization + 'MovMov2Mov 3 done',p);
RemoveInstruction(hp1);
@@ -6132,7 +6133,7 @@ unit aoptx86;
DebugMsg(SPeepholeOptimization+'JccMovJmpMov2MovSetcc',p);
{ remove last label }
RemoveInstruction(hp5);
- { remove second albel }
+ { remove second label }
RemoveInstruction(hp3);
{ if align is present remove it }
if GetNextInstruction(hp2,hp3) and (hp3.typ=ait_align) then
diff --git a/compiler/x86/cpubase.pas b/compiler/x86/cpubase.pas
index 7f56482e87..7f80c4ea50 100644
--- a/compiler/x86/cpubase.pas
+++ b/compiler/x86/cpubase.pas
@@ -473,6 +473,8 @@ implementation
cgsize2subreg:=R_SUBMMY;
OS_M512:
cgsize2subreg:=R_SUBMMZ;
+ OS_S128,
+ OS_128,
OS_NO:
{ error message should have been thrown already before, so avoid only
an internal error }
diff --git a/compiler/x86/nx86inl.pas b/compiler/x86/nx86inl.pas
index c26cbd5a32..09d351c853 100644
--- a/compiler/x86/nx86inl.pas
+++ b/compiler/x86/nx86inl.pas
@@ -1075,8 +1075,9 @@ implementation
((tcallparanode(tcallparanode(left).right).left.location.value-setbase) div bitsperop)*tcgsize2size[opsize]);
cg.a_op_const_ref(current_asmdata.CurrAsmList,cgop,opsize,l,tcallparanode(left).left.location.reference);
end;
+ LOC_CSUBSETREG,
LOC_CREGISTER :
- cg.a_op_const_reg(current_asmdata.CurrAsmList,cgop,tcallparanode(left).left.location.size,l,tcallparanode(left).left.location.register);
+ hlcg.a_op_const_loc(current_asmdata.CurrAsmList,cgop,tcallparanode(left).left.resultdef,l,tcallparanode(left).left.location);
else
internalerror(200405022);
end;
diff --git a/compiler/x86/rgx86.pas b/compiler/x86/rgx86.pas
index 27d34fbd5e..d099b272f6 100644
--- a/compiler/x86/rgx86.pas
+++ b/compiler/x86/rgx86.pas
@@ -407,8 +407,10 @@ implementation
{ 32 bit operations on 32 bit registers on x86_64 can result in
zeroing the upper 32 bits of the register. This does not happen
with memory operations, so we have to perform these calculations
- in registers. }
- if (opsize=S_L) then
+ in registers.
+
+ However, for instructions not modifying registers, this is not a problem }
+ if (opsize=S_L) and (opcode<>A_CMP) and (opcode<>A_TEST) and (opcode<>A_BT) then
replaceoper:=-1;
{$endif x86_64}
diff --git a/compiler/x86/x86ins.dat b/compiler/x86/x86ins.dat
index 4eb3b58b5d..e71830362b 100644
--- a/compiler/x86/x86ins.dat
+++ b/compiler/x86/x86ins.dat
@@ -1267,7 +1267,7 @@ mmxreg,mmxrm \2\x0F\xDB\110 PENT,MMX,SM
xmmreg,xmmrm \361\2\x0F\xDB\110 WILLAMETTE,SSE2,SM
[PANDN]
-(Ch_All)
+(Ch_Mop2, Ch_Rop1)
mmxreg,mmxrm \2\x0F\xDF\110 PENT,MMX,SM
xmmreg,xmmrm \361\2\x0F\xDF\110 WILLAMETTE,SSE2,SM
@@ -1475,16 +1475,16 @@ void \1\x9D X86_64
void \326\1\x9D X86_64
[POR]
-(Ch_All)
+(Ch_Mop2, Ch_Rop1)
mmxreg,mmxrm \2\x0F\xEB\110 PENT,MMX,SM
xmmreg,xmmrm \361\2\x0F\xEB\110 WILLAMETTE,SSE2,SM
[PREFETCH,prefetchX]
-(Ch_All)
+(Ch_Rop1)
mem \2\x0F\x0D\200 PENT,3DNOW,SM
[PREFETCHW,prefetchwX]
-(Ch_All)
+(Ch_Rop1)
mem \2\x0F\x0D\201 PENT,3DNOW,SM
[PSLLD]
@@ -2516,19 +2516,19 @@ mem \2\x0F\xAE\200 P6,SSE,FPU
;
[PREFETCHNTA]
-(Ch_All)
+(Ch_Rop1)
mem \2\x0F\x18\200 KATMAI
[PREFETCHT0]
-(Ch_All)
+(Ch_Rop1)
mem \2\x0F\x18\201 KATMAI
[PREFETCHT1]
-(Ch_All)
+(Ch_Rop1)
mem \2\x0F\x18\202 KATMAI
[PREFETCHT2]
-(Ch_All)
+(Ch_Rop1)
mem \2\x0F\x18\203 KATMAI
[SFENCE]