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-rw-r--r--riscv_new/compiler/cgobj.pas10
1 files changed, 10 insertions, 0 deletions
diff --git a/riscv_new/compiler/cgobj.pas b/riscv_new/compiler/cgobj.pas
index fe839b56b2..316253cef1 100644
--- a/riscv_new/compiler/cgobj.pas
+++ b/riscv_new/compiler/cgobj.pas
@@ -446,6 +446,10 @@ unit cgobj;
generic version is suitable for 3-address CPUs }
procedure g_div_const_reg_reg(list:tasmlist; size: TCgSize; a: tcgint; src,dst: tregister); virtual;
+ { some CPUs do not support hardware fpu exceptions, this procedure is called after instructions which
+ might set FPU exception related flags, so it has to check these flags if needed and throw an exeception }
+ procedure g_check_for_fpu_exception(list: TAsmList); virtual;
+
protected
function g_indirect_sym_load(list:TAsmList;const symname: string; const flags: tindsymflags): tregister;virtual;
end;
@@ -2876,6 +2880,12 @@ implementation
end;
+ procedure tcg.g_check_for_fpu_exception(list: TAsmList);
+ begin
+ { empty by default }
+ end;
+
+
{*****************************************************************************
TCG64
*****************************************************************************}