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* * avoid internalerror for dec/inc(...,v) with v>high(int64), resolves #35298florian2020-01-241-1/+3
* * first part of merging parts of Jeppe's intrinsics patch, mainly r31135florian2020-01-141-1/+0
* + inline high(<dyn. array>), resolves #28536florian2019-12-281-0/+39
* * first step towards supporting 32 bit targets with the LLVM code generator:jonas2019-01-291-32/+32
* + volatile() expression that marks an expression as volatilejonas2018-12-041-0/+7
* m68k: reinstate the inc/dec tempregister type hack again in an isolated way (...karoly2018-12-021-4/+11
* - reverted r39188, as this hack removes the type correctness of thejonas2018-11-281-2/+2
* ncginl: another approach to fix the same issue 39184 supposed to address. kee...karoly2018-06-071-1/+1
* ncginl: revert the previous commit, it seems to cause some issues on other CPUskaroly2018-06-071-1/+1
* ncginl: in inc/dec, do not use left.resultdef as the dest to force a register...karoly2018-06-071-1/+1
* * keep track of the temp position separately from the offset in references,jonas2018-04-221-3/+3
* + tinlinenode calls cpu specific routines for unknown inline numbersflorian2017-11-011-1/+7
* + enable support for a processor specific frac functionflorian2017-05-211-0/+8
* * use an enum instead of integer constants to represent inline numbersnickysn2017-05-101-1/+1
* * removed unused unitsflorian2017-05-091-7/+7
* + implemented inline code generation for 64-bit sar (the SarInt64 intrinsic) onnickysn2017-04-301-11/+45
* * use a native sized int register for the shift count in in_sar_assign_x_y,nickysn2017-04-201-1/+5
* * determine correctly whether operand size is 32 or 64 bits fornickysn2017-04-121-2/+2
* + implemented the sar/shl/shr/rol/ror inline modify-in-place nodes; the actualnickysn2017-04-121-7/+18
* * also support LOC_CREGISTER and LOC_CREFERENCE in in_not_assign_x and in_neg...nickysn2017-04-071-2/+2
* * fixed compiler internal error when the in_not_assign_x/in_neg_assign_x arenickysn2017-04-071-4/+20
* + implemented the in_neg_assign_x and in_not_assign_x inline nodes, which willnickysn2017-04-071-0/+27
* * initialize maskvalue to fix compilation with -O3+florian2017-04-011-0/+1
* * fixed compiler internal error in the in_[and/or/xor]_assign_x_y inline nodesnickysn2017-03-291-1/+1
* + added inline nodes for handling and/or/xor in place (i.e. x:=x op y, wherenickysn2017-03-261-0/+75
* + added volatility information to all memory referencesjonas2016-11-271-4/+6
* inline: implemented the second pass stub calls for inl_int_real nodeskaroly2016-11-271-0/+8
* * set the alignment resulting from an aligned() call to the actual naturaljonas2016-08-131-1/+1
* * implement sizeof/typeof completely at the node level, based onjonas2015-12-271-67/+2
* * converted register_maybe_adjust_setbase() to the high level code generatorjonas2015-12-051-1/+1
* * synchronized with privatetrunk till r30095jonas2015-03-051-8/+4
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| * * moved x86-specific requirements from the generic bsr/bsf code to thejonas2015-02-231-8/+4
| * * source can also be a LOC_CREGISTER for bsr/bsfjonas2015-02-231-4/+4
* | * fixed the resultdef of length() intrinsic: it's ossinttype rather thanjonas2014-08-121-14/+19
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* * fixed length(ansistring/widestring/dynarray) in i8086 far data memory modelsnickysn2014-04-271-3/+3
* + support for FMA intrinsic: if there is no hardware support, the compiler th...florian2014-04-131-0/+12
* * fixed tcginlinenode.second_SizeOfTypeOf for i8086 far data memory models bynickysn2014-03-281-16/+13
* * fixed inc/dec with constant truncating the high parts of the constant onnickysn2014-03-011-1/+6
* * 16/8-bit ALU fix for 64-bit pred/succ after r26580nickysn2014-01-261-2/+2
* * do not reuse registers in prec/succflorian2014-01-251-5/+12
* * fixes several issues which cause warnings by the dfa code when using it to ...florian2013-12-011-0/+9
* * specify AT_DATA in all references to the tobjectdef.vmt_mangledname symbol.nickysn2013-10-151-1/+1
* * Handle assigned(x) expressions entirely in first pass by converting them to...sergei2013-09-161-4/+1
* Inline Length(DynamicArray)masta2013-08-071-1/+6
* * sizeof(x), typeof(x): if "x" is typenode, request GOT for PIC because a glo...sergei2013-06-031-6/+1
* * renamed thlcgobj.tcgsize2orddef to defutil.cgsize_orddefjonas2013-06-011-1/+1
* + implemented Seg() for i8086 (small/tiny memory model)nickysn2013-03-301-0/+3
* + pseudo procedure aligned: tells the compiler to assume that the given param...florian2013-01-041-0/+7
* * first draft to support the popcnt instruction, works so far for x86 with a ...florian2012-09-021-1/+10
* * moved assert handling from second to first pass, so that the code generatorjonas2012-07-111-73/+1