| Commit message (Expand) | Author | Age | Files | Lines |
* | * avoid internalerror for dec/inc(...,v) with v>high(int64), resolves #35298 | florian | 2020-01-24 | 1 | -1/+3 |
* | * first part of merging parts of Jeppe's intrinsics patch, mainly r31135 | florian | 2020-01-14 | 1 | -1/+0 |
* | + inline high(<dyn. array>), resolves #28536 | florian | 2019-12-28 | 1 | -0/+39 |
* | * first step towards supporting 32 bit targets with the LLVM code generator: | jonas | 2019-01-29 | 1 | -32/+32 |
* | + volatile() expression that marks an expression as volatile | jonas | 2018-12-04 | 1 | -0/+7 |
* | m68k: reinstate the inc/dec tempregister type hack again in an isolated way (... | karoly | 2018-12-02 | 1 | -4/+11 |
* | - reverted r39188, as this hack removes the type correctness of the | jonas | 2018-11-28 | 1 | -2/+2 |
* | ncginl: another approach to fix the same issue 39184 supposed to address. kee... | karoly | 2018-06-07 | 1 | -1/+1 |
* | ncginl: revert the previous commit, it seems to cause some issues on other CPUs | karoly | 2018-06-07 | 1 | -1/+1 |
* | ncginl: in inc/dec, do not use left.resultdef as the dest to force a register... | karoly | 2018-06-07 | 1 | -1/+1 |
* | * keep track of the temp position separately from the offset in references, | jonas | 2018-04-22 | 1 | -3/+3 |
* | + tinlinenode calls cpu specific routines for unknown inline numbers | florian | 2017-11-01 | 1 | -1/+7 |
* | + enable support for a processor specific frac function | florian | 2017-05-21 | 1 | -0/+8 |
* | * use an enum instead of integer constants to represent inline numbers | nickysn | 2017-05-10 | 1 | -1/+1 |
* | * removed unused units | florian | 2017-05-09 | 1 | -7/+7 |
* | + implemented inline code generation for 64-bit sar (the SarInt64 intrinsic) on | nickysn | 2017-04-30 | 1 | -11/+45 |
* | * use a native sized int register for the shift count in in_sar_assign_x_y, | nickysn | 2017-04-20 | 1 | -1/+5 |
* | * determine correctly whether operand size is 32 or 64 bits for | nickysn | 2017-04-12 | 1 | -2/+2 |
* | + implemented the sar/shl/shr/rol/ror inline modify-in-place nodes; the actual | nickysn | 2017-04-12 | 1 | -7/+18 |
* | * also support LOC_CREGISTER and LOC_CREFERENCE in in_not_assign_x and in_neg... | nickysn | 2017-04-07 | 1 | -2/+2 |
* | * fixed compiler internal error when the in_not_assign_x/in_neg_assign_x are | nickysn | 2017-04-07 | 1 | -4/+20 |
* | + implemented the in_neg_assign_x and in_not_assign_x inline nodes, which will | nickysn | 2017-04-07 | 1 | -0/+27 |
* | * initialize maskvalue to fix compilation with -O3+ | florian | 2017-04-01 | 1 | -0/+1 |
* | * fixed compiler internal error in the in_[and/or/xor]_assign_x_y inline nodes | nickysn | 2017-03-29 | 1 | -1/+1 |
* | + added inline nodes for handling and/or/xor in place (i.e. x:=x op y, where | nickysn | 2017-03-26 | 1 | -0/+75 |
* | + added volatility information to all memory references | jonas | 2016-11-27 | 1 | -4/+6 |
* | inline: implemented the second pass stub calls for inl_int_real nodes | karoly | 2016-11-27 | 1 | -0/+8 |
* | * set the alignment resulting from an aligned() call to the actual natural | jonas | 2016-08-13 | 1 | -1/+1 |
* | * implement sizeof/typeof completely at the node level, based on | jonas | 2015-12-27 | 1 | -67/+2 |
* | * converted register_maybe_adjust_setbase() to the high level code generator | jonas | 2015-12-05 | 1 | -1/+1 |
* | * synchronized with privatetrunk till r30095 | jonas | 2015-03-05 | 1 | -8/+4 |
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| * | * moved x86-specific requirements from the generic bsr/bsf code to the | jonas | 2015-02-23 | 1 | -8/+4 |
| * | * source can also be a LOC_CREGISTER for bsr/bsf | jonas | 2015-02-23 | 1 | -4/+4 |
* | | * fixed the resultdef of length() intrinsic: it's ossinttype rather than | jonas | 2014-08-12 | 1 | -14/+19 |
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* | * fixed length(ansistring/widestring/dynarray) in i8086 far data memory models | nickysn | 2014-04-27 | 1 | -3/+3 |
* | + support for FMA intrinsic: if there is no hardware support, the compiler th... | florian | 2014-04-13 | 1 | -0/+12 |
* | * fixed tcginlinenode.second_SizeOfTypeOf for i8086 far data memory models by | nickysn | 2014-03-28 | 1 | -16/+13 |
* | * fixed inc/dec with constant truncating the high parts of the constant on | nickysn | 2014-03-01 | 1 | -1/+6 |
* | * 16/8-bit ALU fix for 64-bit pred/succ after r26580 | nickysn | 2014-01-26 | 1 | -2/+2 |
* | * do not reuse registers in prec/succ | florian | 2014-01-25 | 1 | -5/+12 |
* | * fixes several issues which cause warnings by the dfa code when using it to ... | florian | 2013-12-01 | 1 | -0/+9 |
* | * specify AT_DATA in all references to the tobjectdef.vmt_mangledname symbol. | nickysn | 2013-10-15 | 1 | -1/+1 |
* | * Handle assigned(x) expressions entirely in first pass by converting them to... | sergei | 2013-09-16 | 1 | -4/+1 |
* | Inline Length(DynamicArray) | masta | 2013-08-07 | 1 | -1/+6 |
* | * sizeof(x), typeof(x): if "x" is typenode, request GOT for PIC because a glo... | sergei | 2013-06-03 | 1 | -6/+1 |
* | * renamed thlcgobj.tcgsize2orddef to defutil.cgsize_orddef | jonas | 2013-06-01 | 1 | -1/+1 |
* | + implemented Seg() for i8086 (small/tiny memory model) | nickysn | 2013-03-30 | 1 | -0/+3 |
* | + pseudo procedure aligned: tells the compiler to assume that the given param... | florian | 2013-01-04 | 1 | -0/+7 |
* | * first draft to support the popcnt instruction, works so far for x86 with a ... | florian | 2012-09-02 | 1 | -1/+10 |
* | * moved assert handling from second to first pass, so that the code generator | jonas | 2012-07-11 | 1 | -73/+1 |