| Commit message (Expand) | Author | Age | Files | Lines |
* | movhlps/movlhps only take xmm registers. | laksen | 2020-03-06 | 1 | -0/+4 |
* | * Removed lot of unused local vars. It is useful to turn on the notes in opti... | yury | 2020-01-28 | 1 | -12/+0 |
* | + support for LLVM metadata constant string parameters | jonas | 2019-12-30 | 1 | -2/+2 |
* | * check in the internal assembler for references with incorrect use of RIP | florian | 2019-11-13 | 1 | -3/+3 |
* | Fix compilation error for i8086 cpu target | pierre | 2019-10-24 | 1 | -1/+1 |
* | -- Zusammenführen von r42725 bis r43306 in ».«: | florian | 2019-10-23 | 1 | -36/+96 |
* | + support tls threadvars with the internal assembler | florian | 2019-09-25 | 1 | -3/+19 |
* | + x86-64: implemented support for relocation needed by tls threadvars in the ... | florian | 2019-09-25 | 1 | -18/+34 |
* | -- Zusammenführen von r42706 bis r42724 in ».«: | florian | 2019-08-18 | 1 | -1/+1 |
* | * compilation on i386-linux fixed | florian | 2019-08-13 | 1 | -1/+1 |
* | -- Zusammenführen von r42652 bis r42673 in ».«: | florian | 2019-08-13 | 1 | -0/+6 |
* | * intel asm reader: try to read avx512 extensions only if the instruction s... | florian | 2019-08-12 | 1 | -5/+27 |
* | * compilation on i386 fixed | florian | 2019-08-11 | 1 | -5/+5 |
* | -- Zusammenführen der Unterschiede zwischen Projektarchiv-URLs in ».«: | florian | 2019-08-11 | 1 | -213/+1284 |
* | * fix case completeness and unreachable code warnings in compiler that would | jonas | 2019-05-12 | 1 | -0/+6 |
* | + patch by Marģers to support the x86 assembler instructions blsi, blsr, bls... | florian | 2019-01-20 | 1 | -0/+4 |
* | + support for tlsm_general on i386-linux | florian | 2018-11-11 | 1 | -1/+4 |
* | * Removed unused local vars. | yury | 2018-11-02 | 1 | -2/+1 |
* | - x86 align does not use a register anymore, code removed | florian | 2018-11-01 | 1 | -17/+0 |
* | * vcmppd hardcoded primitives like vcmpeqpd. | marco | 2018-03-03 | 1 | -2/+2 |
* | * FPC uses meanwhile more mov instructions, so extended taicpu.is_same_reg_mo... | florian | 2018-02-17 | 1 | -9/+18 |
* | + implementation of the vectorcall calling convention by J. Gareth Moreton | florian | 2018-02-11 | 1 | -9/+19 |
* | * make fpu/mmx/xmm/ymm registers numbers instead of flags to have enough spac... | florian | 2018-02-04 | 1 | -86/+91 |
* | * fixed the SEG inline asm directive when used with 32-bit registers on the i... | nickysn | 2017-11-22 | 1 | -1/+5 |
* | * fixed another i8086 inline asm 32-bit constant bug (e.g. in 'or eax, 800000... | nickysn | 2017-10-25 | 1 | -2/+4 |
* | * fix for inline asm of instructions with 32-bit constant operands on i8086 | nickysn | 2017-10-25 | 1 | -0/+8 |
* | + also optimize x86_64 references by switching [rbp+reg64] to [reg64+rbp], | nickysn | 2017-10-24 | 1 | -3/+8 |
* | + always do the x86_64 reference optimizations as if SS=DS, because the CPU | nickysn | 2017-10-24 | 1 | -0/+14 |
* | * strip segment overrides, for segments, which should be equal in the current | nickysn | 2017-10-23 | 1 | -2/+6 |
* | + added an optimization pass, that optimizes x86 references | nickysn | 2017-10-20 | 1 | -0/+43 |
* | + added x86 helper function get_default_segment_of_ref, which returns the | nickysn | 2017-10-18 | 1 | -0/+19 |
* | + added function get_ref_address_size | nickysn | 2017-10-16 | 1 | -0/+14 |
* | + added functions is_32_bit_ref and is_64_bit_ref, similar to is_16_bit_ref | nickysn | 2017-10-16 | 1 | -17/+31 |
* | * changed the parameter of is_16_bit_ref to be a treference, instead of toper | nickysn | 2017-10-16 | 1 | -7/+7 |
* | + another helper function: x86_parameterized_string_op_param_count | nickysn | 2017-10-12 | 1 | -0/+1 |
* | + added support for the parameterized versions of the x86 string instructions | nickysn | 2017-10-12 | 1 | -59/+63 |
* | + implemented support for instructions with non-native address size on i8086 | nickysn | 2017-10-06 | 1 | -35/+96 |
* | * different versions (behind cpu specific ifdefs) of process_ea_ref renamed | nickysn | 2017-10-05 | 1 | -4/+10 |
* | * replaced R_SUBADDR with the appropriate size (R_SUBW, R_SUBD or R_SUBQ) in | nickysn | 2017-10-05 | 1 | -8/+8 |
* | * converted the x86 instruction flags to a set, so they can be extended more | nickysn | 2017-09-21 | 1 | -128/+154 |
* | + Ch_*Op4 | florian | 2017-05-21 | 1 | -3/+22 |
* | * removed unused units | florian | 2017-05-09 | 1 | -4/+1 |
* | * proper register change info for the movs,cmps and scas x86 string instructions | nickysn | 2017-04-23 | 1 | -1/+1 |
* | + added x86 instruction flag Ch_RFLAGScc, indicating instructions that read | nickysn | 2017-04-22 | 1 | -0/+2 |
* | + added detailed information for individual flag bits use for most x86 | nickysn | 2017-04-21 | 1 | -2/+17 |
* | + added knowledge to the compiler for the x86 instructions, that don't read | nickysn | 2017-04-20 | 1 | -0/+3 |
* | * changed the x86 TInsProp.Ch structure from a 3-element array to a pascal set; | nickysn | 2017-04-19 | 1 | -30/+22 |
* | * fixes to the x86 instruction flags tracking attributes: | nickysn | 2017-04-19 | 1 | -1/+1 |
* | + added taicpu.op_reg_reg_ref() constructor for x86, in order to support the | nickysn | 2017-04-18 | 1 | -0/+12 |
* | + added volatility information to all memory references | jonas | 2016-11-27 | 1 | -1/+1 |