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path: root/compiler/x86/aasmcpu.pas
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* movhlps/movlhps only take xmm registers.laksen2020-03-061-0/+4
* * Removed lot of unused local vars. It is useful to turn on the notes in opti...yury2020-01-281-12/+0
* + support for LLVM metadata constant string parametersjonas2019-12-301-2/+2
* * check in the internal assembler for references with incorrect use of RIPflorian2019-11-131-3/+3
* Fix compilation error for i8086 cpu targetpierre2019-10-241-1/+1
* -- Zusammenführen von r42725 bis r43306 in ».«:florian2019-10-231-36/+96
* + support tls threadvars with the internal assemblerflorian2019-09-251-3/+19
* + x86-64: implemented support for relocation needed by tls threadvars in the ...florian2019-09-251-18/+34
* -- Zusammenführen von r42706 bis r42724 in ».«:florian2019-08-181-1/+1
* * compilation on i386-linux fixedflorian2019-08-131-1/+1
* -- Zusammenführen von r42652 bis r42673 in ».«:florian2019-08-131-0/+6
* * intel asm reader: try to read avx512 extensions only if the instruction s...florian2019-08-121-5/+27
* * compilation on i386 fixedflorian2019-08-111-5/+5
* -- Zusammenführen der Unterschiede zwischen Projektarchiv-URLs in ».«:florian2019-08-111-213/+1284
* * fix case completeness and unreachable code warnings in compiler that wouldjonas2019-05-121-0/+6
* + patch by Marģers to support the x86 assembler instructions blsi, blsr, bls...florian2019-01-201-0/+4
* + support for tlsm_general on i386-linuxflorian2018-11-111-1/+4
* * Removed unused local vars.yury2018-11-021-2/+1
* - x86 align does not use a register anymore, code removedflorian2018-11-011-17/+0
* * vcmppd hardcoded primitives like vcmpeqpd.marco2018-03-031-2/+2
* * FPC uses meanwhile more mov instructions, so extended taicpu.is_same_reg_mo...florian2018-02-171-9/+18
* + implementation of the vectorcall calling convention by J. Gareth Moretonflorian2018-02-111-9/+19
* * make fpu/mmx/xmm/ymm registers numbers instead of flags to have enough spac...florian2018-02-041-86/+91
* * fixed the SEG inline asm directive when used with 32-bit registers on the i...nickysn2017-11-221-1/+5
* * fixed another i8086 inline asm 32-bit constant bug (e.g. in 'or eax, 800000...nickysn2017-10-251-2/+4
* * fix for inline asm of instructions with 32-bit constant operands on i8086nickysn2017-10-251-0/+8
* + also optimize x86_64 references by switching [rbp+reg64] to [reg64+rbp],nickysn2017-10-241-3/+8
* + always do the x86_64 reference optimizations as if SS=DS, because the CPUnickysn2017-10-241-0/+14
* * strip segment overrides, for segments, which should be equal in the currentnickysn2017-10-231-2/+6
* + added an optimization pass, that optimizes x86 referencesnickysn2017-10-201-0/+43
* + added x86 helper function get_default_segment_of_ref, which returns thenickysn2017-10-181-0/+19
* + added function get_ref_address_sizenickysn2017-10-161-0/+14
* + added functions is_32_bit_ref and is_64_bit_ref, similar to is_16_bit_refnickysn2017-10-161-17/+31
* * changed the parameter of is_16_bit_ref to be a treference, instead of topernickysn2017-10-161-7/+7
* + another helper function: x86_parameterized_string_op_param_countnickysn2017-10-121-0/+1
* + added support for the parameterized versions of the x86 string instructionsnickysn2017-10-121-59/+63
* + implemented support for instructions with non-native address size on i8086nickysn2017-10-061-35/+96
* * different versions (behind cpu specific ifdefs) of process_ea_ref renamednickysn2017-10-051-4/+10
* * replaced R_SUBADDR with the appropriate size (R_SUBW, R_SUBD or R_SUBQ) innickysn2017-10-051-8/+8
* * converted the x86 instruction flags to a set, so they can be extended morenickysn2017-09-211-128/+154
* + Ch_*Op4florian2017-05-211-3/+22
* * removed unused unitsflorian2017-05-091-4/+1
* * proper register change info for the movs,cmps and scas x86 string instructionsnickysn2017-04-231-1/+1
* + added x86 instruction flag Ch_RFLAGScc, indicating instructions that readnickysn2017-04-221-0/+2
* + added detailed information for individual flag bits use for most x86nickysn2017-04-211-2/+17
* + added knowledge to the compiler for the x86 instructions, that don't readnickysn2017-04-201-0/+3
* * changed the x86 TInsProp.Ch structure from a 3-element array to a pascal set;nickysn2017-04-191-30/+22
* * fixes to the x86 instruction flags tracking attributes:nickysn2017-04-191-1/+1
* + added taicpu.op_reg_reg_ref() constructor for x86, in order to support thenickysn2017-04-181-0/+12
* + added volatility information to all memory referencesjonas2016-11-271-1/+1