; ; MIPS registers ; ; layout ; ,,,,, ; NO,$00,$00,$00,INVALID,INVALID,-1,-1 R0,$01,$04,$00,zero,$0,0,0 R1,$01,$04,$01,at,$1,1,1 R2,$01,$04,$02,v0,$2,2,2 R3,$01,$04,$03,v1,$3,3,3 R4,$01,$04,$04,a0,$4,4,4 R5,$01,$04,$05,a1,$5,5,5 R6,$01,$04,$06,a2,$6,6,6 R7,$01,$04,$07,a3,$7,7,7 R8,$01,$04,$08,t0,$8,8,8 R9,$01,$04,$09,t1,$9,9,9 R10,$01,$04,$0A,t2,$10,10,10 R11,$01,$04,$0B,t3,$11,11,11 R12,$01,$04,$0C,t4,$12,12,12 R13,$01,$04,$0D,t5,$13,13,13 R14,$01,$04,$0E,t6,$14,14,14 R15,$01,$04,$0F,t7,$15,15,15 R16,$01,$04,$10,s0,$16,16,16 R17,$01,$04,$11,s1,$17,17,17 R18,$01,$04,$12,s2,$18,18,18 R19,$01,$04,$13,s3,$19,19,19 R20,$01,$04,$14,s4,$20,20,20 R21,$01,$04,$15,s5,$21,21,21 R22,$01,$04,$16,s6,$22,22,22 R23,$01,$04,$17,s7,$23,23,23 R24,$01,$04,$18,t8,$24,24,24 R25,$01,$04,$19,t9,$25,25,25 R26,$01,$04,$1A,k0,$26,26,26 R27,$01,$04,$1B,k1,$27,27,27 R28,$01,$04,$1C,gp,$28,28,28 R29,$01,$04,$1D,sp,$29,29,29 R30,$01,$04,$1E,fp,$30,30,30 R31,$01,$04,$1F,ra,$31,31,31 ; Note: stabs fpu register start at 38, not 32 F0,$02,$06,$00,f0,$f0,38,32 F1,$02,$06,$01,f1,$f1,39,33 F2,$02,$06,$02,f2,$f2,40,34 F3,$02,$06,$03,f3,$f3,41,35 F4,$02,$06,$04,f4,$f4,42,36 F5,$02,$06,$05,f5,$f5,43,37 F6,$02,$06,$06,f6,$f6,44,38 F7,$02,$06,$07,f7,$f7,45,39 F8,$02,$06,$08,f8,$f8,46,40 F9,$02,$06,$09,f9,$f9,47,41 F10,$02,$06,$0A,f10,$f10,48,42 F11,$02,$06,$0B,f11,$f11,49,43 F12,$02,$06,$0C,f12,$f12,50,44 F13,$02,$06,$0D,f13,$f13,51,45 F14,$02,$06,$0E,f14,$f14,52,46 F15,$02,$06,$0F,f15,$f15,53,47 F16,$02,$06,$10,f16,$f16,54,48 F17,$02,$06,$11,f17,$f17,55,49 F18,$02,$06,$12,f18,$f18,56,50 F19,$02,$06,$13,f19,$f19,57,51 F20,$02,$06,$14,f20,$f20,58,52 F21,$02,$06,$15,f21,$f21,59,53 F22,$02,$06,$16,f22,$f22,60,54 F23,$02,$06,$17,f23,$f23,61,55 F24,$02,$06,$18,f24,$f24,62,56 F25,$02,$06,$19,f25,$f25,63,57 F26,$02,$06,$1A,f26,$f26,64,58 F27,$02,$06,$1B,f27,$f27,65,59 F28,$02,$06,$1C,f28,$f28,66,60 F29,$02,$06,$1D,f29,$f29,67,61 F30,$02,$06,$1E,f30,$f30,68,62 F31,$02,$06,$1F,f31,$f31,69,63 ; Range 0..31 of R_SPECIALREGISTER is used without symbolic names ; and actual register they refer to depends on instruction. ; mips4+ floating-point condition code registers (1-bit) FCC0,$05,$00,$20,fcc0,$fcc0,-1,-1 FCC1,$05,$00,$21,fcc1,$fcc1,-1,-1 FCC2,$05,$00,$22,fcc2,$fcc2,-1,-1 FCC3,$05,$00,$23,fcc3,$fcc3,-1,-1 FCC4,$05,$00,$24,fcc4,$fcc4,-1,-1 FCC5,$05,$00,$25,fcc5,$fcc5,-1,-1 FCC6,$05,$00,$26,fcc6,$fcc6,-1,-1 FCC7,$05,$00,$27,fcc7,$fcc7,-1,-1