1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
|
{
Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
Handles the common x86 assembler reader routines
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
****************************************************************************
}
{
Contains the common x86 (i386 and x86-64) assembler reader routines.
}
unit rax86;
{$i fpcdefs.inc}
interface
uses
aasmbase,aasmtai,aasmdata,aasmcpu,
cpubase,rautils,cclasses;
{ Parser helpers }
function is_prefix(t:tasmop):boolean;
function is_override(t:tasmop):boolean;
Function CheckPrefix(prefixop,op:tasmop): Boolean;
Function CheckOverride(overrideop,op:tasmop): Boolean;
Procedure FWaitWarning;
type
Tx86Operand=class(TOperand)
opsize : topsize;
vopext : smallint; // bitmask: vector-operand extention AVX512 (e.g. vaddps xmm0 {k1} {z})
vbcst : byte;
Procedure SetSize(_size:longint;force:boolean);override;
Procedure SetCorrectSize(opcode:tasmop);override;
Function CheckOperand: boolean; override;
{ handles the @Code symbol }
Procedure SetupCode;
{ handles the @Data symbol }
Procedure SetupData;
constructor create; override;
end;
{ Operands are always in AT&T order.
Intel reader attaches them right-to-left, then shifts to start with 1 }
{ Tx86Instruction }
Tx86Instruction=class(TInstruction)
opsize : topsize;
constructor Create(optype : tcoperand);override;
{ Operand sizes }
procedure AddReferenceSizes; virtual;
procedure SetInstructionOpsize;
procedure CheckOperandSizes;
procedure CheckNonCommutativeOpcodes;
{ Additional actions required by specific reader }
procedure FixupOpcode;virtual;
{ opcode adding }
function ConcatInstruction(p : TAsmList) : tai;override;
function getstring: string;
{ returns true, if the opcode might have an extension as used by AVX512 }
function MightHaveExtension : boolean;
end;
const
AsmPrefixes = 8{$ifdef i8086}+2{$endif i8086};
AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ,A_XACQUIRE,A_XRELEASE{$ifdef i8086},A_REPC,A_REPNC{$endif i8086}
);
AsmOverrides = 6;
AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
);
CondAsmOps=3;
CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
A_CMOVcc, A_Jcc, A_SETcc
);
CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
'CMOV','J','SET'
);
implementation
uses
globtype,globals,systems,verbose,
procinfo,
cgbase,cgutils,
itcpugas,cgx86, cutils;
{*****************************************************************************
Parser Helpers
*****************************************************************************}
function is_prefix(t:tasmop):boolean;
var
i : longint;
Begin
is_prefix:=false;
for i:=1 to AsmPrefixes do
if t=AsmPrefix[i-1] then
begin
is_prefix:=true;
exit;
end;
end;
function is_override(t:tasmop):boolean;
var
i : longint;
Begin
is_override:=false;
for i:=1 to AsmOverrides do
if t=AsmOverride[i-1] then
begin
is_override:=true;
exit;
end;
end;
Function CheckPrefix(prefixop,op:tasmop): Boolean;
{ Checks if the prefix is valid with the following opcode }
{ return false if not, otherwise true }
Begin
CheckPrefix := TRUE;
(* Case prefix of
A_REP,A_REPNE,A_REPE:
Case opcode Of
A_SCASB,A_SCASW,A_SCASD,
A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
Else
Begin
CheckPrefix := FALSE;
exit;
end;
end; { case }
A_LOCK:
Case opcode Of
A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
Else
Begin
CheckPrefix := FALSE;
Exit;
end;
end; { case }
A_NONE: exit; { no prefix here }
else
CheckPrefix := FALSE;
end; { end case } *)
end;
Function CheckOverride(overrideop,op:tasmop): Boolean;
{ Check if the override is valid, and if so then }
{ update the instr variable accordingly. }
Begin
CheckOverride := true;
{ Case instr.getinstruction of
A_MOVS,A_XLAT,A_CMPS:
Begin
CheckOverride := TRUE;
Message(assem_e_segment_override_not_supported);
end
end }
end;
Procedure FWaitWarning;
begin
if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in current_settings.moduleswitches) then
Message(asmr_w_fwait_emu_prob);
end;
{*****************************************************************************
TX86Operand
*****************************************************************************}
Procedure Tx86Operand.SetSize(_size:longint;force:boolean);
begin
inherited SetSize(_size,force);
{ OS_64 will be set to S_L and be fixed later
in SetCorrectSize }
// multimedia register
case _size of
16: size := OS_M128;
32: size := OS_M256;
64: size := OS_M512;
end;
{$ifdef i8086}
{ allows e.g. using 32-bit registers in i8086 inline asm }
if size in [OS_32,OS_S32] then
opsize:=S_L
else
{$endif i8086}
opsize:=TCGSize2Opsize[size];
end;
Procedure Tx86Operand.SetCorrectSize(opcode:tasmop);
begin
if gas_needsuffix[opcode]=attsufFPU then
begin
case size of
OS_32 : opsize:=S_FS;
OS_64 : opsize:=S_FL;
else
;
end;
end
else if gas_needsuffix[opcode]=attsufFPUint then
begin
case size of
OS_16 : opsize:=S_IS;
OS_32 : opsize:=S_IL;
OS_64 : opsize:=S_IQ;
else
;
end;
end
else if gas_needsuffix[opcode] in [AttSufMM, AttSufMMX] then
begin
if (opr.typ=OPR_Reference) then
begin
case size of
OS_32 : size := OS_M32;
OS_64 : size := OS_M64;
else
;
end;
end;
end
else
begin
if size=OS_64 then
opsize:=S_Q;
end;
end;
Function Tx86Operand.CheckOperand: boolean;
var
ErrorRefStr: string;
begin
result:=true;
if (opr.typ=OPR_Reference) then
begin
if not hasvar then
begin
if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset>0) then
begin
if current_settings.asmmode in asmmodes_x86_intel then
begin
case getsubreg(opr.ref.base) of
R_SUBW:
ErrorRefStr:='[BP+offset]';
R_SUBD:
ErrorRefStr:='[EBP+offset]';
R_SUBQ:
ErrorRefStr:='[RBP+offset]';
else
internalerror(2019061001);
end;
end
else
begin
case getsubreg(opr.ref.base) of
R_SUBW:
ErrorRefStr:='+offset(%bp)';
R_SUBD:
ErrorRefStr:='+offset(%ebp)';
R_SUBQ:
ErrorRefStr:='+offset(%rbp)';
else
internalerror(2019061002);
end;
end;
if current_procinfo.procdef.proccalloption=pocall_register then
message1(asmr_w_no_direct_ebp_for_parameter,ErrorRefStr)
else
message1(asmr_w_direct_ebp_for_parameter_regcall,ErrorRefStr);
end
else if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset<0) then
begin
if current_settings.asmmode in asmmodes_x86_intel then
begin
case getsubreg(opr.ref.base) of
R_SUBW:
ErrorRefStr:='[BP-offset]';
R_SUBD:
ErrorRefStr:='[EBP-offset]';
R_SUBQ:
ErrorRefStr:='[RBP-offset]';
else
internalerror(2019061003);
end;
end
else
begin
case getsubreg(opr.ref.base) of
R_SUBW:
ErrorRefStr:='-offset(%bp)';
R_SUBD:
ErrorRefStr:='-offset(%ebp)';
R_SUBQ:
ErrorRefStr:='-offset(%rbp)';
else
internalerror(2019061004);
end;
end;
message1(asmr_w_direct_ebp_neg_offset,ErrorRefStr);
end
else if (getsupreg(opr.ref.base)=RS_ESP) and (getsubreg(opr.ref.base)<>R_SUBW) and (opr.ref.offset<0) then
begin
if current_settings.asmmode in asmmodes_x86_intel then
begin
case getsubreg(opr.ref.base) of
R_SUBD:
ErrorRefStr:='[ESP-offset]';
R_SUBQ:
ErrorRefStr:='[RSP-offset]';
else
internalerror(2019061005);
end;
end
else
begin
case getsubreg(opr.ref.base) of
R_SUBD:
ErrorRefStr:='-offset(%esp)';
R_SUBQ:
ErrorRefStr:='-offset(%rsp)';
else
internalerror(2019061006);
end;
end;
message1(asmr_w_direct_esp_neg_offset,ErrorRefStr);
end;
end;
if (cs_create_pic in current_settings.moduleswitches) and
assigned(opr.ref.symbol) and
not assigned(opr.ref.relsymbol) then
begin
if not(opr.ref.refaddr in [addr_pic,addr_pic_no_got]) then
begin
if (opr.ref.symbol.name <> '_GLOBAL_OFFSET_TABLE_') then
begin
message(asmr_e_need_pic_ref);
result:=false;
end
else
opr.ref.refaddr:=addr_pic;
end
else
begin
{$ifdef x86_64}
{ should probably be extended to i386, but there the situation
is more complex and ELF-style PIC still need to be
tested/debugged }
if (opr.ref.symbol.bind in [AB_LOCAL,AB_PRIVATE_EXTERN]) and
(opr.ref.refaddr=addr_pic) then
message(asmr_w_useless_got_for_local)
else if (opr.ref.symbol.bind in [AB_GLOBAL,AB_EXTERNAL,AB_COMMON,AB_WEAK_EXTERNAL]) and
(opr.ref.refaddr=addr_pic_no_got) then
message(asmr_w_global_access_without_got);
{$endif x86_64}
end;
end;
end;
end;
procedure Tx86Operand.SetupCode;
begin
{$ifdef i8086}
opr.typ:=OPR_SYMBOL;
opr.symofs:=0;
opr.symbol:=current_asmdata.RefAsmSymbol(current_procinfo.procdef.mangledname,AT_FUNCTION);
opr.symseg:=true;
opr.sym_farproc_entry:=false;
{$else i8086}
Message(asmr_w_CODE_and_DATA_not_supported);
{$endif i8086}
end;
procedure Tx86Operand.SetupData;
begin
{$ifdef i8086}
InitRef;
if current_settings.x86memorymodel=mm_huge then
opr.ref.refaddr:=addr_fardataseg
else
opr.ref.refaddr:=addr_dgroup;
{$else i8086}
Message(asmr_w_CODE_and_DATA_not_supported);
{$endif i8086}
end;
constructor Tx86Operand.create;
begin
inherited;
vopext := 0;
vbcst := 0;
end;
{*****************************************************************************
T386Instruction
*****************************************************************************}
constructor Tx86Instruction.Create(optype : tcoperand);
begin
inherited Create(optype);
Opsize:=S_NO;
end;
procedure Tx86Instruction.AddReferenceSizes;
{ this will add the sizes for references like [esi] which do not
have the size set yet, it will take only the size if the other
operand is a register }
var
operand2,i,j,k : longint;
s : tasmsymbol;
so : aint;
ExistsMemRefNoSize: boolean;
ExistsMemRef: boolean;
ExistsConstNoSize: boolean;
ExistConst: boolean;
ExistsLocalSymSize: boolean;
ExistsBCST: boolean;
memrefsize: integer;
memopsize: integer;
memoffset: asizeint;
vbcst: byte;
mmregs: Set of TSubregister;
multiplicator: integer;
bcst1,bcst2: string;
begin
ExistsMemRefNoSize := false;
ExistsMemRef := false;
ExistsConstNoSize := false;
ExistsLocalSymSize := false;
ExistsBCST := false;
// EXIST A MEMORY- OR CONSTANT-OPERAND WITHOUT SIZE ?
for i := 1 to ops do
begin
if operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL] then
begin
ExistsMemRef := true;
ExistsBCST := (MemRefInfo(opcode).ExistsSSEAVX) and
(tx86operand(operands[i]).vbcst <> 0);
if (tx86operand(operands[i]).opsize = S_NO) then
begin
ExistsMemRefNoSize := true;
case operands[i].opr.Typ of
OPR_LOCAL: ExistsLocalSymSize := tx86operand(operands[i]).opr.localsym.getsize > 0;
OPR_REFERENCE: ExistsLocalSymSize := true;
else
;
end;
end;
end
else if operands[i].Opr.Typ in [OPR_CONSTANT] then
begin
ExistsConstNoSize := tx86operand(operands[i]).opsize = S_NO;
end;
end;
// ONLY SUPPORTED OPCODES WITH SSE- OR AVX-REGISTERS
if (ExistsMemRef) and
(MemRefInfo(opcode).ExistsSSEAVX) then
begin
// 1. WE HAVE AN SSE- OR AVX-OPCODE WITH MEMORY OPERAND
if (not(ExistsMemRefNoSize)) or
(ExistsLocalSymSize) then
begin
// 2. WE KNOWN THE MEMORYSIZE OF THE MEMORY-OPERAND OR WE CAN
// CALC THE MEMORYSIZE
// 3. CALC THE SIZE OF THE MEMORYOPERAND BY OPCODE-DEFINITION
// 4. COMPARE THE SIZE FROM OPCODE-DEFINITION AND THE REAL MEMORY-OPERAND-SIZE
// - validate memory-reference-size
for i := 1 to ops do
begin
if (operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL]) then
begin
memrefsize := -1;
if ExistsBCST then
begin
case MemRefInfo(opcode).MemRefSizeBCST of
msbBCST32: memrefsize := 32;
msbBCST64: memrefsize := 64;
else
Internalerror(2019081005);
end;
end
else
case MemRefInfo(opcode).MemRefSize of
msiMem8: memrefsize := 8;
msiMem16: memrefsize := 16;
msiMem32: memrefsize := 32;
msiMem64: memrefsize := 64;
msiMem128: memrefsize := 128;
msiMem256: memrefsize := 256;
msiMem512: memrefsize := 512;
msiMemRegx16y32:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: memrefsize := 16;
R_SUBMMY: memrefsize := 32;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx16y32z64:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: memrefsize := 16;
R_SUBMMY: memrefsize := 32;
R_SUBMMZ: memrefsize := 64;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx32y64:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: memrefsize := 32;
R_SUBMMY: memrefsize := 64;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx32y64z128:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: memrefsize := 32;
R_SUBMMY: memrefsize := 64;
R_SUBMMZ: memrefsize := 128;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx64y128:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: memrefsize := 64;
R_SUBMMY: memrefsize := 128;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx64y256:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: memrefsize := 64;
R_SUBMMY: memrefsize := 256;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx64y128z256:
begin
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: memrefsize := 64;
R_SUBMMY: memrefsize := 128;
R_SUBMMZ: memrefsize := 256;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
end;
msiMemRegx64y256z512:
begin
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: memrefsize := 64;
R_SUBMMY: memrefsize := 256;
R_SUBMMZ: memrefsize := 512;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
end;
msiMemRegSize:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
if (tx86operand(operands[j]).opsize <> S_NO) and
(tx86operand(operands[j]).size <> OS_NO) then
begin
case tx86operand(operands[j]).opsize of
S_B : memrefsize := 8;
S_W : memrefsize := 16;
S_L : memrefsize := 32;
S_Q : memrefsize := 64;
S_XMM : memrefsize := 128;
S_YMM : memrefsize := 256;
S_ZMM : memrefsize := 512;
else Internalerror(2019081001);
end;
break;
end;
end;
end;
end;
msiMemRegConst128,
msiMemRegConst256,
msiMemRegConst512:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_CONSTANT then
begin
for k := 1 to ops do
begin
if operands[k].Opr.Typ = OPR_REGISTER then
begin
if (tx86operand(operands[k]).opsize <> S_NO) and
(tx86operand(operands[k]).size <> OS_NO) then
begin
case tx86operand(operands[k]).opsize of
S_B : memrefsize := 8;
S_W : memrefsize := 16;
S_L : memrefsize := 32;
S_Q : memrefsize := 64;
S_XMM : memrefsize := 128;
S_YMM : memrefsize := 256;
S_ZMM : memrefsize := 512;
else Internalerror(777200);
end;
break;
end;
end;
end;
break;
end;
end;
// no exists const-operand
if memrefsize = -1 then
begin
case MemRefInfo(opcode).MemRefSize of
msiMemRegConst128: memrefsize := 128;
msiMemRegConst256: memrefsize := 256;
msiMemRegConst512: memrefsize := 512;
else Internalerror(2019081002);
end;
end;
end;
msiXMem32,
msiYMem32,
msiZMem32,
msiXMem64,
msiYMem64,
msiZMem64: ; // ignore; gather/scatter opcodes haven a fixed element-size, not a fixed memory-size
// the vector-register have indices with base of the memory-address in the memory-operand
msiMultipleMinSize8,
msiMultipleMinSize16,
msiMultipleMinSize32,
msiMultipleMinSize64,
msiMultipleMinSize128,
msiMultipleMinSize256,
msiMultipleMinSize512: ; // ignore
msiNoSize,
msiNoMemRef,
msiUnknown,
msiUnsupported,
msiVMemMultiple,
msiVMemRegSize,
msiMultiple:
;
else
Internalerror(2020111001);
end;
if memrefsize > -1 then
begin
// CALC REAL-MEMORY-OPERAND-SIZE AND A POSSIBLE OFFSET
// OFFSET:
// e.g. PAND XMM0, [RAX + 16] =>> OFFSET = 16 BYTES
// PAND XMM0, [RAX + a.b + 10] =>> OFFSET = 10 BYTES (a = record-variable)
memopsize := 0;
case operands[i].opr.typ of
OPR_LOCAL: memopsize := operands[i].opr.localvarsize * 8;
OPR_REFERENCE:
if operands[i].opr.ref.refaddr = addr_pic then
memopsize := sizeof(pint) * 8
else
memopsize := operands[i].opr.varsize * 8;
else
;
end;
//if memopsize = 0 then memopsize := topsize2memsize[tx86operand(operands[i]).opsize];
if memopsize = 0 then
begin
{$ifdef i386}
{ 64-bit operands are allowed for SSE and AVX instructions, so
go by the byte size instead for these families of opcodes }
if (MemRefInfo(opcode).ExistsSSEAVX) then
begin
memopsize := tx86operand(operands[i]).typesize * 8;
if tx86operand(operands[i]).typesize = 8 then
{ Will be S_L otherwise and won't be corrected in time }
tx86operand(operands[i]).opsize := S_Q;
end
else
{$endif i386}
memopsize := topsize2memsize[tx86operand(operands[i]).opsize];
end;
if (memopsize > 0) and
(memrefsize > 0) then
begin
memoffset := 0;
case operands[i].opr.typ of
OPR_LOCAL:
memoffset := operands[i].opr.localconstoffset;
OPR_REFERENCE:
memoffset := operands[i].opr.constoffset;
else
;
end;
if memoffset < 0 then
begin
Message2(asmr_w_check_mem_operand_negative_offset,
std_op2str[opcode],
ToStr(memoffset));
end
else if ((tx86operand(operands[i]).hastype) and (memopsize < memrefsize)) or
(memopsize < (memrefsize + memoffset * 8)) then
begin
if memopsize < memrefsize then
begin
if memoffset = 0 then
begin
Message3(asmr_w_check_mem_operand_size3,
std_op2str[opcode],
ToStr(memopsize),
ToStr(memrefsize)
);
end
else
begin
Message4(asmr_w_check_mem_operand_size_offset,
std_op2str[opcode],
ToStr(memopsize),
ToStr(memrefsize),
ToStr(memoffset)
);
end;
end;
end;
end;
end;
end;
end;
end;
end;
if (ExistsMemRefNoSize or ExistsConstNoSize) and
(MemRefInfo(opcode).ExistsSSEAVX) then
begin
for i := 1 to ops do
begin
if (tx86operand(operands[i]).opsize = S_NO) then
begin
case operands[i].Opr.Typ of
OPR_REFERENCE:
begin
if ExistsBCST then
begin
case MemRefInfo(opcode).MemRefSizeBCST of
msbBCST32: begin
tx86operand(operands[i]).opsize := S_L;
tx86operand(operands[i]).size := OS_32;
end;
msbBCST64: begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
end;
else
Internalerror(2019081006);
end;
end
else
case MemRefInfo(opcode).MemRefSize of
msiMem8:
begin
tx86operand(operands[i]).opsize := S_B;
tx86operand(operands[i]).size := OS_8;
end;
msiMultipleMinSize8:
begin
tx86operand(operands[i]).opsize := S_B;
tx86operand(operands[i]).size := OS_8;
Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"8 bit memory operand"');
end;
msiMem16:
begin
tx86operand(operands[i]).opsize := S_W;
tx86operand(operands[i]).size := OS_16;
end;
msiMultipleMinSize16:
begin
tx86operand(operands[i]).opsize := S_W;
tx86operand(operands[i]).size := OS_16;
Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"16 bit memory operand"');
end;
msiMem32:
begin
tx86operand(operands[i]).opsize := S_L;
tx86operand(operands[i]).size := OS_32;
end;
msiMultipleMinSize32:
begin
tx86operand(operands[i]).opsize := S_L;
tx86operand(operands[i]).size := OS_32;
Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"32 bit memory operand"');
end;
msiMem64:
begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
end;
msiMultipleMinSize64:
begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"64 bit memory operand"');
end;
msiMem128:
begin
tx86operand(operands[i]).opsize := S_XMM;
tx86operand(operands[i]).size := OS_M128;
end;
msiMultipleMinSize128:
begin
tx86operand(operands[i]).opsize := S_XMM;
tx86operand(operands[i]).size := OS_M128;
Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"128 bit memory operand"');
end;
msiMem256:
begin
tx86operand(operands[i]).opsize := S_YMM;
tx86operand(operands[i]).size := OS_M256;
opsize := S_YMM;
end;
msiMultipleMinSize256:
begin
tx86operand(operands[i]).opsize := S_YMM;
tx86operand(operands[i]).size := OS_M256;
opsize := S_YMM;
Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"256 bit memory operand"');
end;
msiMem512:
begin
tx86operand(operands[i]).opsize := S_ZMM;
tx86operand(operands[i]).size := OS_M512;
opsize := S_ZMM;
end;
msiMultipleMinSize512:
begin
tx86operand(operands[i]).opsize := S_ZMM;
tx86operand(operands[i]).size := OS_M512;
opsize := S_ZMM;
Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"512 bit memory operand"');
end;
msiMemRegSize:
begin
// mem-ref-size = register size
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
if (tx86operand(operands[j]).opsize <> S_NO) and
(tx86operand(operands[j]).size <> OS_NO) then
begin
tx86operand(operands[i]).opsize := tx86operand(operands[j]).opsize;
tx86operand(operands[i]).size := tx86operand(operands[j]).size;
break;
end
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
msiMemRegx16y32:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: begin
tx86operand(operands[i]).opsize := S_W;
tx86operand(operands[i]).size := OS_M16;
break;
end;
R_SUBMMY: begin
tx86operand(operands[i]).opsize := S_L;
tx86operand(operands[i]).size := OS_M32;
break;
end;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx16y32z64:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: begin
tx86operand(operands[i]).opsize := S_W;
tx86operand(operands[i]).size := OS_M16;
break;
end;
R_SUBMMY: begin
tx86operand(operands[i]).opsize := S_L;
tx86operand(operands[i]).size := OS_M32;
break;
end;
R_SUBMMZ: begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
break;
end;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx32y64:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: begin
tx86operand(operands[i]).opsize := S_L;
tx86operand(operands[i]).size := OS_M32;
break;
end;
R_SUBMMY: begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
break;
end;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx32y64z128:
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: begin
tx86operand(operands[i]).opsize := S_L;
tx86operand(operands[i]).size := OS_M32;
break;
end;
R_SUBMMY: begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
break;
end;
R_SUBMMZ: begin
tx86operand(operands[i]).opsize := S_XMM;
tx86operand(operands[i]).size := OS_M128;
break;
end;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
msiMemRegx64y128:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
break;
end;
R_SUBMMY: begin
tx86operand(operands[i]).opsize := S_XMM;
tx86operand(operands[i]).size := OS_M128;
break;
end;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx64y128z256:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
break;
end;
R_SUBMMY: begin
tx86operand(operands[i]).opsize := S_XMM;
tx86operand(operands[i]).size := OS_M128;
break;
end;
R_SUBMMZ: begin
tx86operand(operands[i]).opsize := S_YMM;
tx86operand(operands[i]).size := OS_M256;
break;
end;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx64y256:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
break;
end;
R_SUBMMY: begin
tx86operand(operands[i]).opsize := S_YMM;
tx86operand(operands[i]).size := OS_M256;
break;
end;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegx64y256z512:
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
case getsubreg(operands[j].opr.reg) of
R_SUBMMX: begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_M64;
break;
end;
R_SUBMMY: begin
tx86operand(operands[i]).opsize := S_YMM;
tx86operand(operands[i]).size := OS_M256;
break;
end;
R_SUBMMZ: begin
tx86operand(operands[i]).opsize := S_ZMM;
tx86operand(operands[i]).size := OS_M512;
break;
end;
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end;
end;
msiMemRegConst128,
msiMemRegConst256,
msiMemRegConst512:
begin
ExistConst := false;
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_CONSTANT then
begin
ExistConst := true;
break;
end;
end;
if ExistConst then
begin
for j := 1 to ops do
begin
if operands[j].Opr.Typ = OPR_REGISTER then
begin
if (tx86operand(operands[j]).opsize <> S_NO) and
(tx86operand(operands[j]).size <> OS_NO) then
begin
tx86operand(operands[i]).opsize := tx86operand(operands[j]).opsize;
tx86operand(operands[i]).size := tx86operand(operands[j]).size;
break;
end
else Message(asmr_e_unable_to_determine_reference_size);
end;
end;
end
else
begin
case MemRefInfo(opcode).MemRefSize of
msiMemRegConst128: begin
tx86operand(operands[i]).opsize := S_XMM;
tx86operand(operands[i]).size := OS_M128;
break;
end;
msiMemRegConst256: begin
tx86operand(operands[i]).opsize := S_YMM;
tx86operand(operands[i]).size := OS_M256;
break;
end;
msiMemRegConst512: begin
tx86operand(operands[i]).opsize := S_ZMM;
tx86operand(operands[i]).size := OS_M512;
break;
end;
else
Internalerror(2019081007);
end;
end;
end;
msiXMem32,
msiYMem32,
msiZMem32,
msiXMem64,
msiYMem64,
msiZMem64: ; // ignore; gather/scatter opcodes haven a fixed element-size, not a fixed memory-size
// the vector-register have indices with base of the memory-address in the memory-operand
msiNoSize: ; // all memory-sizes are ok
msiNoMemRef:; // ignore;
msiVMemMultiple,
msiVMemRegSize: ; // ignore
msiUnknown,
msiUnsupported,
msiMultiple: Message(asmr_e_unable_to_determine_reference_size); // TODO individual message
else
Internalerror(2019081008);
end;
end;
OPR_CONSTANT:
case MemRefInfo(opcode).ConstSize of
csiMem8: begin
tx86operand(operands[i]).opsize := S_B;
tx86operand(operands[i]).size := OS_8;
end;
csiMem16: begin
tx86operand(operands[i]).opsize := S_W;
tx86operand(operands[i]).size := OS_16;
end;
csiMem32: begin
tx86operand(operands[i]).opsize := S_L;
tx86operand(operands[i]).size := OS_32;
end;
{$ifdef x86_64}
csiMem64: begin
tx86operand(operands[i]).opsize := S_Q;
tx86operand(operands[i]).size := OS_64;
end;
{$else}
csiMem64: begin
internalerror(2019050910);
end;
{$endif}
csiUnknown, csiMultiple, csiNoSize:
;
end;
else
;
end;
end;
end;
end;
for i:=1 to ops do
begin
operands[i].SetCorrectSize(opcode);
if tx86operand(operands[i]).opsize=S_NO then
begin
{$ifdef x86_64}
if (opcode=A_MOVQ) and
(ops=2) and
(operands[1].opr.typ=OPR_CONSTANT) then
opsize:=S_Q
else
{$endif x86_64}
case operands[i].Opr.Typ of
OPR_LOCAL,
OPR_REFERENCE :
begin
{ for 3-operand opcodes, operand #1 (in ATT order) is always an immediate,
don't consider it. }
if i=ops then
operand2:=i-1
else
operand2:=i+1;
if operand2>0 then
begin
{ Only allow register as operand to take the size from }
if operands[operand2].opr.typ=OPR_REGISTER then
begin
if ((opcode<>A_MOVD) and
(opcode<>A_CVTSI2SS)) then
begin
//tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize;
// torsten - 31.01.2012
// old: xmm/ymm-register operands have a opsize = "S_NO"
// new: xmm/ymm-register operands have a opsize = "S_XMM/S_YMM"
// any SSE- and AVX-opcodes have mixed operand sizes (e.g. cvtsd2ss xmmreg, xmmreg/m32)
// in this case is we need the old handling ("S_NO")
// =>> ignore
if (tx86operand(operands[operand2]).opsize <> S_XMM) and
(tx86operand(operands[operand2]).opsize <> S_YMM) and
(tx86operand(operands[operand2]).opsize <> S_ZMM) then
tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize
else tx86operand(operands[operand2]).opsize := S_NO;
end;
end
else
begin
{ if no register then take the opsize (which is available with ATT),
if not availble then give an error }
if opsize<>S_NO then
tx86operand(operands[i]).opsize:=opsize
else
begin
if (m_delphi in current_settings.modeswitches) then
Message(asmr_w_unable_to_determine_reference_size_using_dword)
else
Message(asmr_e_unable_to_determine_reference_size);
{ recovery }
tx86operand(operands[i]).opsize:=S_L;
end;
end;
end
else
begin
if opsize<>S_NO then
tx86operand(operands[i]).opsize:=opsize
end;
end;
OPR_SYMBOL :
begin
{ Fix lea which need a reference }
if opcode=A_LEA then
begin
s:=operands[i].opr.symbol;
so:=operands[i].opr.symofs;
operands[i].opr.typ:=OPR_REFERENCE;
Fillchar(operands[i].opr.ref,sizeof(treference),0);
operands[i].opr.ref.symbol:=s;
operands[i].opr.ref.offset:=so;
end;
{$if defined(x86_64)}
tx86operand(operands[i]).opsize:=S_Q;
{$elseif defined(i386)}
tx86operand(operands[i]).opsize:=S_L;
{$elseif defined(i8086)}
tx86operand(operands[i]).opsize:=S_W;
{$endif}
end;
else
;
end;
end;
end;
if MemRefInfo(opcode).ExistsSSEAVX then
begin
// validate broadcast-memory-operands
vbcst := 0;
mmregs := [];
for i := 1 to ops do
if operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL] then vbcst := tx86operand(operands[i]).vbcst
else if operands[i].Opr.Typ = OPR_REGISTER then
begin
if getsubreg(operands[i].opr.reg) in [R_SUBMMX, R_SUBMMY, R_SUBMMZ] then
begin
include(mmregs, getsubreg(operands[i].opr.reg));
end;
end;
if vbcst <> 0 then
begin
// found broadcast-memory-operand (e.g. "{1to8}")
// check is correct
multiplicator := 0;
if mmregs = [R_SUBMMX] then multiplicator := 1
else if mmregs = [R_SUBMMY] then multiplicator := 2
else if mmregs = [R_SUBMMZ] then multiplicator := 4
else
begin
//TG TODO
end;
if MemRefInfo(opcode).BCSTTypes <> [] then
begin
str(MemRefInfo(opcode).BCSTXMMMultiplicator * multiplicator, bcst1);
str(vbcst, bcst2);
case vbcst of
2: if not(bt1to2 in MemRefInfo(opcode).BCSTTypes) then
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
4: if not(bt1to4 in MemRefInfo(opcode).BCSTTypes) then
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
8: if not(bt1to8 in MemRefInfo(opcode).BCSTTypes) then
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
16: if not(bt1to16 in MemRefInfo(opcode).BCSTTypes) then
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
end;
end
else if MemRefInfo(opcode).BCSTXMMMultiplicator * multiplicator <> vbcst then
begin
str(MemRefInfo(opcode).BCSTXMMMultiplicator * multiplicator, bcst1);
str(vbcst, bcst2);
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
end;
end;
end;
end;
procedure Tx86Instruction.SetInstructionOpsize;
function CheckSSEAVX: Boolean;
var
i: integer;
bBroadcastMemRef: boolean;
begin
Result := False;
with MemRefInfo(opcode) do
begin
if (ExistsSSEAVX) then
begin
bBroadcastMemRef := false;
for i := 1 to ops do
bBroadcastMemRef := bBroadcastMemRef or ((tx86operand(operands[i]).vopext and OTVE_VECTOR_BCST) = OTVE_VECTOR_BCST);
if bBroadcastMemRef then
begin
opsize := S_NO;
result := true;
end
else
begin
if MemRefSize in MemRefMultiples - [msiVMemMultiple] then
begin
case ops of
2: begin
opsize:=tx86operand(operands[1]).opsize;
result := true;
end;
3: begin
if (tx86operand(operands[1]).opr.typ <> OPR_CONSTANT) then
opsize:=tx86operand(operands[1]).opsize
else opsize:=tx86operand(operands[2]).opsize;
result := true;
end;
end;
end;
end;
end;
end;
end;
var
isBCastMemRef: boolean;
begin
if opsize<>S_NO then
exit;
case ops of
0 : ;
1 :
begin
{ "push es" must be stored as a long PM }
if ((opcode=A_PUSH) or
(opcode=A_POP)) and
(operands[1].opr.typ=OPR_REGISTER) and
is_segment_reg(operands[1].opr.reg) then
{$ifdef i8086}
opsize:=S_W
{$else i8086}
opsize:=S_L
{$endif i8086}
else
opsize:=tx86operand(operands[1]).opsize;
end;
2 : begin
case opcode of
A_MOVZX,A_MOVSX :
begin
if tx86operand(operands[1]).opsize=S_NO then
begin
tx86operand(operands[1]).opsize:=S_B;
if (m_delphi in current_settings.modeswitches) then
Message(asmr_w_unable_to_determine_reference_size_using_byte)
else
Message(asmr_e_unable_to_determine_reference_size);
end;
case tx86operand(operands[1]).opsize of
S_W :
case tx86operand(operands[2]).opsize of
S_L :
opsize:=S_WL;
{$ifdef x86_64}
S_Q :
opsize:=S_WQ;
{$endif}
else
;
end;
S_B :
begin
case tx86operand(operands[2]).opsize of
S_W :
opsize:=S_BW;
S_L :
opsize:=S_BL;
{$ifdef x86_64}
S_Q :
opsize:=S_BQ;
{$endif}
else
;
end;
end;
else
;
end;
end;
//A_MOVSS,
//A_VMOVSS,
A_MOVD : { movd is a move from a mmx register to a
32 bit register or memory, so no opsize is correct here PM }
exit;
A_MOVQ :
opsize:=S_IQ;
//A_VCVTPD2DQ,
//A_VCVTPD2PS,
//A_VCVTTPD2DQ,
//A_VCVTPD2UDQ,
//A_VCVTQQ2PS,
//A_VCVTTPD2UDQ,
//A_VCVTUQQ2PS,
A_OUT :
opsize:=tx86operand(operands[1]).opsize;
else
if not CheckSSEAVX then
opsize:=tx86operand(operands[2]).opsize;
end;
end;
3 :
begin
//case opcode of
//A_VCVTSI2SS,
//A_VCVTSI2SD,
//A_VCVTUSI2SS,
//A_VCVTUSI2SD:
// iops:=tx86operand(operands[1]).opsize;
//A_VFPCLASSPD,
//A_VFPCLASSPS:
// iops:=tx86operand(operands[2]).opsize;
//else
begin
if not CheckSSEAVX then
opsize:=tx86operand(operands[ops]).opsize;
end;
//end;
end;
4 :
opsize:=tx86operand(operands[ops]).opsize;
end;
end;
procedure Tx86Instruction.CheckOperandSizes;
var
sizeerr : boolean;
i : longint;
begin
{ Check only the most common opcodes here, the others are done in
the assembler pass }
case opcode of
A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
A_CMP,A_MOV,
A_ADD,A_SUB,A_ADC,A_SBB,
A_AND,A_OR,A_TEST,A_XOR: ;
else
exit;
end;
{ Handle the BW,BL,WL separatly }
sizeerr:=false;
{ special push/pop selector case }
if ((opcode=A_PUSH) or
(opcode=A_POP)) and
(operands[1].opr.typ=OPR_REGISTER) and
is_segment_reg(operands[1].opr.reg) then
exit;
if opsize in [S_BW,S_BL,S_WL] then
begin
if ops<>2 then
sizeerr:=true
else
begin
case opsize of
S_BW :
sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_W);
S_BL :
sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_L);
S_WL :
sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_L);
{$ifdef x86_64}
S_BQ:
sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_Q);
S_WQ:
sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_Q);
S_LQ:
sizeerr:=(tx86operand(operands[1]).opsize<>S_L) or (tx86operand(operands[2]).opsize<>S_Q);
{$endif}
else
;
end;
end;
end
else
begin
for i:=1 to ops do
begin
if (operands[i].opr.typ<>OPR_CONSTANT) and
(tx86operand(operands[i]).opsize in [S_B,S_W,S_L]) and
(tx86operand(operands[i]).opsize<>opsize) then
sizeerr:=true;
end;
end;
if sizeerr then
begin
{ if range checks are on then generate an error }
if (cs_compilesystem in current_settings.moduleswitches) or
not (cs_check_range in current_settings.localswitches) then
Message(asmr_w_size_suffix_and_dest_dont_match)
else
Message(asmr_e_size_suffix_and_dest_dont_match);
end;
end;
{ This check must be done with the operand in ATT order
i.e.after swapping in the intel reader
but before swapping in the NASM and TASM writers PM }
procedure Tx86Instruction.CheckNonCommutativeOpcodes;
begin
if (
(ops=2) and
(operands[1].opr.typ=OPR_REGISTER) and
(operands[2].opr.typ=OPR_REGISTER) and
{ if the first is ST and the second is also a register
it is necessarily ST1 .. ST7 }
((operands[1].opr.reg=NR_ST) or
(operands[1].opr.reg=NR_ST0))
) or
(ops=0) then
if opcode=A_FSUBR then
opcode:=A_FSUB
else if opcode=A_FSUB then
opcode:=A_FSUBR
else if opcode=A_FDIVR then
opcode:=A_FDIV
else if opcode=A_FDIV then
opcode:=A_FDIVR
else if opcode=A_FSUBRP then
opcode:=A_FSUBP
else if opcode=A_FSUBP then
opcode:=A_FSUBRP
else if opcode=A_FDIVRP then
opcode:=A_FDIVP
else if opcode=A_FDIVP then
opcode:=A_FDIVRP;
if (
(ops=1) and
(operands[1].opr.typ=OPR_REGISTER) and
(getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
(operands[1].opr.reg<>NR_ST) and
(operands[1].opr.reg<>NR_ST0)
) then
if opcode=A_FSUBRP then
opcode:=A_FSUBP
else if opcode=A_FSUBP then
opcode:=A_FSUBRP
else if opcode=A_FDIVRP then
opcode:=A_FDIVP
else if opcode=A_FDIVP then
opcode:=A_FDIVRP;
end;
procedure Tx86Instruction.FixupOpcode;
begin
{ does nothing by default }
end;
{*****************************************************************************
opcode Adding
*****************************************************************************}
function Tx86Instruction.ConcatInstruction(p : TAsmList) : tai;
var
siz : topsize;
i : longint;
asize : int64;
ai : taicpu;
begin
ConcatInstruction:=nil;
ai:=nil;
for i:=1 to Ops do
if not operands[i].CheckOperand then
exit;
{ Get Opsize }
if (opsize<>S_NO) or (Ops=0) then
siz:=opsize
else
begin
if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
siz:=tx86operand(operands[1]).opsize
else
siz:=tx86operand(operands[Ops]).opsize;
{ MOVD should be of size S_LQ or S_QL, but these do not exist PM }
if (ops=2) and
(tx86operand(operands[1]).opsize<>S_NO) and
(tx86operand(operands[2]).opsize<>S_NO) and
(tx86operand(operands[1]).opsize<>tx86operand(operands[2]).opsize) then
siz:=S_NO;
end;
if ((opcode=A_MOVD)or
(opcode=A_CVTSI2SS)) and
((tx86operand(operands[1]).opsize=S_NO) or
(tx86operand(operands[2]).opsize=S_NO)) then
siz:=S_NO;
{ NASM does not support FADD without args
as alias of FADDP
and GNU AS interprets FADD without operand differently
for version 2.9.1 and 2.9.5 !! }
if (ops=0) and
((opcode=A_FADD) or
(opcode=A_FMUL) or
(opcode=A_FSUB) or
(opcode=A_FSUBR) or
(opcode=A_FDIV) or
(opcode=A_FDIVR)) then
begin
if opcode=A_FADD then
opcode:=A_FADDP
else if opcode=A_FMUL then
opcode:=A_FMULP
else if opcode=A_FSUB then
opcode:=A_FSUBP
else if opcode=A_FSUBR then
opcode:=A_FSUBRP
else if opcode=A_FDIV then
opcode:=A_FDIVP
else if opcode=A_FDIVR then
opcode:=A_FDIVRP;
message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
end;
{It is valid to specify some instructions without operand size.}
if siz=S_NO then
begin
if (ops=1) and (opcode=A_INT) then
siz:=S_B;
if (ops=1) and (opcode=A_XABORT) then
siz:=S_B;
{$ifdef i8086}
if (ops=1) and (opcode=A_BRKEM) then
siz:=S_B;
{$endif i8086}
if (ops=1) and (opcode=A_RET) or (opcode=A_RETN) or (opcode=A_RETF) or
(opcode=A_RETW) or (opcode=A_RETNW) or (opcode=A_RETFW) or
{$ifndef x86_64}
(opcode=A_RETD) or (opcode=A_RETND) or
{$endif x86_64}
(opcode=A_RETFD)
{$ifdef x86_64}
or (opcode=A_RETQ) or (opcode=A_RETNQ) or (opcode=A_RETFQ)
{$endif x86_64}
then
siz:=S_W;
if (ops=1) and (opcode=A_PUSH) then
begin
{$ifdef i8086}
if (tx86operand(operands[1]).opr.val>=-128) and (tx86operand(operands[1]).opr.val<=127) then
begin
siz:=S_B;
message(asmr_w_unable_to_determine_constant_size_using_byte);
end
else
begin
siz:=S_W;
message(asmr_w_unable_to_determine_constant_size_using_word);
end;
{$else i8086}
{ We are a 32 compiler, assume 32-bit by default. This is Delphi
compatible but bad coding practise.}
siz:=S_L;
message(asmr_w_unable_to_determine_reference_size_using_dword);
{$endif i8086}
end;
if (opcode=A_JMP) or (opcode=A_JCC) or (opcode=A_CALL) then
if ops=1 then
siz:=S_NEAR
else
siz:=S_FAR;
end;
{ GNU AS interprets FDIV without operand differently
for version 2.9.1 and 2.10
we add explicit args to it !! }
if (ops=0) and
((opcode=A_FSUBP) or
(opcode=A_FSUBRP) or
(opcode=A_FDIVP) or
(opcode=A_FDIVRP) or
(opcode=A_FSUB) or
(opcode=A_FSUBR) or
(opcode=A_FADD) or
(opcode=A_FADDP) or
(opcode=A_FDIV) or
(opcode=A_FDIVR)) then
begin
message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
ops:=2;
operands[1].opr.typ:=OPR_REGISTER;
operands[2].opr.typ:=OPR_REGISTER;
operands[1].opr.reg:=NR_ST0;
operands[2].opr.reg:=NR_ST1;
end;
if (ops=1) and
(
(operands[1].opr.typ=OPR_REGISTER) and
(getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
(operands[1].opr.reg<>NR_ST) and
(operands[1].opr.reg<>NR_ST0)
) and
(
(opcode=A_FSUBP) or
(opcode=A_FSUBRP) or
(opcode=A_FDIVP) or
(opcode=A_FDIVRP) or
(opcode=A_FADDP) or
(opcode=A_FMULP)
) then
begin
message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
ops:=2;
operands[2].opr.typ:=OPR_REGISTER;
operands[2].opr.reg:=operands[1].opr.reg;
operands[1].opr.reg:=NR_ST0;
end;
if (ops=1) and
(
(operands[1].opr.typ=OPR_REGISTER) and
(getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
(operands[1].opr.reg<>NR_ST) and
(operands[1].opr.reg<>NR_ST0)
) and
(
(opcode=A_FSUB) or
(opcode=A_FSUBR) or
(opcode=A_FDIV) or
(opcode=A_FDIVR) or
(opcode=A_FADD) or
(opcode=A_FMUL)
) then
begin
message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
ops:=2;
operands[2].opr.typ:=OPR_REGISTER;
operands[2].opr.reg:=NR_ST0;
end;
{ Check for 'POP CS' }
if (opcode=A_POP) and (ops=1) and (operands[1].opr.typ=OPR_REGISTER) and
(operands[1].opr.reg=NR_CS) then
{$ifdef i8086}
{ On i8086 we print only a warning, because 'POP CS' works on 8086 and 8088
CPUs, but isn't supported on any later CPU }
Message(asmr_w_pop_cs_not_portable);
{$else i8086}
{ On the i386 and x86_64 targets, we print out an error, because no CPU,
supported by these targets support 'POP CS' }
Message(asmr_e_pop_cs_not_valid);
{$endif i8086}
{ I tried to convince Linus Torvalds to add
code to support ENTER instruction
(when raising a stack page fault)
but he replied that ENTER is a bad instruction and
Linux does not need to support it
So I think its at least a good idea to add a warning
if someone uses this in assembler code
FPC itself does not use it at all PM }
if (opcode=A_ENTER) and
(target_info.system in [system_i386_linux,system_i386_FreeBSD,system_i386_android]) then
Message(asmr_w_enter_not_supported_by_linux);
ai:=taicpu.op_none(opcode,siz);
ai.fileinfo:=filepos;
ai.SetOperandOrder(op_att);
ai.Ops:=Ops;
ai.Allocate_oper(Ops);
for i:=1 to Ops do
begin
ai.oper[i-1]^.vopext := (operands[i] as tx86operand).vopext;
case operands[i].opr.typ of
OPR_CONSTANT :
ai.loadconst(i-1,operands[i].opr.val);
OPR_REGISTER:
ai.loadreg(i-1,operands[i].opr.reg);
OPR_SYMBOL:
{$ifdef i8086}
if operands[i].opr.symseg then
taicpu(ai).loadsegsymbol(i-1,operands[i].opr.symbol)
else
{$endif i8086}
ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
OPR_LOCAL :
with operands[i].opr do
begin
ai.loadlocal(i-1,localsym,localsymofs,localindexreg,
localscale,localgetoffset,localforceref);
ai.oper[i-1]^.localoper^.localsegment:=localsegment;
end;
OPR_REFERENCE:
begin
if current_settings.optimizerswitches <> [] then
if (not(MemRefInfo(opcode).MemRefSize in MemRefSizeInfoVMems)) and (opcode<>A_XLAT) and not is_x86_string_op(opcode) then
optimize_ref(operands[i].opr.ref,true);
ai.loadref(i-1,operands[i].opr.ref);
if operands[i].size<>OS_NO then
begin
asize:=0;
case operands[i].size of
OS_8,OS_S8 :
asize:=OT_BITS8;
OS_16,OS_S16, OS_M16:
asize:=OT_BITS16;
OS_32,OS_S32 :
{$ifdef i8086}
if siz=S_FAR then
asize:=OT_FAR
else
asize:=OT_BITS32;
{$else i8086}
asize:=OT_BITS32;
{$endif i8086}
OS_F32,OS_M32 :
asize:=OT_BITS32;
OS_64,OS_S64:
begin
{ Only FPU and SSE/AVX operations know about 64bit
values, for all integer operations it is seen as 32bit
this applies only to i386, see tw16622}
if (gas_needsuffix[opcode] in [attsufFPU,attsufFPUint]) or (MemRefInfo(opcode).ExistsSSEAVX) then
asize:=OT_BITS64
{$ifdef i386}
else
asize:=OT_BITS32
{$endif i386}
;
end;
OS_F64,OS_C64, OS_M64 :
asize:=OT_BITS64;
OS_F80 :
asize:=OT_BITS80;
OS_128,OS_M128:
asize := OT_BITS128;
OS_M256:
asize := OT_BITS256;
OS_M512:
asize := OT_BITS512;
else
;
end;
if asize<>0 then
ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and OT_NON_SIZE) or asize;
end;
end;
else
;
end;
end;
{ Condition ? }
if condition<>C_None then
ai.SetCondition(condition);
{ Set is_jmp, it enables asmwriter to emit short jumps if appropriate }
if (opcode=A_JMP) or (opcode=A_JCC) then
ai.is_jmp := True;
{ Concat the opcode or give an error }
if assigned(ai) then
p.concat(ai)
else
Message(asmr_e_invalid_opcode_and_operand);
result:=ai;
end;
function Tx86Instruction.getstring: string;
var
i : longint;
s, sval : string;
regnr: string;
addsize : boolean;
begin
s:='['+std_op2str[opcode];
for i:=1 to ops do
begin
with operands[i] as Tx86Operand do
begin
if i=0 then
s:=s+' '
else
s:=s+',';
{ type }
addsize:=false;
case operands[i].opr.typ of
OPR_CONSTANT : begin
str(operands[i].opr.val, sval);
s:=s+ sval;
end;
OPR_REGISTER : begin
regnr := '';
str(getsupreg(opr.reg),regnr);
if getsubreg(opr.reg)= R_SUBMMX then
s:=s+'xmmreg' + regnr
else
if getsubreg(opr.reg)= R_SUBMMY then
s:=s+'ymmreg' + regnr
else
if getsubreg(opr.reg)= R_SUBMMZ then
s:=s+'zmmreg' + regnr
else
if getregtype(opr.reg)= R_MMXREGISTER then
s:=s+'mmxreg'
else
if getregtype(opr.reg)= R_FPUREGISTER then
s:=s+'fpureg'
else
if getregtype(opr.reg)=R_INTREGISTER then
begin
s:=s+'reg';
addsize:=true;
end
else
if getregtype(opr.reg)=R_ADDRESSREGISTER then
begin
// 14102020 TG TODO CHECK
if (opr.reg >= NR_K0) and (opr.reg >= NR_K7) then
begin
s:=s+'k' + regnr;
end;
end;
end;
OPR_LOCAL,
OPR_REFERENCE: begin
s:=s + 'mem';
addsize:=true;
end;
else s:=s + '???';
end;
if addsize then
begin
sval := '';
str(tcgsize2size[size], sval);
s := s + sval;
end;
if vopext <> 0 then
begin
str(vopext and $07, regnr);
if vopext and OTVE_VECTOR_WRITEMASK = OTVE_VECTOR_WRITEMASK then
s := s + ' {k' + regnr + '}';
if vopext and OTVE_VECTOR_ZERO = OTVE_VECTOR_ZERO then
s := s + ' {z}';
if vopext and OTVE_VECTOR_SAE = OTVE_VECTOR_SAE then
s := s + ' {sae}';
if vopext and OTVE_VECTOR_BCST = OTVE_VECTOR_BCST then
case vopext and OTVE_VECTOR_BCST_MASK of
OTVE_VECTOR_BCST2: s := s + ' {1to2}';
OTVE_VECTOR_BCST4: s := s + ' {1to4}';
OTVE_VECTOR_BCST8: s := s + ' {1to8}';
OTVE_VECTOR_BCST16: s := s + ' {1to16}';
end;
if vopext and OTVE_VECTOR_ER = OTVE_VECTOR_ER then
case vopext and OTVE_VECTOR_ER_MASK of
OTVE_VECTOR_RNSAE: s := s + ' {rn-sae}';
OTVE_VECTOR_RDSAE: s := s + ' {rd-sae}';
OTVE_VECTOR_RUSAE: s := s + ' {ru-sae}';
OTVE_VECTOR_RZSAE: s := s + ' {rz-sae}';
end;
end;
end;
end;
GetString:=s+']';
end;
function Tx86Instruction.MightHaveExtension: boolean;
begin
Result:=aasmcpu.MightHaveExtension(opcode);
end;
end.
|