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Diffstat (limited to 'FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/system_LPC55S69_cm33_core0.h')
-rw-r--r--FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/system_LPC55S69_cm33_core0.h27
1 files changed, 14 insertions, 13 deletions
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/system_LPC55S69_cm33_core0.h b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/system_LPC55S69_cm33_core0.h
index 02f3760ef..e53f426b2 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/system_LPC55S69_cm33_core0.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/system_LPC55S69_cm33_core0.h
@@ -11,7 +11,7 @@
**
** Reference manual: LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3 16 May 2019
** Version: rev. 1.1, 2019-05-16
-** Build: b190830
+** Build: b200418
**
** Abstract:
** Provides a system configuration function and a global variable that
@@ -19,7 +19,7 @@
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright 2016 Freescale Semiconductor, Inc.
-** Copyright 2016-2019 NXP
+** Copyright 2016-2020 NXP
** All rights reserved.
**
** SPDX-License-Identifier: BSD-3-Clause
@@ -49,7 +49,7 @@
*/
#ifndef _SYSTEM_LPC55S69_cm33_core0_H_
-#define _SYSTEM_LPC55S69_cm33_core0_H_ /**< Symbol preventing repeated inclusion */
+#define _SYSTEM_LPC55S69_cm33_core0_H_ /**< Symbol preventing repeated inclusion */
#ifdef __cplusplus
extern "C" {
@@ -57,12 +57,13 @@ extern "C" {
#include <stdint.h>
-#define DEFAULT_SYSTEM_CLOCK 12000000u /* Default System clock value */
-#define CLK_RTC_32K_CLK 32768u /* RTC oscillator 32 kHz output (32k_clk */
-#define CLK_FRO_12MHZ 12000000u /* FRO 12 MHz (fro_12m) */
-#define CLK_FRO_48MHZ 48000000u /* FRO 48 MHz (fro_48m) */
-#define CLK_FRO_96MHZ 96000000u /* FRO 96 MHz (fro_96m) */
-#define CLK_CLK_IN 16000000u /* Default CLK_IN pin clock */
+#define DEFAULT_SYSTEM_CLOCK 12000000u /* Default System clock value */
+#define CLK_RTC_32K_CLK 32768u /* RTC oscillator 32 kHz output (32k_clk */
+#define CLK_FRO_12MHZ 12000000u /* FRO 12 MHz (fro_12m) */
+#define CLK_FRO_48MHZ 48000000u /* FRO 48 MHz (fro_48m) */
+#define CLK_FRO_96MHZ 96000000u /* FRO 96 MHz (fro_96m) */
+#define CLK_CLK_IN 16000000u /* Default CLK_IN pin clock */
+
/**
* @brief System clock frequency (core clock)
@@ -82,7 +83,7 @@ extern uint32_t SystemCoreClock;
* microcontroller device. For systems with variable clock speed it also updates
* the variable SystemCoreClock. SystemInit is called from startup_device file.
*/
-void SystemInit(void);
+void SystemInit (void);
/**
* @brief Updates the SystemCoreClock variable.
@@ -91,7 +92,7 @@ void SystemInit(void);
* execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
* the current core clock.
*/
-void SystemCoreClockUpdate(void);
+void SystemCoreClockUpdate (void);
/**
* @brief SystemInit function hook.
@@ -103,10 +104,10 @@ void SystemCoreClockUpdate(void);
* NOTE: No global r/w variables can be used in this hook function because the
* initialization of these variables happens after this function.
*/
-void SystemInitHook(void);
+void SystemInitHook (void);
#ifdef __cplusplus
}
#endif
-#endif /* _SYSTEM_LPC55S69_cm33_core0_H_ */
+#endif /* _SYSTEM_LPC55S69_cm33_core0_H_ */