1 files changed, 31 insertions, 15 deletions
diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_rtc0.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_rtc0.c
index 79b81e7bf..d9c06d349 100644
--- a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_rtc0.c
+++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_rtc0.c
@@ -19,30 +19,40 @@
 #define METAL_RTCCMP0_MAX UINT32_MAX
 
 #define RTC_REG(base, offset) (((unsigned long)base + offset))
-#define RTC_REGW(base, offset) (__METAL_ACCESS_ONCE((__metal_io_u32 *)RTC_REG(base, offset)))
+#define RTC_REGW(base, offset)                                                 \
+    (__METAL_ACCESS_ONCE((__metal_io_u32 *)RTC_REG(base, offset)))
 
-uint64_t __metal_driver_sifive_rtc0_get_rate(const struct metal_rtc *const rtc) {
-    const struct metal_clock *const clock  = __metal_driver_sifive_rtc0_clock(rtc);
+uint64_t
+__metal_driver_sifive_rtc0_get_rate(const struct metal_rtc *const rtc) {
+    const struct metal_clock *const clock =
+        __metal_driver_sifive_rtc0_clock(rtc);
     return metal_clock_get_rate_hz(clock);
 }
 
-uint64_t __metal_driver_sifive_rtc0_set_rate(const struct metal_rtc *const rtc, const uint64_t rate) {
-    const struct metal_clock *const clock  = __metal_driver_sifive_rtc0_clock(rtc);
+uint64_t __metal_driver_sifive_rtc0_set_rate(const struct metal_rtc *const rtc,
+                                             const uint64_t rate) {
+    const struct metal_clock *const clock =
+        __metal_driver_sifive_rtc0_clock(rtc);
     return metal_clock_get_rate_hz(clock);
 }
 
-uint64_t __metal_driver_sifive_rtc0_get_compare(const struct metal_rtc *const rtc) {
+uint64_t
+__metal_driver_sifive_rtc0_get_compare(const struct metal_rtc *const rtc) {
     const uint64_t base = __metal_driver_sifive_rtc0_control_base(rtc);
 
-    const uint32_t shift = RTC_REGW(base, METAL_SIFIVE_RTC0_RTCCFG) & METAL_RTCCFG_RTCSCALE_MASK;
+    const uint32_t shift =
+        RTC_REGW(base, METAL_SIFIVE_RTC0_RTCCFG) & METAL_RTCCFG_RTCSCALE_MASK;
 
     return ((uint64_t)RTC_REGW(base, METAL_SIFIVE_RTC0_RTCCMP0) << shift);
 }
 
-uint64_t __metal_driver_sifive_rtc0_set_compare(const struct metal_rtc *const rtc, const uint64_t compare) {
+uint64_t
+__metal_driver_sifive_rtc0_set_compare(const struct metal_rtc *const rtc,
+                                       const uint64_t compare) {
     const uint64_t base = __metal_driver_sifive_rtc0_control_base(rtc);
 
-    /* Determine the bit shift and shifted value to store in rtccmp0/rtccfg.scale */
+    /* Determine the bit shift and shifted value to store in
+     * rtccmp0/rtccfg.scale */
     uint32_t shift = 0;
     uint64_t comp_shifted = compare;
     while (comp_shifted > METAL_RTCCMP0_MAX) {
@@ -57,12 +67,13 @@ uint64_t __metal_driver_sifive_rtc0_set_compare(const struct metal_rtc *const rt
     RTC_REGW(base, METAL_SIFIVE_RTC0_RTCCFG) = cfg;
 
     /* Set the value of rtccmp0 */
-    RTC_REGW(base, METAL_SIFIVE_RTC0_RTCCMP0) = (uint32_t) comp_shifted;
+    RTC_REGW(base, METAL_SIFIVE_RTC0_RTCCMP0) = (uint32_t)comp_shifted;
 
     return __metal_driver_sifive_rtc0_get_compare(rtc);
 }
 
-uint64_t __metal_driver_sifive_rtc0_get_count(const struct metal_rtc *const rtc) {
+uint64_t
+__metal_driver_sifive_rtc0_get_count(const struct metal_rtc *const rtc) {
     const uint64_t base = __metal_driver_sifive_rtc0_control_base(rtc);
 
     uint64_t count = RTC_REGW(base, METAL_SIFIVE_RTC0_RTCCOUNTHI);
@@ -72,7 +83,8 @@ uint64_t __metal_driver_sifive_rtc0_get_count(const struct metal_rtc *const rtc)
     return count;
 }
 
-uint64_t __metal_driver_sifive_rtc0_set_count(const struct metal_rtc *const rtc, const uint64_t count) {
+uint64_t __metal_driver_sifive_rtc0_set_count(const struct metal_rtc *const rtc,
+                                              const uint64_t count) {
     const uint64_t base = __metal_driver_sifive_rtc0_control_base(rtc);
 
     RTC_REGW(base, METAL_SIFIVE_RTC0_RTCCOUNTHI) = (UINT_MAX & (count >> 32));
@@ -81,7 +93,8 @@ uint64_t __metal_driver_sifive_rtc0_set_count(const struct metal_rtc *const rtc,
     return __metal_driver_sifive_rtc0_get_count(rtc);
 }
 
-int __metal_driver_sifive_rtc0_run(const struct metal_rtc *const rtc, const enum metal_rtc_run_option option) {
+int __metal_driver_sifive_rtc0_run(const struct metal_rtc *const rtc,
+                                   const enum metal_rtc_run_option option) {
     const uint64_t base = __metal_driver_sifive_rtc0_control_base(rtc);
 
     switch (option) {
@@ -97,11 +110,13 @@ int __metal_driver_sifive_rtc0_run(const struct metal_rtc *const rtc, const enum
     return 0;
 }
 
-struct metal_interrupt *__metal_driver_sifive_rtc0_get_interrupt(const struct metal_rtc *const rtc) {
+struct metal_interrupt *
+__metal_driver_sifive_rtc0_get_interrupt(const struct metal_rtc *const rtc) {
     return __metal_driver_sifive_rtc0_interrupt_parent(rtc);
 }
 
-int __metal_driver_sifive_rtc0_get_interrupt_id(const struct metal_rtc *const rtc) {
+int __metal_driver_sifive_rtc0_get_interrupt_id(
+    const struct metal_rtc *const rtc) {
     return __metal_driver_sifive_rtc0_interrupt_line(rtc);
 }
 
@@ -119,3 +134,4 @@ __METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_rtc0) = {
 
 #endif
 
+typedef int no_empty_translation_units;