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* Kernel changes:Richard Barry2015-03-21537-0/+280160
| | | | | | | | | | | | Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0. New ports: Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices. Added Cortex-M4F port layer for CCS. New demo applications: Added demo application for STM32F7. Added demo application for SAMv71.
* Minor updates relating to formatting and comments only.Richard Barry2015-03-203-4/+6
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* Minor updates to the Microblaze KC702 demo to allow easier connection from a ↵Richard Barry2015-03-162-6/+1
| | | | Telnet server.
* Add networking option to the Microblaze Kintex demo.Richard Barry2015-03-1338-263/+10022
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* Work-in-progress check in of MicroBlaze Kintex7 demo.Richard Barry2015-03-1016-32/+7583
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* Kernel code:Richard Barry2015-03-046-11/+332
| | | | | | | | | + Added mtCOVERAGE_TEST_DELAY() macro to facilitate getting better code coverage during testing. + Update prvNotifyQueueSetContainer() so it does not call xTaskRemoveFromEventList() if it is called from an interrupt, and the queue is locked. Demo apps: Added QueueSetPolling.c/h demo/test functions.
* Kernel updates:Richard Barry2015-02-112-6/+36
| | | | | | | | | | | | + Added vTimerSetTimerID() to compliment vTimerGetTimerID(). Now the timer ID can be used as timer local storage. + Updated comments and added some additional assert() calls. Win32 port: + Some changes to allow easier 64-bit builds PIC24/dsPIC port: + Added NOP after disable interrupt instruction.
* Kernel updates:Richard Barry2015-01-263-23/+25
| | | | - Add user configurable thread local storage array, with get/set access function.
* Add run-time stats to the Kintex7 Microblaze demo.Richard Barry2015-01-195-34/+364
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* Add the beginnings of a Microblaze project for the KC705.Richard Barry2015-01-1610-0/+2678
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* Update version number in preparation for official V8.2.0 release.Richard Barry2015-01-16969-37668/+13202
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* Demo app changes:Richard Barry2015-01-1526-349/+761
| | | | | | | | Add a "query heap" command to the standard sample CLI commands. Remove casting from configMAX_PRIORITIES setting in Win32 simulator demos as it was preventing a clean build. Source code changes. General tidy up and addition of assert points.
* Release candidate - this will be tagged as FreeRTOS V8.2.0rc1 and a zip file ↵Richard Barry2014-12-241-1/+1
| | | | | | provided. Minor lint changes.
* Rename SAM4E demo directory to include the 'F' in 'M4F' - minor point for ↵Richard Barry2014-12-24167-0/+0
| | | | the sake of consistency.
* Update version numbers in preparation for V8.2.0 release candidate 1.Richard Barry2014-12-21969-18208/+46348
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* Kernel changes:Richard Barry2014-12-2117-292/+1765
| | | | | | | | | | | | + Made xTaskNotifyGiveFromISR() its own function, rather than a macro that calls xTaskNotifyFromISR() (minor performance improvement). + GCC and Keil Cortex-M4F ports now use vPortRaiseBASEPRI() in place of ulPortRaiseBASEPRI() where the return value is not required (minor performance improvement). Demo changes: Change the [very basic] FreeRTOS+UDP SAM4E driver to use task notifications rather than a semaphore (execution time now 55% what it was in FreeRTOS V8.1.2!). Robustness improvements to IntQueue.c standard demo task.h. Added the latest standard demo tasks, reg test tasks and int q tasks to the SAM4E demo.
* Kernel changes:Richard Barry2014-12-1911-68/+189
| | | | | | | | | | | | | | | | | | | + Do not attempt to free the stack of a deleted task if the stack was statically allocated. + Introduce configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - which optionally writes known values into the list and list item data structures in order to assist with the detection of memory corruptions. Microblase port: +Change occurrences of #if XPAR_MICROBLAZE_0_USE_FPU == 1 to #if XPAR_MICROBLAZE_0_USE_FPU != 0 as the value can also be 2 or 3. Demo app modifications: + Update Zynq project to use the 2014.4 tools and add in tests for the new task notification feature. + Update SAM4S project to include tests for the new task notification feature.
* + Update demos that use FreeRTOS+Trace to work with the latest trace ↵Richard Barry2014-12-186-15/+25
| | | | | | | | recorder library. + Fix a few compiler warnings. + Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture).
* + New feature added: Task notifications.Richard Barry2014-12-1523-869/+1481
| | | | | | | | | | | + Optimise Cortex-M4F ports by inlining some critical section macros. + Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h. + Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked. + Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos. + Update trace recorder code, and some demos to use the new version (more to do). + Introduce uxTaskPriorityGetFromISR(). + Minor typo corrections. + Update MingW simulator demo to match the MSVC simulator demo.
* Core kernel code:Richard Barry2014-10-1570-473/+12956
| | | | | | | | | | | | | Allow the stats formatting functions to be built in without stdio.h being included inside tasks.c. Kernel port code: - Slight change to the Cortex-A GIC-less port to move all non portable code to the application level. SAMA5D4 demo project: - Update the Atmel provided library to V1.1. - Create a DDR build configuration. - Ensure interrupts are all edge sensitive. - Update the regtest code to use all 32 flop registers.
* Demo projects only:Richard Barry2014-10-095-22/+59
| | | | + Remove some #warnings messages from the Cycle 5 - which were left in the code as reminders of tests that were not yet completed but are now.
* Core kernel files:Richard Barry2014-10-08189-1/+70416
| | | | | | | | | + Change how queues are allocated and deleted so only one pvPortMalloc() or vPortFree() is required in place of the previous 2. + Where the TCB is allocated in relation to the stack is now dependent on the stack growth direction. The stack will not grow into the TCB. + Introduce the configAPPLICATION_ALLOCATED_HEAP constant to allow the application to provide the array used by heap_4.c as its heap. This allows the application writer to use qualifiers on the array to, for example, force the memory into faster RAM. Demo application: + Add demo for SAMA5D4 using IAR.
* MSP430 Demo projects only:Richard Barry2014-10-0512-235/+1914
| | | | Update project format to new IAR version.
* Demo project only: Richard Barry2014-10-0111-69/+2214
| | | | Added comprehensive demo including FreeRTOS+CLI to the Cyclone V SoC project.
* Demo project only: Cyclone V SoC now running from external RAM.Richard Barry2014-10-012-2/+14
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* Added project for Altera Cyclone V SoC, currently running from internal RAM.Richard Barry2014-09-30108-0/+431276
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* Core kernel code:Richard Barry2014-09-165-143/+318
| | | | | | | | | + Introduce xSemaphoreGenericGiveFromISR() as an optimisation when giving semaphores and mutexes from an interrupt. Demo applications: + Update IntSemTest.c to provide more code coverage in xSemaphoreGenericGiveFromISR(). + Ensure the MMU is turned on in the RZ IAR demo. It was already on in the RZ ARM demo.
* SAM4L tickless implementation: Bug fix and update the demo project to ↵Richard Barry2014-09-167-159/+715
| | | | exercise the fix.
* Demo project only:Richard Barry2014-09-125-4/+14
| | | | Add the new IntSem test/demo code into the MSVC demo project.
* Demo tasks only, with the aim of improving test coverage:Richard Barry2014-09-114-101/+488
| | | | + Split out the code that uses a mutex from an interrupt from GenQTest.c and add to new common demo task IntSemTest.c.
* Update version number to 8.1.2 after moving the defaulting of ↵Richard Barry2014-09-02949-948/+948
| | | | configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition.
* Demo code only:Richard Barry2014-09-0211-411/+1409
| | | | Add the IntQ standard test to the SAM4S project.
* Update version number to 8.1.1 for patch release that re-enables mutexes to ↵Richard Barry2014-08-29956-978/+11942
| | | | be given from an interrupt.
* Core kernel code:Richard Barry2014-08-298-133/+358
| | | | | | | - Re-introduce the ability to give a mutex from an ISR. Common demo code: - Add additional tests into the GenQTest files for priority inheritance and using a mutex from an ISR.
* Lower the minimum stack size used by the ATSAMA5 demo.Richard Barry2014-08-261-2/+2
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* Minor edits prior to tagging V8.1.0.Richard Barry2014-08-2611-1396/+123
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* ***IMMINENT RELEASE NOTICE***Richard Barry2014-08-16952-954/+952
| | | | Update version numbers ready for FreeRTOS V8.1.0 release in about 10 days.
* Demo application related:Richard Barry2014-08-1626-89/+130
| | | | | | | | | | | | | + Update the RZ IAR project so it targets the RZ RSK rather than custom hardware. + Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware. + Updated RX64M demos to use the new iodefine.h naming. Cortex-A9 port related: + Update IAR, ARM and GCC Cortex-A9 port layers to include a 'task exit error' function which is called if a task attempts to incorrectly exit its implementing function. + Moved the instruction which switches into system mode out of the restore context macro, as it is only needed when starting the first task. Core kernel files related: + Ensure there are no references to the mutexes held count when mutexes are excluded from the build.
* Common demo tasks:Richard Barry2014-08-0421-596/+213
| | | | | | | | | | | - Add additional tests to GenQTest.c to test the updated priority inheritance mechanism. - Slightly increase some delays in recmutex.c to prevent it reporting false errors in high load test cases. SAMA5D3 Xplained IAR demo: - Remove space being allocated for stacks that are not used. - Remove explicit enabling of interrupts in ISR handers as this is now done from the central ISR callback before the individual handers are invoked. - Reduce both the allocated heap size and the stack allocated to each task. - Enable I cache.
* Carry on working on SAMA5D3 demo:Richard Barry2014-07-2914-85/+205
| | | | | | | | - Add full interrupt nesting tests. - Add additional critical section/context switching tests. - Set interrupt priorities so everything can run at once without any software watchdog errors. - Re-enable interrupts in each IRQ handler. - Add in run-time stats.
* SAMA5D3 demo: Add CDC driver code and use CDC to create a simple command ↵Richard Barry2014-07-2350-509/+8851
| | | | console.
* Re-test Zynq demo now it is using the latest tools.Richard Barry2014-07-145-9/+12
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* Add back Zynq demo - this time using SDK V14.2.Richard Barry2014-07-14381-0/+269762
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* Remove Zynq demo project ready to recreate the project using the 14.2 ↵Richard Barry2014-07-1481-182982/+0
| | | | version of Xilinx's SDK.
* Add 'full' demo to the SAMA5 Xplained demo - but so far without interrupt ↵Richard Barry2014-07-1211-39/+1270
| | | | nesting tests or CLI.
* SAMA5D3 Xplained demo blinky running.Richard Barry2014-07-1215-368/+112
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* Start of SAMA5D3 XPlained demo.Richard Barry2014-07-09277-0/+67714
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* Update the MSVC simulator demo to demonstrate heap_5 allocator and ↵Richard Barry2014-07-035-30/+87
| | | | pdTICKS_TO_MS macro being used.
* Update timer demo in PIC32MZ demo to remove multiple extern definition ↵Richard Barry2014-06-161-1/+0
| | | | created by adding in the macro that checks non ISR safe functions are not called from ISRs.
* Add additional comments to the Zynq lwIP demo.Richard Barry2014-06-132-2/+16
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