/* FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd. *************************************************************************** * * * FreeRTOS tutorial books are available in pdf and paperback. * * Complete, revised, and edited pdf reference manuals are also * * available. * * * * Purchasing FreeRTOS documentation will not only help you, by * * ensuring you get running as quickly as possible and with an * * in-depth knowledge of how to use FreeRTOS, it will also help * * the FreeRTOS project to continue with its mission of providing * * professional grade, cross platform, de facto standard solutions * * for microcontrollers - completely free of charge! * * * * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * * * * Thank you for using FreeRTOS, and thank you for your support! * * * *************************************************************************** This file is part of the FreeRTOS distribution. FreeRTOS is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License (version 2) as published by the Free Software Foundation AND MODIFIED BY the FreeRTOS exception. >>>NOTE<<< The modification to the GPL is included to allow you to distribute a combined work that includes FreeRTOS without being obliged to provide the source code for proprietary components outside of the FreeRTOS kernel. FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License and the FreeRTOS license exception along with FreeRTOS; if not it can be viewed here: http://www.freertos.org/a00114.html and also obtained by writing to Richard Barry, contact details for whom are available on the FreeRTOS WEB site. 1 tab == 4 spaces! *************************************************************************** * * * Having a problem? Start by reading the FAQ "My application does * * not run, what could be wrong? * * * * http://www.FreeRTOS.org/FAQHelp.html * * * *************************************************************************** http://www.FreeRTOS.org - Documentation, training, latest information, license and contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool. Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell the code with commercial support, indemnification, and middleware, under the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also provide a safety engineered and independently SIL3 certified version under the SafeRTOS brand: http://www.SafeRTOS.com. */ /*----------------------------------------------------------- * Implementation of functions defined in portable.h for the ST STR75x ARM7 * port. *----------------------------------------------------------*/ /* Library includes. */ #include "75x_tb.h" #include "75x_eic.h" /* Scheduler includes. */ #include "FreeRTOS.h" #include "task.h" /* Constants required to setup the initial stack. */ #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */ #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 ) /* Constants required to handle critical sections. */ #define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 ) /* Prescale used on the timer clock when calculating the tick period. */ #define portPRESCALE 20 /*-----------------------------------------------------------*/ /* Setup the TB to generate the tick interrupts. */ static void prvSetupTimerInterrupt( void ); /* ulCriticalNesting will get set to zero when the first task starts. It cannot be initialised to 0 as this will cause interrupts to be enabled during the kernel initialisation process. */ unsigned long ulCriticalNesting = ( unsigned long ) 9999; /* Tick interrupt routines for preemptive operation. */ __arm void vPortPreemptiveTick( void ); /*-----------------------------------------------------------*/ /* * Initialise the stack of a task to look exactly as if a call to * portSAVE_CONTEXT had been called. * * See header file for description. */ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) { portSTACK_TYPE *pxOriginalTOS; pxOriginalTOS = pxTopOfStack; /* To ensure asserts in tasks.c don't fail, although in this case the assert is not really required. */ pxTopOfStack--; /* Setup the initial stack of the task. The stack is set exactly as expected by the portRESTORE_CONTEXT() macro. */ /* First on the stack is the return address - which in this case is the start of the task. The offset is added to make the return address appear as it would within an IRQ ISR. */ *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */ pxTopOfStack--; /* When the task starts is will expect to find the function parameter in R0. */ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ pxTopOfStack--; /* The status register is set for system mode, with interrupts enabled. */ *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR; pxTopOfStack--; /* Interrupt flags cannot always be stored on the stack and will instead be stored in a variable, which is then saved as part of the tasks context. */ *pxTopOfStack = portNO_CRITICAL_NESTING; return pxTopOfStack; } /*-----------------------------------------------------------*/ portBASE_TYPE xPortStartScheduler( void ) { extern void vPortStartFirstTask( void ); /* Start the timer that generates the tick ISR. Interrupts are disabled here already. */ prvSetupTimerInterrupt(); /* Start the first task. */ vPortStartFirstTask(); /* Should not get here! */ return 0; } /*-----------------------------------------------------------*/ void vPortEndScheduler( void ) { /* It is unlikely that the ARM port will require this function as there is nothing to return to. */ } /*-----------------------------------------------------------*/ __arm void vPortPreemptiveTick( void ) { /* Increment the tick counter. */ vTaskIncrementTick(); /* The new tick value might unblock a task. Ensure the highest task that is ready to execute is the task that will execute when the tick ISR exits. */ #if configUSE_PREEMPTION == 1 vTaskSwitchContext(); #endif TB_ClearITPendingBit( TB_IT_Update ); } /*-----------------------------------------------------------*/ static void prvSetupTimerInterrupt( void ) { EIC_IRQInitTypeDef EIC_IRQInitStructure; TB_InitTypeDef TB_InitStructure; /* Setup the EIC for the TB. */ EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE; EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel; EIC_IRQInitStructure.EIC_IRQChannelPriority = 1; EIC_IRQInit(&EIC_IRQInitStructure); /* Setup the TB for the generation of the tick interrupt. */ TB_InitStructure.TB_Mode = TB_Mode_Timing; TB_InitStructure.TB_CounterMode = TB_CounterMode_Down; TB_InitStructure.TB_Prescaler = portPRESCALE - 1; TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ ); TB_Init(&TB_InitStructure); /* Enable TB Update interrupt */ TB_ITConfig(TB_IT_Update, ENABLE); /* Clear TB Update interrupt pending bit */ TB_ClearITPendingBit(TB_IT_Update); /* Enable TB */ TB_Cmd(ENABLE); } /*-----------------------------------------------------------*/ __arm __interwork void vPortEnterCritical( void ) { /* Disable interrupts first! */ __disable_interrupt(); /* Now interrupts are disabled ulCriticalNesting can be accessed directly. Increment ulCriticalNesting to keep a count of how many times portENTER_CRITICAL() has been called. */ ulCriticalNesting++; } /*-----------------------------------------------------------*/ __arm __interwork void vPortExitCritical( void ) { if( ulCriticalNesting > portNO_CRITICAL_NESTING ) { /* Decrement the nesting count as we are leaving a critical section. */ ulCriticalNesting--; /* If the nesting level has reached zero then interrupts should be re-enabled. */ if( ulCriticalNesting == portNO_CRITICAL_NESTING ) { __enable_interrupt(); } } } /*-----------------------------------------------------------*/