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authorglisse <glisse@138bc75d-0d04-0410-961f-82ee72b054a4>2013-06-27 20:07:32 +0000
committerglisse <glisse@138bc75d-0d04-0410-961f-82ee72b054a4>2013-06-27 20:07:32 +0000
commit3b76b707d7bf13d49dc4cba3f17af30a699cc08c (patch)
tree877371d5bcbdf6a42ac375031e713faf2aa13b31
parent2ee10f29e68ef93e4d039f6135067a90fca9c00e (diff)
downloadgcc-3b76b707d7bf13d49dc4cba3f17af30a699cc08c.tar.gz
2013-06-27 Marc Glisse <marc.glisse@inria.fr>
PR target/57224 * config/i386/i386.c (enum ix86_builtins, bdesc_args): Remove IX86_BUILTIN_CMPNGTSS and IX86_BUILTIN_CMPNGESS. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200492 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/i386/i386.c4
2 files changed, 6 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 367fcce526b..cf8a04020b8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2013-06-27 Marc Glisse <marc.glisse@inria.fr>
+
+ PR target/57224
+ * config/i386/i386.c (enum ix86_builtins, bdesc_args): Remove
+ IX86_BUILTIN_CMPNGTSS and IX86_BUILTIN_CMPNGESS.
+
2013-06-27 Catherine Moore <clm@codesourcery.com>
* config/mips/mips-tables.opt: Regenerate.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index e4799b61150..2a65fc2a6de 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -25921,8 +25921,6 @@ enum ix86_builtins
IX86_BUILTIN_CMPNEQSS,
IX86_BUILTIN_CMPNLTSS,
IX86_BUILTIN_CMPNLESS,
- IX86_BUILTIN_CMPNGTSS,
- IX86_BUILTIN_CMPNGESS,
IX86_BUILTIN_CMPORDSS,
IX86_BUILTIN_CMPUNORDSS,
@@ -27559,8 +27557,6 @@ static const struct builtin_description bdesc_args[] =
{ OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpneqss", IX86_BUILTIN_CMPNEQSS, NE, (int) V4SF_FTYPE_V4SF_V4SF },
{ OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpnltss", IX86_BUILTIN_CMPNLTSS, UNGE, (int) V4SF_FTYPE_V4SF_V4SF },
{ OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpnless", IX86_BUILTIN_CMPNLESS, UNGT, (int) V4SF_FTYPE_V4SF_V4SF },
- { OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpngtss", IX86_BUILTIN_CMPNGTSS, UNGE, (int) V4SF_FTYPE_V4SF_V4SF_SWAP },
- { OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpngess", IX86_BUILTIN_CMPNGESS, UNGT, (int) V4SF_FTYPE_V4SF_V4SF_SWAP },
{ OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpordss", IX86_BUILTIN_CMPORDSS, ORDERED, (int) V4SF_FTYPE_V4SF_V4SF },
{ OPTION_MASK_ISA_SSE, CODE_FOR_sminv4sf3, "__builtin_ia32_minps", IX86_BUILTIN_MINPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF },