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authorjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>2009-09-22 12:53:14 +0000
committerjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>2009-09-22 12:53:14 +0000
commit6ae16e00e6493f56a4b06eed0276f662df7f9271 (patch)
tree7dd94ebfda381e885008472b14fed043e004f03e
parent15f39410cd6d73a73dd00b63dbda7e50857dcb87 (diff)
downloadgcc-6ae16e00e6493f56a4b06eed0276f662df7f9271.tar.gz
* config/rs6000/rs6000.c (bdesc_2arg): Fix CODE_FOR_vector_gt* codes
for __builtin_altivec_vcmpgt{sb,uh,sh,uw}. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@151977 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog3
-rw-r--r--gcc/config/rs6000/rs6000.c8
2 files changed, 7 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index eb4e37ad56c..9b0302c0a0f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,8 @@
2009-09-22 Jakub Jelinek <jakub@redhat.com>
+ * config/rs6000/rs6000.c (bdesc_2arg): Fix CODE_FOR_vector_gt* codes
+ for __builtin_altivec_vcmpgt{sb,uh,sh,uw}.
+
* reload1.c (reload): Call wrap_constant when substituting
reg for equiv inside of DEBUG_INSNs.
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 564b5407322..a39f7745931 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -8640,10 +8640,10 @@ static struct builtin_description bdesc_2arg[] =
{ MASK_ALTIVEC, CODE_FOR_vector_eqv4sf, "__builtin_altivec_vcmpeqfp", ALTIVEC_BUILTIN_VCMPEQFP },
{ MASK_ALTIVEC, CODE_FOR_vector_gev4sf, "__builtin_altivec_vcmpgefp", ALTIVEC_BUILTIN_VCMPGEFP },
{ MASK_ALTIVEC, CODE_FOR_vector_gtuv16qi, "__builtin_altivec_vcmpgtub", ALTIVEC_BUILTIN_VCMPGTUB },
- { MASK_ALTIVEC, CODE_FOR_vector_gtuv8hi, "__builtin_altivec_vcmpgtsb", ALTIVEC_BUILTIN_VCMPGTSB },
- { MASK_ALTIVEC, CODE_FOR_vector_gtuv4si, "__builtin_altivec_vcmpgtuh", ALTIVEC_BUILTIN_VCMPGTUH },
- { MASK_ALTIVEC, CODE_FOR_vector_gtv16qi, "__builtin_altivec_vcmpgtsh", ALTIVEC_BUILTIN_VCMPGTSH },
- { MASK_ALTIVEC, CODE_FOR_vector_gtv8hi, "__builtin_altivec_vcmpgtuw", ALTIVEC_BUILTIN_VCMPGTUW },
+ { MASK_ALTIVEC, CODE_FOR_vector_gtv16qi, "__builtin_altivec_vcmpgtsb", ALTIVEC_BUILTIN_VCMPGTSB },
+ { MASK_ALTIVEC, CODE_FOR_vector_gtuv8hi, "__builtin_altivec_vcmpgtuh", ALTIVEC_BUILTIN_VCMPGTUH },
+ { MASK_ALTIVEC, CODE_FOR_vector_gtv8hi, "__builtin_altivec_vcmpgtsh", ALTIVEC_BUILTIN_VCMPGTSH },
+ { MASK_ALTIVEC, CODE_FOR_vector_gtuv4si, "__builtin_altivec_vcmpgtuw", ALTIVEC_BUILTIN_VCMPGTUW },
{ MASK_ALTIVEC, CODE_FOR_vector_gtv4si, "__builtin_altivec_vcmpgtsw", ALTIVEC_BUILTIN_VCMPGTSW },
{ MASK_ALTIVEC, CODE_FOR_vector_gtv4sf, "__builtin_altivec_vcmpgtfp", ALTIVEC_BUILTIN_VCMPGTFP },
{ MASK_ALTIVEC, CODE_FOR_altivec_vctsxs, "__builtin_altivec_vctsxs", ALTIVEC_BUILTIN_VCTSXS },