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authoralalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4>2016-01-08 11:15:58 +0000
committeralalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4>2016-01-08 11:15:58 +0000
commit38b759f72f052afd8b98b1ecb558661ee08d4caa (patch)
treec54f52ae33b0c9055b671ff6d1b21fc903a2540b
parentc9595c51a9b8654488990a53248b26c574b77d1a (diff)
downloadgcc-38b759f72f052afd8b98b1ecb558661ee08d4caa.tar.gz
[PATCH][RS6000] Migrate reduction optabs in paired.md
* gcc.target/rs6000/paired.md (reduc_smax_v2sf): Rename to... (reduc_smax_scal_v2sf): ...here, make result SFmode, extract element. (reduc_smin_v2sf): Rename to... (reduc_smin_scal_v2sf): ...here, make result SFmode, extract element. (reduc_splus_v2sf): Rename to... (reduc_plus_scal_v2sf): ...here, make result SFmode, extract element. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@232158 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/rs6000/paired.md39
2 files changed, 37 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 98370d65eee..f9c42c79095 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2016-01-08 Alan Lawrence <alan.lawrence@arm.com>
+
+ * gcc.target/rs6000/paired.md (reduc_smax_v2sf): Rename to...
+ (reduc_smax_scal_v2sf): ...here, make result SFmode, extract element.
+ (reduc_smin_v2sf): Rename to...
+ (reduc_smin_scal_v2sf): ...here, make result SFmode, extract element.
+ (reduc_splus_v2sf): Rename to...
+ (reduc_plus_scal_v2sf): ...here, make result SFmode, extract element.
+
2016-01-08 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/69162
diff --git a/gcc/config/rs6000/paired.md b/gcc/config/rs6000/paired.md
index b27fccebf82..224081b83c3 100644
--- a/gcc/config/rs6000/paired.md
+++ b/gcc/config/rs6000/paired.md
@@ -421,45 +421,62 @@
DONE;
})
-(define_expand "reduc_smax_v2sf"
- [(match_operand:V2SF 0 "gpc_reg_operand" "=f")
+(define_expand "reduc_smax_scal_v2sf"
+ [(match_operand:SF 0 "gpc_reg_operand" "=f")
(match_operand:V2SF 1 "gpc_reg_operand" "f")]
"TARGET_PAIRED_FLOAT"
{
rtx tmp_swap = gen_reg_rtx (V2SFmode);
rtx tmp = gen_reg_rtx (V2SFmode);
+ rtx vec_res = gen_reg_rtx (V2SFmode);
+ rtx di_res = gen_reg_rtx (DImode);
emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1]));
emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap));
- emit_insn (gen_selv2sf4 (operands[0], tmp, operands[1], tmp_swap, CONST0_RTX (SFmode)));
+ emit_insn (gen_selv2sf4 (vec_res, tmp, operands[1], tmp_swap,
+ CONST0_RTX (SFmode)));
+ emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0));
+ emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode,
+ BYTES_BIG_ENDIAN ? 4 : 0));
DONE;
})
-(define_expand "reduc_smin_v2sf"
- [(match_operand:V2SF 0 "gpc_reg_operand" "=f")
+(define_expand "reduc_smin_scal_v2sf"
+ [(match_operand:SF 0 "gpc_reg_operand" "=f")
(match_operand:V2SF 1 "gpc_reg_operand" "f")]
"TARGET_PAIRED_FLOAT"
{
rtx tmp_swap = gen_reg_rtx (V2SFmode);
rtx tmp = gen_reg_rtx (V2SFmode);
+ rtx vec_res = gen_reg_rtx (V2SFmode);
+ rtx di_res = gen_reg_rtx (DImode);
emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1]));
emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap));
- emit_insn (gen_selv2sf4 (operands[0], tmp, tmp_swap, operands[1], CONST0_RTX (SFmode)));
+ emit_insn (gen_selv2sf4 (vec_res, tmp, tmp_swap, operands[1],
+ CONST0_RTX (SFmode)));
+ emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0));
+ emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode,
+ BYTES_BIG_ENDIAN ? 4 : 0));
DONE;
})
-(define_expand "reduc_splus_v2sf"
- [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
+(define_expand "reduc_plus_scal_v2sf"
+ [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
(match_operand:V2SF 1 "gpc_reg_operand" "f"))]
"TARGET_PAIRED_FLOAT"
- "
{
- emit_insn (gen_paired_sum1 (operands[0], operands[1], operands[1], operands[1]));
+ rtx vec_res = gen_reg_rtx (V2SFmode);
+ rtx di_res = gen_reg_rtx (DImode);
+
+ emit_insn (gen_paired_sum1 (vec_res, operands[1], operands[1], operands[1]));
+ emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0));
+ emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode,
+ BYTES_BIG_ENDIAN ? 4 : 0));
DONE;
-}")
+})
(define_expand "movmisalignv2sf"
[(set (match_operand:V2SF 0 "nonimmediate_operand" "")