diff options
author | sayle <sayle@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-08-12 01:46:54 +0000 |
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committer | sayle <sayle@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-08-12 01:46:54 +0000 |
commit | fabd534f7b9d0473dc39e5f9f8420ddcf326f50d (patch) | |
tree | e32919613522bf01d8e4dab1fa0f97713c6ea96f | |
parent | 71d5a7589f52d87fc2527887efddccf12663b2a2 (diff) | |
download | gcc-fabd534f7b9d0473dc39e5f9f8420ddcf326f50d.tar.gz |
* simplify-rtx.c (simplify_binary_operation): Replace calls to
gen_rtx_NEG and gen_rtx_NOT with calls to simplify_gen_unary,
and calls to gen_rtx_PLUS, gen_rtx_MULT, gen_rtx_LSHIFTRT,
gen_rtx_ASHIFT and gen_rtx_AND with calls to simplify_gen_binary.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@70350 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/simplify-rtx.c | 29 |
2 files changed, 20 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 92b6a3eb395..767c2d64834 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2003-08-11 Roger Sayle <roger@eyesopen.com> + * simplify-rtx.c (simplify_binary_operation): Replace calls to + gen_rtx_NEG and gen_rtx_NOT with calls to simplify_gen_unary, + and calls to gen_rtx_PLUS, gen_rtx_MULT, gen_rtx_LSHIFTRT, + gen_rtx_ASHIFT and gen_rtx_AND with calls to simplify_gen_binary. + +2003-08-11 Roger Sayle <roger@eyesopen.com> + * expr.c (expand_expr): If an ABS_EXPR has a complex type, abort. * c-typeck.c (build_unary_op): COMPLEX_TYPE is not a valid typecode for an ABS_EXPR. diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 84127daebce..ab442facdeb 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -1095,7 +1095,7 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, if (INTEGRAL_MODE_P (mode) && GET_CODE (op0) == NOT && trueop1 == const1_rtx) - return gen_rtx_NEG (mode, XEXP (op0, 0)); + return simplify_gen_unary (NEG, mode, XEXP (op0, 0), mode); /* Handle both-operands-constant cases. We can only add CONST_INTs to constants since the sum of relocatable symbols @@ -1230,11 +1230,11 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, But if the mode has signed zeros, and does not round towards -infinity, then 0 - 0 is 0, not -0. */ if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode)) - return gen_rtx_NEG (mode, op1); + return simplify_gen_unary (NEG, mode, op1, mode); /* (-1 - a) is ~a. */ if (trueop0 == constm1_rtx) - return gen_rtx_NOT (mode, op1); + return simplify_gen_unary (NOT, mode, op1, mode); /* Subtracting 0 has no effect unless the mode has signed zeros and supports rounding towards -infinity. In such a case, @@ -1344,11 +1344,7 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, case MULT: if (trueop1 == constm1_rtx) - { - tem = simplify_unary_operation (NEG, mode, op0, mode); - - return tem ? tem : gen_rtx_NEG (mode, op0); - } + return simplify_gen_unary (NEG, mode, op0, mode); /* Maybe simplify x * 0 to 0. The reduction is not valid if x is NaN, since x * 0 is then also NaN. Nor is it valid @@ -1376,7 +1372,7 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, && (width <= HOST_BITS_PER_WIDE_INT || val != HOST_BITS_PER_WIDE_INT - 1) && ! rtx_equal_function_value_matters) - return gen_rtx_ASHIFT (mode, op0, GEN_INT (val)); + return simplify_gen_binary (ASHIFT, mode, op0, GEN_INT (val)); /* x*2 is x+x and x*(-1) is -x */ if (GET_CODE (trueop1) == CONST_DOUBLE @@ -1387,10 +1383,10 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1); if (REAL_VALUES_EQUAL (d, dconst2)) - return gen_rtx_PLUS (mode, op0, copy_rtx (op0)); + return simplify_gen_binary (PLUS, mode, op0, copy_rtx (op0)); if (REAL_VALUES_EQUAL (d, dconstm1)) - return gen_rtx_NEG (mode, op0); + return simplify_gen_unary (NEG, mode, op0, mode); } break; @@ -1417,7 +1413,7 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, if (GET_CODE (trueop1) == CONST_INT && ((INTVAL (trueop1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))) - return gen_rtx_NOT (mode, op0); + return simplify_gen_unary (NOT, mode, op0, mode); if (trueop0 == trueop1 && ! side_effects_p (op0) && GET_MODE_CLASS (mode) != MODE_CC) return const0_rtx; @@ -1446,7 +1442,7 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, below). */ if (GET_CODE (trueop1) == CONST_INT && (arg1 = exact_log2 (INTVAL (trueop1))) > 0) - return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1)); + return simplify_gen_binary (LSHIFTRT, mode, op0, GEN_INT (arg1)); /* ... fall through ... */ @@ -1487,8 +1483,8 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, if (! REAL_VALUES_EQUAL (d, dconst0)) { REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d); - return gen_rtx_MULT (mode, op0, - CONST_DOUBLE_FROM_REAL_VALUE (d, mode)); + tem = CONST_DOUBLE_FROM_REAL_VALUE (d, mode); + return simplify_gen_binary (MULT, mode, op0, tem); } } break; @@ -1497,7 +1493,8 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode, /* Handle modulus by power of two (mod with 1 handled below). */ if (GET_CODE (trueop1) == CONST_INT && exact_log2 (INTVAL (trueop1)) > 0) - return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1)); + return simplify_gen_binary (AND, mode, op0, + GEN_INT (INTVAL (op1) - 1)); /* ... fall through ... */ |