diff options
| author | Lulu Cheng <chenglulu@loongson.cn> | 2022-04-27 15:07:05 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2022-04-27 19:55:17 +0800 |
| commit | 1b21d79e4e462e38868486bbf3d1eaf4c14cc6d0 (patch) | |
| tree | 45a5fc9b8efd92e42c4602576cf81a6edfc9daea | |
| parent | cec978606a6291ac3e9b7d3ce438643b45e41f72 (diff) | |
| download | gcc-1b21d79e4e462e38868486bbf3d1eaf4c14cc6d0.tar.gz | |
LoongArch: Add fdiv define_expand template.
gcc/ChangeLog:
* config/loongarch/loongarch.md: Add fdiv define_expand template,
then generate floating-point division and floating-point reciprocal
instructions.
| -rw-r--r-- | gcc/config/loongarch/loongarch.md | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 5a7641703b5..d3c809e25f3 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -713,6 +713,12 @@ ;; ;; Float division and modulus. +(define_expand "div<mode>3" + [(set (match_operand:ANYF 0 "register_operand") + (div:ANYF (match_operand:ANYF 1 "reg_or_1_operand") + (match_operand:ANYF 2 "register_operand")))] + "") + (define_insn "*div<mode>3" [(set (match_operand:ANYF 0 "register_operand" "=f") (div:ANYF (match_operand:ANYF 1 "register_operand" "f") |