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author | jfc <jfc@138bc75d-0d04-0410-961f-82ee72b054a4> | 1998-09-06 05:52:01 +0000 |
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committer | jfc <jfc@138bc75d-0d04-0410-961f-82ee72b054a4> | 1998-09-06 05:52:01 +0000 |
commit | 1030e8a8e846bf4856c2da91e67fa00de75d011e (patch) | |
tree | ac886893cda3c276920c570b5da1725d53046427 | |
parent | 339929b87b674cff0a9986ee20e306450c16e8a9 (diff) | |
download | gcc-1030e8a8e846bf4856c2da91e67fa00de75d011e.tar.gz |
d
* final.c (final): If a label is reached only from a single jump,
call NOTICE_UPDATE_CC on the jump and its predecessor before
emitting the insn after the label.
* i386.h: Add AMD K6 support.
Change TARGET_* macros to use table lookup.
(INITIALIZE_TRAMPOLINE): Improve trampoline code.
(ADJUST_COST): Change definition to call function in i386.c.
(ISSUE_RATE): Define as 2 for anything newer than an 80486.
* i386.c: Add AMD K6 support.
Add constants for feature tests used by TARGET_* macros.
(split_di): If before reload, call gen_lowpart and gen_highpart.
(x86_adjust_cost): New function.
(put_jump_code): New function.
(print_operand): New codes 'D' and 'd'.
* i386.md: New insn types. New insn attribute "memory".
Redefine scheduling parameters to use new types and add AMD K6
support. Explicitly set type of most insns.
(move insns): K6 prefers movl $0,reg to xorl reg,reg. Pentium
Pro and K6 prefer movl $1,reg to incl reg.
(adddi3, subdi3): Set cc_status.
(DImode shift patterns): Change label counters from HOST_WIDE_INT
to int; x86 can't have more than 2^31 DImode shifts per file.
(setcc): Combine all setcc patterns. Allow writing memory.
Combine all jump patterns using match_operator.
(*bzero): Name pattern. Emit mutliple stos instructions when that
is faster than rep stos.
(xordi3, anddi3, iordi3): Simplify DImode logical patterns and
add define_split.
* ch/Make-lang.in: Comment ^L characters. Sun make doesn't like them.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@22290 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/final.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/gcc/final.c b/gcc/final.c index 0938e221d5e..454ab6c71f5 100644 --- a/gcc/final.c +++ b/gcc/final.c @@ -1980,6 +1980,18 @@ final (first, file, optimize, prescan) max_uid = INSN_UID (insn); if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) line_note_exists[NOTE_LINE_NUMBER (insn)] = 1; +#ifdef HAVE_cc0 + /* If CC tracking across branches is enabled, record the insn which + jumps to each branch only reached from one place. */ + if (GET_CODE (insn) == JUMP_INSN) + { + rtx lab = JUMP_LABEL (insn); + if (lab && LABEL_NUSES (lab) == 1) + { + LABEL_REFS (lab) = insn; + } + } +#endif } /* Initialize insn_eh_region table if eh is being used. */ @@ -2283,7 +2295,30 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes) ASM_OUTPUT_ALIGN (file, align); #endif } +#ifdef HAVE_cc0 CC_STATUS_INIT; + /* If this label is reached from only one place, set the condition + codes from the instruction just before the branch. */ + if (LABEL_NUSES (insn) == 1) + { + rtx jump = LABEL_REFS (insn); + rtx barrier = prev_nonnote_insn (insn); + rtx prev; + /* If the LABEL_REFS field of this label has been set to point + at a branch, the predecessor of the branch is a regular + insn, and that branch is the only way to reach this label, + set the condition codes based on the branch and its + predecessor. */ + if (barrier && GET_CODE (barrier) == BARRIER + && jump && GET_CODE (jump) == JUMP_INSN + && (prev = prev_nonnote_insn (jump)) + && GET_CODE (prev) == INSN) + { + NOTICE_UPDATE_CC (PATTERN (prev), prev); + NOTICE_UPDATE_CC (PATTERN (jump), jump); + } + } +#endif if (prescan > 0) break; new_block = 1; |