* config/i860/i860.c: Follow spelling conventions.

	* config/i860/i860.h: Likewise.
	* config/sh/sh.h: Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@71126 138bc75d-0d04-0410-961f-82ee72b054a4

4 files changed, 12 insertions, 6 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f830816a7cb..a2af1cd5c4c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2003-09-05  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/i860/i860.c: Follow spelling conventions.
+	* config/i860/i860.h: Likewise.
+	* config/sh/sh.h: Likewise.
+
 2003-09-05  Nitin Yewale  <NitinY@KPITCummins.com>
 
 	* config/h8300/h8300-protos.h: Declare h8300_hard_regno_rename_ok
diff --git a/gcc/config/i860/i860.c b/gcc/config/i860/i860.c
index 5bc32edb3c5..f56de2881d5 100644
--- a/gcc/config/i860/i860.c
+++ b/gcc/config/i860/i860.c
@@ -61,7 +61,7 @@ const char *i860_reg_prefix = I860_REG_PREFIX;
 
 rtx i860_compare_op0, i860_compare_op1;
 
-/* Return non-zero if this pattern, can be evaluated safely, even if it
+/* Return nonzero if this pattern, can be evaluated safely, even if it
    was not asked for.  */
 int
 safe_insn_src_p (rtx op, enum machine_mode mode)
@@ -187,7 +187,7 @@ reg_clobbered_p (rtx reg, rtx in)
   return 0;
 }
 
-/* Return non-zero if OP can be written to without screwing up
+/* Return nonzero if OP can be written to without screwing up
    GCC's model of what's going on.  It is assumed that this operand
    appears in the dest position of a SET insn in a conditional
    branch's delay slot.  AFTER is the label to start looking from.  */
@@ -256,7 +256,7 @@ operand_clobbered_before_used_after (rtx op, rtx after)
 }
 
 
-/* Return non-zero only if OP is a register of mode MODE,
+/* Return nonzero only if OP is a register of mode MODE,
    or const0_rtx.  */
 int
 reg_or_0_operand (rtx op, enum machine_mode mode)
diff --git a/gcc/config/i860/i860.h b/gcc/config/i860/i860.h
index 6f626b59f7f..f5ce0b17c71 100644
--- a/gcc/config/i860/i860.h
+++ b/gcc/config/i860/i860.h
@@ -330,7 +330,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
    : (C) == 'L' ? (unsigned) (VALUE) < 0x10000	\
    : 0)
 
-/* Return non-zero if the given VALUE is acceptable for the
+/* Return nonzero if the given VALUE is acceptable for the
    constraint letter C.  For the i860, constraint letter 'G'
    permits only a floating-point zero value.  */
 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)  	\
@@ -344,7 +344,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
 
    If we are trying to put an integer constant into some register, prefer an
    integer register to an FP register.  If we are trying to put a 
-   non-zero floating-point constant into some register, use an integer
+   nonzero floating-point constant into some register, use an integer
    register if the constant is SFmode and GENERAL_REGS is one of our options.
    Otherwise, put the constant into memory.
 
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index a3aa1dd29ae..3ccfdf9c898 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -1776,7 +1776,7 @@ struct sh_args {
   (((COOKIE) >> CALL_COOKIE_INT_REG_SHIFT (REG)) & ((REG) < 4 ? 7 : 15))
     long call_cookie;
 
-  /* This is set to non-zero when the call in question must use the Renesas ABI,
+  /* This is set to nonzero when the call in question must use the Renesas ABI,
      even without the -mrenesas option.  */
     int renesas_abi;
 };