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author | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-09-30 17:29:56 +0000 |
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committer | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-09-30 17:29:56 +0000 |
commit | faaf3da747a1873f8f6d7a2ef6c0a2da01bca86c (patch) | |
tree | 3e7395204848d03444829130117f1c544496992a | |
parent | 6f42ed8696e24e2e76e9ff6a39d1e7d599f8e77c (diff) | |
download | gcc-faaf3da747a1873f8f6d7a2ef6c0a2da01bca86c.tar.gz |
2016-09-30 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port from trunk
2016-09-21 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/77670
* config/rs6000/predicates.md (invert_fpmask_comparison_operator):
New predicate that matches the ISA 3.0 XSCMP{EQ,GT,GE}DP
instructions when you want to invert the test.
* config/rs6000/rs6000.md (fpmask<mode>): Use the arguments in the
correct order for XXSEL.
(mov<SFDF:mode><SFDF2:mode>cc_invert_p9): Define the inverted test
for using XSCMP{EQ,GT,GE}DP.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-6-branch@240670 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 15 | ||||
-rw-r--r-- | gcc/config/rs6000/predicates.md | 6 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 39 |
3 files changed, 59 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 18374a08bef..4142c1dc95f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2016-09-30 Michael Meissner <meissner@linux.vnet.ibm.com> + + Back port from trunk + + 2016-09-21 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/77670 + * config/rs6000/predicates.md (invert_fpmask_comparison_operator): + New predicate that matches the ISA 3.0 XSCMP{EQ,GT,GE}DP + instructions when you want to invert the test. + * config/rs6000/rs6000.md (fpmask<mode>): Use the arguments in the + correct order for XXSEL. + (mov<SFDF:mode><SFDF2:mode>cc_invert_p9): Define the inverted test + for using XSCMP{EQ,GT,GE}DP. + 2016-09-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Alan Modra <amodra@gmail.com> diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 41694a51f1c..d9957735551 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -1163,6 +1163,12 @@ (define_predicate "fpmask_comparison_operator" (match_code "eq,gt,ge")) +;; Return 1 if OP is a comparison operator suitable for vector/scalar +;; comparisons that generate a 0/-1 mask (i.e. the inverse of +;; fpmask_comparison_operator). +(define_predicate "invert_fpmask_comparison_operator" + (match_code "ne,unlt,unle")) + ;; Return 1 if OP is a comparison operation that is valid for a branch ;; insn, which is true if the corresponding bit in the CC register is set. (define_predicate "branch_positive_comparison_operator" diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 29d82c9f970..65f87e48efe 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4846,6 +4846,43 @@ [(set_attr "length" "8") (set_attr "type" "vecperm")]) +;; Handle inverting the fpmask comparisons. +(define_insn_and_split "*mov<SFDF:mode><SFDF2:mode>cc_invert_p9" + [(set (match_operand:SFDF 0 "vsx_register_operand" "=&<SFDF:Fv>,<SFDF:Fv>") + (if_then_else:SFDF + (match_operator:CCFP 1 "invert_fpmask_comparison_operator" + [(match_operand:SFDF2 2 "vsx_register_operand" "<SFDF2:Fv>,<SFDF2:Fv>") + (match_operand:SFDF2 3 "vsx_register_operand" "<SFDF2:Fv>,<SFDF2:Fv>")]) + (match_operand:SFDF 4 "vsx_register_operand" "<SFDF:Fv>,<SFDF:Fv>") + (match_operand:SFDF 5 "vsx_register_operand" "<SFDF:Fv>,<SFDF:Fv>"))) + (clobber (match_scratch:V2DI 6 "=0,&wa"))] + "TARGET_P9_MINMAX" + "#" + "&& 1" + [(set (match_dup 6) + (if_then_else:V2DI (match_dup 9) + (match_dup 7) + (match_dup 8))) + (set (match_dup 0) + (if_then_else:SFDF (ne (match_dup 6) + (match_dup 8)) + (match_dup 5) + (match_dup 4)))] +{ + rtx op1 = operands[1]; + enum rtx_code cond = reverse_condition_maybe_unordered (GET_CODE (op1)); + + if (GET_CODE (operands[6]) == SCRATCH) + operands[6] = gen_reg_rtx (V2DImode); + + operands[7] = CONSTM1_RTX (V2DImode); + operands[8] = CONST0_RTX (V2DImode); + + operands[9] = gen_rtx_fmt_ee (cond, CCFPmode, operands[2], operands[3]); +} + [(set_attr "length" "8") + (set_attr "type" "vecperm")]) + (define_insn "*fpmask<mode>" [(set (match_operand:V2DI 0 "vsx_register_operand" "=wa") (if_then_else:V2DI @@ -4865,7 +4902,7 @@ (match_operand:SFDF 3 "vsx_register_operand" "<Fv>") (match_operand:SFDF 4 "vsx_register_operand" "<Fv>")))] "TARGET_P9_MINMAX" - "xxsel %x0,%x1,%x3,%x4" + "xxsel %x0,%x4,%x3,%x1" [(set_attr "type" "vecmove")]) |