diff options
| author | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-05-12 10:36:03 +0000 |
|---|---|---|
| committer | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-05-12 10:36:03 +0000 |
| commit | 3b85fd4d7e16648b06b7e35ad5ff7a848d7d0310 (patch) | |
| tree | 855bd6eacf320c431c1ca9e8c309b088a7e196d0 | |
| parent | 8bfd8b247558569e292ee45cbd5aa5024c9a5f13 (diff) | |
| download | gcc-3b85fd4d7e16648b06b7e35ad5ff7a848d7d0310.tar.gz | |
PR target/21501
* arm.c (arm_gen_constant): Sign-extend intermediate values when
synthesizing a constant of the difference of two immediates.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@99608 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 6 |
2 files changed, 9 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fd59b358caf..50a41d1f69a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2005-05-12 Richard Earnshaw <richard.earnshaw@arm.com> + PR target/21501 + * arm.c (arm_gen_constant): Sign-extend intermediate values when + synthesizing a constant of the difference of two immediates. + +2005-05-12 Richard Earnshaw <richard.earnshaw@arm.com> + * arm/vfp.md (negsf2_vfp): Add alternative using integer registers. (negdf2_vfp): Likewise. Convert to define_insn_and_split and split the alternatives using integer registers into the appropriate diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 905187ad2f9..c1d1fa8e897 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1920,8 +1920,8 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, { int topshift = clear_sign_bit_copies & ~1; - temp1 = ((remainder + (0x00800000 >> topshift)) - & (0xff000000 >> topshift)); + temp1 = ARM_SIGN_EXTEND ((remainder + (0x00800000 >> topshift)) + & (0xff000000 >> topshift)); /* If temp1 is zero, then that means the 9 most significant bits of remainder were 1 and we've caused it to overflow. @@ -1930,7 +1930,7 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, if (temp1 == 0 && topshift != 0) temp1 = 0x80000000 >> (topshift - 1); - temp2 = temp1 - remainder; + temp2 = ARM_SIGN_EXTEND (temp1 - remainder); if (const_ok_for_arm (temp2)) { |