diff options
| author | krebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-03-24 14:04:12 +0000 |
|---|---|---|
| committer | krebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-03-24 14:04:12 +0000 |
| commit | 063ed3cf28cc568a6e1f6a518c08c19cb6d6cd23 (patch) | |
| tree | a5ca19d73677900d2c10dbd146a8c9748ff51855 | |
| parent | 80912819e5b90e07e9c5dba736fdedb69aea4488 (diff) | |
| download | gcc-063ed3cf28cc568a6e1f6a518c08c19cb6d6cd23.tar.gz | |
S/390: arch12: New builtins.
This patch implements a set of low-level builtins for instruction
which would otherwise not be emitted by the compiler plus a set of
high-level builtins as defined by the IBM XL compiler. The high-level
builtins will be described in a future revision of the z/OS XL C/C++
Programming Guide.
I'll try to come up with a documentation appropriate for the GCC
manual as well (sometimes in the future).
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390-builtins.def: Add VXE builtins. Add a flags
argument to the overloaded builtin variants. Use the new flag to
deprecate certain builtin variants.
* config/s390/s390-builtin-types.def: Add new builtin types.
* config/s390/s390-builtins.h: Support new flags field for
overloaded builtins.
* config/s390/s390-c.c (OB_DEF_VAR): New flags field.
(s390_macro_to_expand): Enable vector float data type.
(s390_cpu_cpp_builtins_internal): Indicate support of the new
builtins by incrementing the __VEC__ version number.
(s390_expand_overloaded_builtin): Support expansion of vec_xl and
vec_xst.
(s390_resolve_overloaded_builtin): Emit error messages depending
on the builtin flags.
* config/s390/s390.c (s390_expand_builtin): Support additional
flags argument. Change error message to match the messages
emitted in s390-c.c.
* config/s390/s390.md: New UNSPEC_* constants.
(op_type): Add new instruction types.
* config/s390/vecintrin.h: Add new builtins and test data class
constants.
* config/s390/vx-builtins.md (V_HW_32_64): Add V4SF.
(V_HW_4, VEC_HW, VECF_HW): New mode iterators.
(VEC_INEXACT, VEC_NOINEXACT): New constants.
("vec_splats<mode>", "vec_insert<mode>", "vec_promote<mode>")
("vec_insert_and_zero<mode>", "vec_mergeh<mode>")
("vec_mergel<mode>"): V_HW -> VEC_HW.
("vlrlrv16qi", "vstrlrv16qi", "vbpermv16qi", "vec_msumv2di")
("vmslg", "*vftci<mode>_cconly", "vftci<mode>_intcconly")
("*vftci<mode>", "vftci<mode>_intcc", "vec_double_s64")
("vec_double_u64", "vfmin<mode>", "vfmax<mode>"): New definition.
("and_av2df3", "and_cv2df3", "vec_andc_av2df3")
("vec_andc_cv2df3", "xor_av2df3", "xor_cv2df3", "vec_nor_av2df3")
("vec_nor_cv2df3", "ior_av2df3", "ior_cv2df3", "vec_nabs")
("*vftcidb", "*vftcidb_cconly", "vftcidb"): Remove definition.
("vec_all_<fpcmpcc:code>v2df", "vec_any_<fpcmpcc:code>v2df")
("vec_scatter_elementv4si_DI", "vec_cmp<fpcmp:code>v2df")
("vec_di_to_df_s64", "vec_di_to_df_u64", "vec_df_to_di_u64")
("vfidb", "*vldeb", "*vledb", "*vec_cmp<insn_cmp>v2df_cconly")
("vec_cmpeqv2df_cc", "vec_cmpeqv2df_cc", "vec_cmphv2df_cc")
("vec_cmphev2df_cc", "*vec_cmpeqv2df_cc")
("*vec_cmphv2df_cc", "*vec_cmphev2df_cc"): Enable new modes as ...
("vec_all_<fpcmpcc:code><mode>", "vec_any_<fpcmpcc:code><mode>")
("vec_scatter_element<V_HW_4:mode>_DI")
("vec_cmp<fpcmp:code><mode>", "vcdgb", "vcdlgb", "vclgdb")
("vec_fpint<mode>", "vflls")
("vflrd", "*vec_cmp<insn_cmp><mode>_cconly", "vec_cmpeq<mode>_cc")
("vec_cmpeq<mode>_cc", "vec_cmph<mode>_cc", "vec_cmphe<mode>_cc")
("*vec_cmpeq<mode>_cc", "*vec_cmph<mode>_cc")
("*vec_cmphe<mode>_cc"): ... these.
("vec_ctd_s64", "vec_ctsl", "vec_ctul", "vec_st2f"): Use rounding
mode constant instead of magic value.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/target-attribute/tattr-3.c: Adjust error message
and remove the high-level builtin. The error message for the
would prevent compilation from reaching the second.
* gcc.target/s390/target-attribute/tattr-4.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@246459 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 60 | ||||
| -rw-r--r-- | gcc/config/s390/s390-builtin-types.def | 129 | ||||
| -rw-r--r-- | gcc/config/s390/s390-builtins.def | 3501 | ||||
| -rw-r--r-- | gcc/config/s390/s390-builtins.h | 2 | ||||
| -rw-r--r-- | gcc/config/s390/s390-c.c | 39 | ||||
| -rw-r--r-- | gcc/config/s390/s390.c | 17 | ||||
| -rw-r--r-- | gcc/config/s390/s390.md | 20 | ||||
| -rw-r--r-- | gcc/config/s390/vecintrin.h | 125 | ||||
| -rw-r--r-- | gcc/config/s390/vx-builtins.md | 546 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/s390/target-attribute/tattr-3.c | 3 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/s390/target-attribute/tattr-4.c | 6 |
12 files changed, 2543 insertions, 1912 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7083cd982ed..c133ecc6840 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,65 @@ 2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + * config/s390/s390-builtins.def: Add VXE builtins. Add a flags + argument to the overloaded builtin variants. Use the new flag to + deprecate certain builtin variants. + * config/s390/s390-builtin-types.def: Add new builtin types. + * config/s390/s390-builtins.h: Support new flags field for + overloaded builtins. + * config/s390/s390-c.c (OB_DEF_VAR): New flags field. + (s390_macro_to_expand): Enable vector float data type. + (s390_cpu_cpp_builtins_internal): Indicate support of the new + builtins by incrementing the __VEC__ version number. + (s390_expand_overloaded_builtin): Support expansion of vec_xl and + vec_xst. + (s390_resolve_overloaded_builtin): Emit error messages depending + on the builtin flags. + * config/s390/s390.c (s390_expand_builtin): Support additional + flags argument. Change error message to match the messages + emitted in s390-c.c. + * config/s390/s390.md: New UNSPEC_* constants. + (op_type): Add new instruction types. + * config/s390/vecintrin.h: Add new builtins and test data class + constants. + * config/s390/vx-builtins.md (V_HW_32_64): Add V4SF. + (V_HW_4, VEC_HW, VECF_HW): New mode iterators. + (VEC_INEXACT, VEC_NOINEXACT): New constants. + ("vec_splats<mode>", "vec_insert<mode>", "vec_promote<mode>") + ("vec_insert_and_zero<mode>", "vec_mergeh<mode>") + ("vec_mergel<mode>"): V_HW -> VEC_HW. + + ("vlrlrv16qi", "vstrlrv16qi", "vbpermv16qi", "vec_msumv2di") + ("vmslg", "*vftci<mode>_cconly", "vftci<mode>_intcconly") + ("*vftci<mode>", "vftci<mode>_intcc", "vec_double_s64") + ("vec_double_u64", "vfmin<mode>", "vfmax<mode>"): New definition. + + ("and_av2df3", "and_cv2df3", "vec_andc_av2df3") + ("vec_andc_cv2df3", "xor_av2df3", "xor_cv2df3", "vec_nor_av2df3") + ("vec_nor_cv2df3", "ior_av2df3", "ior_cv2df3", "vec_nabs") + ("*vftcidb", "*vftcidb_cconly", "vftcidb"): Remove definition. + + ("vec_all_<fpcmpcc:code>v2df", "vec_any_<fpcmpcc:code>v2df") + ("vec_scatter_elementv4si_DI", "vec_cmp<fpcmp:code>v2df") + ("vec_di_to_df_s64", "vec_di_to_df_u64", "vec_df_to_di_u64") + ("vfidb", "*vldeb", "*vledb", "*vec_cmp<insn_cmp>v2df_cconly") + ("vec_cmpeqv2df_cc", "vec_cmpeqv2df_cc", "vec_cmphv2df_cc") + ("vec_cmphev2df_cc", "*vec_cmpeqv2df_cc") + ("*vec_cmphv2df_cc", "*vec_cmphev2df_cc"): Enable new modes as ... + + ("vec_all_<fpcmpcc:code><mode>", "vec_any_<fpcmpcc:code><mode>") + ("vec_scatter_element<V_HW_4:mode>_DI") + ("vec_cmp<fpcmp:code><mode>", "vcdgb", "vcdlgb", "vclgdb") + ("vec_fpint<mode>", "vflls") + ("vflrd", "*vec_cmp<insn_cmp><mode>_cconly", "vec_cmpeq<mode>_cc") + ("vec_cmpeq<mode>_cc", "vec_cmph<mode>_cc", "vec_cmphe<mode>_cc") + ("*vec_cmpeq<mode>_cc", "*vec_cmph<mode>_cc") + ("*vec_cmphe<mode>_cc"): ... these. + + ("vec_ctd_s64", "vec_ctsl", "vec_ctul", "vec_st2f"): Use rounding + mode constant instead of magic value. + +2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + * config/s390/s390.c (s390_expand_vec_compare): Support other vector floating point modes than just V2DF. (s390_expand_vcond): Likewise. diff --git a/gcc/config/s390/s390-builtin-types.def b/gcc/config/s390/s390-builtin-types.def index b785dc53d62..b7f33030eb9 100644 --- a/gcc/config/s390/s390-builtin-types.def +++ b/gcc/config/s390/s390-builtin-types.def @@ -54,73 +54,74 @@ s390_builtin_types[T6]) DEF_TYPE (BT_INT, integer_type_node, 0) DEF_TYPE (BT_VOID, void_type_node, 0) -DEF_TYPE (BT_FLTCONST, float_type_node, 1) +DEF_TYPE (BT_ULONG, long_unsigned_type_node, 0) DEF_TYPE (BT_UINT64, c_uint64_type_node, 0) -DEF_TYPE (BT_FLT, float_type_node, 0) +DEF_TYPE (BT_INT128, intTI_type_node, 0) DEF_TYPE (BT_UINT, unsigned_type_node, 0) DEF_TYPE (BT_VOIDCONST, void_type_node, 1) -DEF_TYPE (BT_ULONG, long_unsigned_type_node, 0) -DEF_TYPE (BT_INT128, intTI_type_node, 0) DEF_TYPE (BT_USHORTCONST, short_unsigned_type_node, 1) DEF_TYPE (BT_SHORTCONST, short_integer_type_node, 1) -DEF_TYPE (BT_INTCONST, integer_type_node, 1) DEF_TYPE (BT_UCHARCONST, unsigned_char_type_node, 1) -DEF_TYPE (BT_UCHAR, unsigned_char_type_node, 0) +DEF_TYPE (BT_INTCONST, integer_type_node, 1) DEF_TYPE (BT_SCHARCONST, signed_char_type_node, 1) +DEF_TYPE (BT_UCHAR, unsigned_char_type_node, 0) DEF_TYPE (BT_SHORT, short_integer_type_node, 0) DEF_TYPE (BT_LONG, long_integer_type_node, 0) DEF_TYPE (BT_SCHAR, signed_char_type_node, 0) -DEF_TYPE (BT_ULONGLONGCONST, long_long_unsigned_type_node, 1) DEF_TYPE (BT_USHORT, short_unsigned_type_node, 0) -DEF_TYPE (BT_LONGLONG, long_long_integer_type_node, 0) -DEF_TYPE (BT_DBLCONST, double_type_node, 1) DEF_TYPE (BT_ULONGLONG, long_long_unsigned_type_node, 0) +DEF_TYPE (BT_DBLCONST, double_type_node, 1) +DEF_TYPE (BT_FLT, float_type_node, 0) DEF_TYPE (BT_DBL, double_type_node, 0) +DEF_TYPE (BT_FLTCONST, float_type_node, 1) +DEF_TYPE (BT_ULONGLONGCONST, long_long_unsigned_type_node, 1) +DEF_TYPE (BT_LONGLONG, long_long_integer_type_node, 0) DEF_TYPE (BT_LONGLONGCONST, long_long_integer_type_node, 1) DEF_TYPE (BT_UINTCONST, unsigned_type_node, 1) DEF_VECTOR_TYPE (BT_UV2DI, BT_ULONGLONG, 2) -DEF_VECTOR_TYPE (BT_V4SI, BT_INT, 4) +DEF_VECTOR_TYPE (BT_V2DI, BT_LONGLONG, 2) DEF_VECTOR_TYPE (BT_V8HI, BT_SHORT, 8) +DEF_VECTOR_TYPE (BT_V4SI, BT_INT, 4) DEF_VECTOR_TYPE (BT_UV4SI, BT_UINT, 4) DEF_VECTOR_TYPE (BT_V16QI, BT_SCHAR, 16) -DEF_VECTOR_TYPE (BT_V2DF, BT_DBL, 2) -DEF_VECTOR_TYPE (BT_V2DI, BT_LONGLONG, 2) DEF_VECTOR_TYPE (BT_UV8HI, BT_USHORT, 8) +DEF_VECTOR_TYPE (BT_V4SF, BT_FLT, 4) +DEF_VECTOR_TYPE (BT_V2DF, BT_DBL, 2) DEF_VECTOR_TYPE (BT_UV16QI, BT_UCHAR, 16) -DEF_POINTER_TYPE (BT_UCHARPTR, BT_UCHAR) -DEF_POINTER_TYPE (BT_DBLCONSTPTR, BT_DBLCONST) +DEF_POINTER_TYPE (BT_USHORTPTR, BT_USHORT) +DEF_POINTER_TYPE (BT_UINTCONSTPTR, BT_UINTCONST) DEF_POINTER_TYPE (BT_VOIDPTR, BT_VOID) -DEF_POINTER_TYPE (BT_FLTPTR, BT_FLT) +DEF_POINTER_TYPE (BT_ULONGLONGCONSTPTR, BT_ULONGLONGCONST) DEF_POINTER_TYPE (BT_UINT64PTR, BT_UINT64) +DEF_POINTER_TYPE (BT_FLTCONSTPTR, BT_FLTCONST) +DEF_POINTER_TYPE (BT_USHORTCONSTPTR, BT_USHORTCONST) DEF_POINTER_TYPE (BT_SCHARPTR, BT_SCHAR) -DEF_POINTER_TYPE (BT_UINTCONSTPTR, BT_UINTCONST) -DEF_POINTER_TYPE (BT_ULONGLONGCONSTPTR, BT_ULONGLONGCONST) +DEF_POINTER_TYPE (BT_UCHARPTR, BT_UCHAR) +DEF_POINTER_TYPE (BT_VOIDCONSTPTR, BT_VOIDCONST) DEF_POINTER_TYPE (BT_LONGLONGCONSTPTR, BT_LONGLONGCONST) DEF_POINTER_TYPE (BT_SHORTPTR, BT_SHORT) -DEF_POINTER_TYPE (BT_USHORTPTR, BT_USHORT) +DEF_POINTER_TYPE (BT_DBLCONSTPTR, BT_DBLCONST) DEF_POINTER_TYPE (BT_INTPTR, BT_INT) -DEF_POINTER_TYPE (BT_INTCONSTPTR, BT_INTCONST) +DEF_POINTER_TYPE (BT_UINTPTR, BT_UINT) DEF_POINTER_TYPE (BT_LONGLONGPTR, BT_LONGLONG) DEF_POINTER_TYPE (BT_ULONGLONGPTR, BT_ULONGLONG) +DEF_POINTER_TYPE (BT_INTCONSTPTR, BT_INTCONST) DEF_POINTER_TYPE (BT_DBLPTR, BT_DBL) -DEF_POINTER_TYPE (BT_VOIDCONSTPTR, BT_VOIDCONST) -DEF_POINTER_TYPE (BT_USHORTCONSTPTR, BT_USHORTCONST) DEF_POINTER_TYPE (BT_SHORTCONSTPTR, BT_SHORTCONST) DEF_POINTER_TYPE (BT_UCHARCONSTPTR, BT_UCHARCONST) -DEF_POINTER_TYPE (BT_FLTCONSTPTR, BT_FLTCONST) DEF_POINTER_TYPE (BT_SCHARCONSTPTR, BT_SCHARCONST) -DEF_POINTER_TYPE (BT_UINTPTR, BT_UINT) -DEF_DISTINCT_TYPE (BT_BLONGLONG, BT_ULONGLONG) -DEF_DISTINCT_TYPE (BT_BINT, BT_UINT) -DEF_DISTINCT_TYPE (BT_BSHORT, BT_USHORT) +DEF_POINTER_TYPE (BT_FLTPTR, BT_FLT) DEF_DISTINCT_TYPE (BT_BCHAR, BT_UCHAR) -DEF_OPAQUE_VECTOR_TYPE (BT_OV2DI, BT_LONGLONG, 2) -DEF_OPAQUE_VECTOR_TYPE (BT_BV16QI, BT_BCHAR, 16) +DEF_DISTINCT_TYPE (BT_BSHORT, BT_USHORT) +DEF_DISTINCT_TYPE (BT_BINT, BT_UINT) +DEF_DISTINCT_TYPE (BT_BLONGLONG, BT_ULONGLONG) +DEF_OPAQUE_VECTOR_TYPE (BT_BV8HI, BT_BSHORT, 8) DEF_OPAQUE_VECTOR_TYPE (BT_OV4SI, BT_INT, 4) +DEF_OPAQUE_VECTOR_TYPE (BT_BV16QI, BT_BCHAR, 16) +DEF_OPAQUE_VECTOR_TYPE (BT_BV2DI, BT_BLONGLONG, 2) +DEF_OPAQUE_VECTOR_TYPE (BT_OV2DI, BT_LONGLONG, 2) DEF_OPAQUE_VECTOR_TYPE (BT_OUV4SI, BT_UINT, 4) DEF_OPAQUE_VECTOR_TYPE (BT_BV4SI, BT_BINT, 4) -DEF_OPAQUE_VECTOR_TYPE (BT_BV2DI, BT_BLONGLONG, 2) -DEF_OPAQUE_VECTOR_TYPE (BT_BV8HI, BT_BSHORT, 8) DEF_FN_TYPE_0 (BT_FN_INT, BT_INT) DEF_FN_TYPE_0 (BT_FN_UINT, BT_UINT) DEF_FN_TYPE_1 (BT_FN_INT_INT, BT_INT, BT_INT) @@ -150,13 +151,20 @@ DEF_FN_TYPE_1 (BT_FN_V16QI_SCHAR, BT_V16QI, BT_SCHAR) DEF_FN_TYPE_1 (BT_FN_V16QI_UCHAR, BT_V16QI, BT_UCHAR) DEF_FN_TYPE_1 (BT_FN_V16QI_V16QI, BT_V16QI, BT_V16QI) DEF_FN_TYPE_1 (BT_FN_V2DF_DBL, BT_V2DF, BT_DBL) +DEF_FN_TYPE_1 (BT_FN_V2DF_DBLCONSTPTR, BT_V2DF, BT_DBLCONSTPTR) DEF_FN_TYPE_1 (BT_FN_V2DF_FLTCONSTPTR, BT_V2DF, BT_FLTCONSTPTR) +DEF_FN_TYPE_1 (BT_FN_V2DF_UV2DI, BT_V2DF, BT_UV2DI) DEF_FN_TYPE_1 (BT_FN_V2DF_V2DF, BT_V2DF, BT_V2DF) +DEF_FN_TYPE_1 (BT_FN_V2DF_V2DI, BT_V2DF, BT_V2DI) +DEF_FN_TYPE_1 (BT_FN_V2DF_V4SF, BT_V2DF, BT_V4SF) DEF_FN_TYPE_1 (BT_FN_V2DI_SHORT, BT_V2DI, BT_SHORT) DEF_FN_TYPE_1 (BT_FN_V2DI_V16QI, BT_V2DI, BT_V16QI) DEF_FN_TYPE_1 (BT_FN_V2DI_V2DI, BT_V2DI, BT_V2DI) DEF_FN_TYPE_1 (BT_FN_V2DI_V4SI, BT_V2DI, BT_V4SI) DEF_FN_TYPE_1 (BT_FN_V2DI_V8HI, BT_V2DI, BT_V8HI) +DEF_FN_TYPE_1 (BT_FN_V4SF_FLT, BT_V4SF, BT_FLT) +DEF_FN_TYPE_1 (BT_FN_V4SF_FLTCONSTPTR, BT_V4SF, BT_FLTCONSTPTR) +DEF_FN_TYPE_1 (BT_FN_V4SF_V4SF, BT_V4SF, BT_V4SF) DEF_FN_TYPE_1 (BT_FN_V4SI_SHORT, BT_V4SI, BT_SHORT) DEF_FN_TYPE_1 (BT_FN_V4SI_V4SI, BT_V4SI, BT_V4SI) DEF_FN_TYPE_1 (BT_FN_V4SI_V8HI, BT_V4SI, BT_V8HI) @@ -166,6 +174,7 @@ DEF_FN_TYPE_1 (BT_FN_V8HI_V8HI, BT_V8HI, BT_V8HI) DEF_FN_TYPE_1 (BT_FN_VOID_INT, BT_VOID, BT_INT) DEF_FN_TYPE_1 (BT_FN_VOID_UINT, BT_VOID, BT_UINT) DEF_FN_TYPE_2 (BT_FN_DBL_V2DF_INT, BT_DBL, BT_V2DF, BT_INT) +DEF_FN_TYPE_2 (BT_FN_FLT_V4SF_INT, BT_FLT, BT_V4SF, BT_INT) DEF_FN_TYPE_2 (BT_FN_INT128_INT128_INT128, BT_INT128, BT_INT128, BT_INT128) DEF_FN_TYPE_2 (BT_FN_INT_OV4SI_INT, BT_INT, BT_OV4SI, BT_INT) DEF_FN_TYPE_2 (BT_FN_INT_OV4SI_OV4SI, BT_INT, BT_OV4SI, BT_OV4SI) @@ -176,6 +185,7 @@ DEF_FN_TYPE_2 (BT_FN_INT_UV8HI_UV8HI, BT_INT, BT_UV8HI, BT_UV8HI) DEF_FN_TYPE_2 (BT_FN_INT_V16QI_V16QI, BT_INT, BT_V16QI, BT_V16QI) DEF_FN_TYPE_2 (BT_FN_INT_V2DF_V2DF, BT_INT, BT_V2DF, BT_V2DF) DEF_FN_TYPE_2 (BT_FN_INT_V2DI_V2DI, BT_INT, BT_V2DI, BT_V2DI) +DEF_FN_TYPE_2 (BT_FN_INT_V4SF_V4SF, BT_INT, BT_V4SF, BT_V4SF) DEF_FN_TYPE_2 (BT_FN_INT_V4SI_V4SI, BT_INT, BT_V4SI, BT_V4SI) DEF_FN_TYPE_2 (BT_FN_INT_V8HI_V8HI, BT_INT, BT_V8HI, BT_V8HI) DEF_FN_TYPE_2 (BT_FN_INT_VOIDPTR_INT, BT_INT, BT_VOIDPTR, BT_INT) @@ -204,6 +214,7 @@ DEF_FN_TYPE_2 (BT_FN_UV16QI_UV4SI_UV4SI, BT_UV16QI, BT_UV4SI, BT_UV4SI) DEF_FN_TYPE_2 (BT_FN_UV16QI_UV8HI_UV8HI, BT_UV16QI, BT_UV8HI, BT_UV8HI) DEF_FN_TYPE_2 (BT_FN_UV2DI_UCHAR_UCHAR, BT_UV2DI, BT_UCHAR, BT_UCHAR) DEF_FN_TYPE_2 (BT_FN_UV2DI_ULONGLONG_INT, BT_UV2DI, BT_ULONGLONG, BT_INT) +DEF_FN_TYPE_2 (BT_FN_UV2DI_UV16QI_UV16QI, BT_UV2DI, BT_UV16QI, BT_UV16QI) DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UCHAR, BT_UV2DI, BT_UV2DI, BT_UCHAR) DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UINT, BT_UV2DI, BT_UV2DI, BT_UINT) DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UV2DI, BT_UV2DI, BT_UV2DI, BT_UV2DI) @@ -235,6 +246,7 @@ DEF_FN_TYPE_2 (BT_FN_V16QI_V8HI_V8HI, BT_V16QI, BT_V8HI, BT_V8HI) DEF_FN_TYPE_2 (BT_FN_V2DF_DBL_INT, BT_V2DF, BT_DBL, BT_INT) DEF_FN_TYPE_2 (BT_FN_V2DF_UV2DI_INT, BT_V2DF, BT_UV2DI, BT_INT) DEF_FN_TYPE_2 (BT_FN_V2DF_UV4SI_INT, BT_V2DF, BT_UV4SI, BT_INT) +DEF_FN_TYPE_2 (BT_FN_V2DF_V2DF_UCHAR, BT_V2DF, BT_V2DF, BT_UCHAR) DEF_FN_TYPE_2 (BT_FN_V2DF_V2DF_V2DF, BT_V2DF, BT_V2DF, BT_V2DF) DEF_FN_TYPE_2 (BT_FN_V2DF_V2DI_INT, BT_V2DF, BT_V2DI, BT_INT) DEF_FN_TYPE_2 (BT_FN_V2DI_BV2DI_V2DI, BT_V2DI, BT_BV2DI, BT_V2DI) @@ -243,10 +255,14 @@ DEF_FN_TYPE_2 (BT_FN_V2DI_V2DF_INT, BT_V2DI, BT_V2DF, BT_INT) DEF_FN_TYPE_2 (BT_FN_V2DI_V2DF_V2DF, BT_V2DI, BT_V2DF, BT_V2DF) DEF_FN_TYPE_2 (BT_FN_V2DI_V2DI_V2DI, BT_V2DI, BT_V2DI, BT_V2DI) DEF_FN_TYPE_2 (BT_FN_V2DI_V4SI_V4SI, BT_V2DI, BT_V4SI, BT_V4SI) +DEF_FN_TYPE_2 (BT_FN_V4SF_FLT_INT, BT_V4SF, BT_FLT, BT_INT) +DEF_FN_TYPE_2 (BT_FN_V4SF_V4SF_UCHAR, BT_V4SF, BT_V4SF, BT_UCHAR) +DEF_FN_TYPE_2 (BT_FN_V4SF_V4SF_V4SF, BT_V4SF, BT_V4SF, BT_V4SF) DEF_FN_TYPE_2 (BT_FN_V4SI_BV4SI_V4SI, BT_V4SI, BT_BV4SI, BT_V4SI) DEF_FN_TYPE_2 (BT_FN_V4SI_INT_VOIDPTR, BT_V4SI, BT_INT, BT_VOIDPTR) DEF_FN_TYPE_2 (BT_FN_V4SI_UV4SI_UV4SI, BT_V4SI, BT_UV4SI, BT_UV4SI) DEF_FN_TYPE_2 (BT_FN_V4SI_V2DI_V2DI, BT_V4SI, BT_V2DI, BT_V2DI) +DEF_FN_TYPE_2 (BT_FN_V4SI_V4SF_V4SF, BT_V4SI, BT_V4SF, BT_V4SF) DEF_FN_TYPE_2 (BT_FN_V4SI_V4SI_V4SI, BT_V4SI, BT_V4SI, BT_V4SI) DEF_FN_TYPE_2 (BT_FN_V4SI_V8HI_V8HI, BT_V4SI, BT_V8HI, BT_V8HI) DEF_FN_TYPE_2 (BT_FN_V8HI_BV8HI_V8HI, BT_V8HI, BT_BV8HI, BT_V8HI) @@ -256,9 +272,12 @@ DEF_FN_TYPE_2 (BT_FN_V8HI_V4SI_V4SI, BT_V8HI, BT_V4SI, BT_V4SI) DEF_FN_TYPE_2 (BT_FN_V8HI_V8HI_V8HI, BT_V8HI, BT_V8HI, BT_V8HI) DEF_FN_TYPE_2 (BT_FN_VOID_UINT64PTR_UINT64, BT_VOID, BT_UINT64PTR, BT_UINT64) DEF_FN_TYPE_2 (BT_FN_VOID_V2DF_FLTPTR, BT_VOID, BT_V2DF, BT_FLTPTR) +DEF_FN_TYPE_3 (BT_FN_BV2DI_V2DF_USHORT_INTPTR, BT_BV2DI, BT_V2DF, BT_USHORT, BT_INTPTR) +DEF_FN_TYPE_3 (BT_FN_BV4SI_V4SF_USHORT_INTPTR, BT_BV4SI, BT_V4SF, BT_USHORT, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_INT128_INT128_INT128_INT128, BT_INT128, BT_INT128, BT_INT128, BT_INT128) DEF_FN_TYPE_3 (BT_FN_INT_OV4SI_OV4SI_INTPTR, BT_INT, BT_OV4SI, BT_OV4SI, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_OV4SI_INT_OV4SI_INT, BT_OV4SI, BT_INT, BT_OV4SI, BT_INT) +DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_INT_INTPTR, BT_OV4SI, BT_OV4SI, BT_INT, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_OV4SI_INT, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_INT) DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_OV4SI_INTPTR, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_OV4SI_OV4SI, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_OV4SI) @@ -273,6 +292,7 @@ DEF_FN_TYPE_3 (BT_FN_UV16QI_UV8HI_UV8HI_INTPTR, BT_UV16QI, BT_UV8HI, BT_UV8HI, B DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_ULONGLONG_INT, BT_UV2DI, BT_UV2DI, BT_ULONGLONG, BT_INT) DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_UV2DI_INT, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_INT) DEF_FN_TYPE_3 (BT_FN_UV2DI_UV4SI_UV4SI_UV2DI, BT_UV2DI, BT_UV4SI, BT_UV4SI, BT_UV2DI) +DEF_FN_TYPE_3 (BT_FN_UV2DI_V2DF_INT_INT, BT_UV2DI, BT_V2DF, BT_INT, BT_INT) DEF_FN_TYPE_3 (BT_FN_UV4SI_UV2DI_UV2DI_INTPTR, BT_UV4SI, BT_UV2DI, BT_UV2DI, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UINT_INT, BT_UV4SI, BT_UV4SI, BT_UINT, BT_INT) DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UV4SI_INT, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT) @@ -289,16 +309,27 @@ DEF_FN_TYPE_3 (BT_FN_V16QI_UV16QI_UV16QI_INTPTR, BT_V16QI, BT_UV16QI, BT_UV16QI, DEF_FN_TYPE_3 (BT_FN_V16QI_V16QI_V16QI_INTPTR, BT_V16QI, BT_V16QI, BT_V16QI, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_V16QI_V16QI_V16QI_V16QI, BT_V16QI, BT_V16QI, BT_V16QI, BT_V16QI) DEF_FN_TYPE_3 (BT_FN_V16QI_V8HI_V8HI_INTPTR, BT_V16QI, BT_V8HI, BT_V8HI, BT_INTPTR) +DEF_FN_TYPE_3 (BT_FN_V2DF_UV2DI_INT_INT, BT_V2DF, BT_UV2DI, BT_INT, BT_INT) DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_DBL_INT, BT_V2DF, BT_V2DF, BT_DBL, BT_INT) DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_UCHAR_UCHAR, BT_V2DF, BT_V2DF, BT_UCHAR, BT_UCHAR) +DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_V2DF_INT, BT_V2DF, BT_V2DF, BT_V2DF, BT_INT) DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_V2DF_V2DF, BT_V2DF, BT_V2DF, BT_V2DF, BT_V2DF) +DEF_FN_TYPE_3 (BT_FN_V2DF_V2DI_INT_INT, BT_V2DF, BT_V2DI, BT_INT, BT_INT) DEF_FN_TYPE_3 (BT_FN_V2DI_UV2DI_UV2DI_INTPTR, BT_V2DI, BT_UV2DI, BT_UV2DI, BT_INTPTR) +DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_INT_INT, BT_V2DI, BT_V2DF, BT_INT, BT_INT) DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_INT_INTPTR, BT_V2DI, BT_V2DF, BT_INT, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_V2DF_INTPTR, BT_V2DI, BT_V2DF, BT_V2DF, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_V2DI_V2DI_V2DI_INTPTR, BT_V2DI, BT_V2DI, BT_V2DI, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_V2DI_V4SI_V4SI_V2DI, BT_V2DI, BT_V4SI, BT_V4SI, BT_V2DI) +DEF_FN_TYPE_3 (BT_FN_V4SF_V2DF_INT_INT, BT_V4SF, BT_V2DF, BT_INT, BT_INT) +DEF_FN_TYPE_3 (BT_FN_V4SF_V4SF_FLT_INT, BT_V4SF, BT_V4SF, BT_FLT, BT_INT) +DEF_FN_TYPE_3 (BT_FN_V4SF_V4SF_UCHAR_UCHAR, BT_V4SF, BT_V4SF, BT_UCHAR, BT_UCHAR) +DEF_FN_TYPE_3 (BT_FN_V4SF_V4SF_V4SF_INT, BT_V4SF, BT_V4SF, BT_V4SF, BT_INT) +DEF_FN_TYPE_3 (BT_FN_V4SF_V4SF_V4SF_V4SF, BT_V4SF, BT_V4SF, BT_V4SF, BT_V4SF) DEF_FN_TYPE_3 (BT_FN_V4SI_UV4SI_UV4SI_INTPTR, BT_V4SI, BT_UV4SI, BT_UV4SI, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_V4SI_V2DI_V2DI_INTPTR, BT_V4SI, BT_V2DI, BT_V2DI, BT_INTPTR) +DEF_FN_TYPE_3 (BT_FN_V4SI_V4SF_INT_INTPTR, BT_V4SI, BT_V4SF, BT_INT, BT_INTPTR) +DEF_FN_TYPE_3 (BT_FN_V4SI_V4SF_V4SF_INTPTR, BT_V4SI, BT_V4SF, BT_V4SF, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_V4SI_V4SI_V4SI_INTPTR, BT_V4SI, BT_V4SI, BT_V4SI, BT_INTPTR) DEF_FN_TYPE_3 (BT_FN_V4SI_V4SI_V4SI_V4SI, BT_V4SI, BT_V4SI, BT_V4SI, BT_V4SI) DEF_FN_TYPE_3 (BT_FN_V4SI_V8HI_V8HI_V4SI, BT_V4SI, BT_V8HI, BT_V8HI, BT_V4SI) @@ -310,10 +341,12 @@ DEF_FN_TYPE_3 (BT_FN_V8HI_V8HI_V8HI_V8HI, BT_V8HI, BT_V8HI, BT_V8HI, BT_V8HI) DEF_FN_TYPE_3 (BT_FN_VOID_OV4SI_INT_VOIDPTR, BT_VOID, BT_OV4SI, BT_INT, BT_VOIDPTR) DEF_FN_TYPE_3 (BT_FN_VOID_OV4SI_VOIDPTR_UINT, BT_VOID, BT_OV4SI, BT_VOIDPTR, BT_UINT) DEF_FN_TYPE_3 (BT_FN_VOID_V16QI_UINT_VOIDPTR, BT_VOID, BT_V16QI, BT_UINT, BT_VOIDPTR) +DEF_FN_TYPE_4 (BT_FN_INT128_UV2DI_UV2DI_INT128_INT, BT_INT128, BT_UV2DI, BT_UV2DI, BT_INT128, BT_INT) DEF_FN_TYPE_4 (BT_FN_OV4SI_OV4SI_OUV4SI_INTCONSTPTR_UCHAR, BT_OV4SI, BT_OV4SI, BT_OUV4SI, BT_INTCONSTPTR, BT_UCHAR) DEF_FN_TYPE_4 (BT_FN_OV4SI_OV4SI_OV4SI_OV4SI_INTPTR, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_INTPTR) DEF_FN_TYPE_4 (BT_FN_UV16QI_UV16QI_UV16QI_INT_INTPTR, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT, BT_INTPTR) DEF_FN_TYPE_4 (BT_FN_UV16QI_UV16QI_UV16QI_UV16QI_INT, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT) +DEF_FN_TYPE_4 (BT_FN_UV16QI_UV2DI_UV2DI_UV16QI_INT, BT_UV16QI, BT_UV2DI, BT_UV2DI, BT_UV16QI, BT_INT) DEF_FN_TYPE_4 (BT_FN_UV2DI_UV2DI_UV2DI_ULONGLONGCONSTPTR_UCHAR, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_ULONGLONGCONSTPTR, BT_UCHAR) DEF_FN_TYPE_4 (BT_FN_UV2DI_UV2DI_UV2DI_UV2DI_INT, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_INT) DEF_FN_TYPE_4 (BT_FN_UV4SI_UV4SI_UV4SI_INT_INTPTR, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT, BT_INTPTR) @@ -331,6 +364,7 @@ DEF_OV_TYPE (BT_OV_BV16QI_BV16QI, BT_BV16QI, BT_BV16QI) DEF_OV_TYPE (BT_OV_BV16QI_BV16QI_BV16QI, BT_BV16QI, BT_BV16QI, BT_BV16QI) DEF_OV_TYPE (BT_OV_BV16QI_BV16QI_BV16QI_BV16QI, BT_BV16QI, BT_BV16QI, BT_BV16QI, BT_BV16QI) DEF_OV_TYPE (BT_OV_BV16QI_BV16QI_BV16QI_INTPTR, BT_BV16QI, BT_BV16QI, BT_BV16QI, BT_INTPTR) +DEF_OV_TYPE (BT_OV_BV16QI_BV16QI_BV16QI_ULONGLONG, BT_BV16QI, BT_BV16QI, BT_BV16QI, BT_ULONGLONG) DEF_OV_TYPE (BT_OV_BV16QI_BV16QI_BV16QI_UV16QI, BT_BV16QI, BT_BV16QI, BT_BV16QI, BT_UV16QI) DEF_OV_TYPE (BT_OV_BV16QI_BV16QI_INTPTR, BT_BV16QI, BT_BV16QI, BT_INTPTR) DEF_OV_TYPE (BT_OV_BV16QI_BV16QI_UCHAR, BT_BV16QI, BT_BV16QI, BT_UCHAR) @@ -347,6 +381,7 @@ DEF_OV_TYPE (BT_OV_BV16QI_V16QI_V16QI_INTPTR, BT_BV16QI, BT_V16QI, BT_V16QI, BT_ DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_BV2DI, BT_BV2DI, BT_BV2DI, BT_BV2DI) DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_BV2DI_BV2DI, BT_BV2DI, BT_BV2DI, BT_BV2DI, BT_BV2DI) DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_BV2DI_INT, BT_BV2DI, BT_BV2DI, BT_BV2DI, BT_INT) +DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_BV2DI_ULONGLONG, BT_BV2DI, BT_BV2DI, BT_BV2DI, BT_ULONGLONG) DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_BV2DI_UV16QI, BT_BV2DI, BT_BV2DI, BT_BV2DI, BT_UV16QI) DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_BV2DI_UV2DI, BT_BV2DI, BT_BV2DI, BT_BV2DI, BT_UV2DI) DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_UCHAR, BT_BV2DI, BT_BV2DI, BT_UCHAR) @@ -356,6 +391,7 @@ DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_UV4SI, BT_BV2DI, BT_BV2DI, BT_UV4SI) DEF_OV_TYPE (BT_OV_BV2DI_BV2DI_UV8HI, BT_BV2DI, BT_BV2DI, BT_UV8HI) DEF_OV_TYPE (BT_OV_BV2DI_BV4SI, BT_BV2DI, BT_BV4SI) DEF_OV_TYPE (BT_OV_BV2DI_UV2DI_UV2DI, BT_BV2DI, BT_UV2DI, BT_UV2DI) +DEF_OV_TYPE (BT_OV_BV2DI_V2DF_USHORT_INTPTR, BT_BV2DI, BT_V2DF, BT_USHORT, BT_INTPTR) DEF_OV_TYPE (BT_OV_BV2DI_V2DF_V2DF, BT_BV2DI, BT_V2DF, BT_V2DF) DEF_OV_TYPE (BT_OV_BV2DI_V2DI_V2DI, BT_BV2DI, BT_V2DI, BT_V2DI) DEF_OV_TYPE (BT_OV_BV4SI_BV2DI_BV2DI, BT_BV4SI, BT_BV2DI, BT_BV2DI) @@ -363,6 +399,7 @@ DEF_OV_TYPE (BT_OV_BV4SI_BV4SI, BT_BV4SI, BT_BV4SI) DEF_OV_TYPE (BT_OV_BV4SI_BV4SI_BV4SI, BT_BV4SI, BT_BV4SI, BT_BV4SI) DEF_OV_TYPE (BT_OV_BV4SI_BV4SI_BV4SI_BV4SI, BT_BV4SI, BT_BV4SI, BT_BV4SI, BT_BV4SI) DEF_OV_TYPE (BT_OV_BV4SI_BV4SI_BV4SI_INTPTR, BT_BV4SI, BT_BV4SI, BT_BV4SI, BT_INTPTR) +DEF_OV_TYPE (BT_OV_BV4SI_BV4SI_BV4SI_ULONGLONG, BT_BV4SI, BT_BV4SI, BT_BV4SI, BT_ULONGLONG) DEF_OV_TYPE (BT_OV_BV4SI_BV4SI_BV4SI_UV16QI, BT_BV4SI, BT_BV4SI, BT_BV4SI, BT_UV16QI) DEF_OV_TYPE (BT_OV_BV4SI_BV4SI_BV4SI_UV4SI, BT_BV4SI, BT_BV4SI, BT_BV4SI, BT_UV4SI) DEF_OV_TYPE (BT_OV_BV4SI_BV4SI_INTPTR, BT_BV4SI, BT_BV4SI, BT_INTPTR) @@ -376,6 +413,8 @@ DEF_OV_TYPE (BT_OV_BV4SI_UV4SI_UV4SI, BT_BV4SI, BT_UV4SI, BT_UV4SI) DEF_OV_TYPE (BT_OV_BV4SI_UV4SI_UV4SI_INTPTR, BT_BV4SI, BT_UV4SI, BT_UV4SI, BT_INTPTR) DEF_OV_TYPE (BT_OV_BV4SI_UV4SI_UV4SI_UV4SI, BT_BV4SI, BT_UV4SI, BT_UV4SI, BT_UV4SI) DEF_OV_TYPE (BT_OV_BV4SI_UV4SI_UV4SI_UV4SI_INTPTR, BT_BV4SI, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INTPTR) +DEF_OV_TYPE (BT_OV_BV4SI_V4SF_USHORT_INTPTR, BT_BV4SI, BT_V4SF, BT_USHORT, BT_INTPTR) +DEF_OV_TYPE (BT_OV_BV4SI_V4SF_V4SF, BT_BV4SI, BT_V4SF, BT_V4SF) DEF_OV_TYPE (BT_OV_BV4SI_V4SI_V4SI, BT_BV4SI, BT_V4SI, BT_V4SI) DEF_OV_TYPE (BT_OV_BV4SI_V4SI_V4SI_INTPTR, BT_BV4SI, BT_V4SI, BT_V4SI, BT_INTPTR) DEF_OV_TYPE (BT_OV_BV8HI_BV16QI, BT_BV8HI, BT_BV16QI) @@ -384,6 +423,7 @@ DEF_OV_TYPE (BT_OV_BV8HI_BV8HI, BT_BV8HI, BT_BV8HI) DEF_OV_TYPE (BT_OV_BV8HI_BV8HI_BV8HI, BT_BV8HI, BT_BV8HI, BT_BV8HI) DEF_OV_TYPE (BT_OV_BV8HI_BV8HI_BV8HI_BV8HI, BT_BV8HI, BT_BV8HI, BT_BV8HI, BT_BV8HI) DEF_OV_TYPE (BT_OV_BV8HI_BV8HI_BV8HI_INTPTR, BT_BV8HI, BT_BV8HI, BT_BV8HI, BT_INTPTR) +DEF_OV_TYPE (BT_OV_BV8HI_BV8HI_BV8HI_ULONGLONG, BT_BV8HI, BT_BV8HI, BT_BV8HI, BT_ULONGLONG) DEF_OV_TYPE (BT_OV_BV8HI_BV8HI_BV8HI_UV16QI, BT_BV8HI, BT_BV8HI, BT_BV8HI, BT_UV16QI) DEF_OV_TYPE (BT_OV_BV8HI_BV8HI_BV8HI_UV8HI, BT_BV8HI, BT_BV8HI, BT_BV8HI, BT_UV8HI) DEF_OV_TYPE (BT_OV_BV8HI_BV8HI_INTPTR, BT_BV8HI, BT_BV8HI, BT_INTPTR) @@ -398,6 +438,7 @@ DEF_OV_TYPE (BT_OV_BV8HI_UV8HI_UV8HI_UV8HI_INTPTR, BT_BV8HI, BT_UV8HI, BT_UV8HI, DEF_OV_TYPE (BT_OV_BV8HI_V8HI_V8HI, BT_BV8HI, BT_V8HI, BT_V8HI) DEF_OV_TYPE (BT_OV_BV8HI_V8HI_V8HI_INTPTR, BT_BV8HI, BT_V8HI, BT_V8HI, BT_INTPTR) DEF_OV_TYPE (BT_OV_DBL_V2DF_INT, BT_DBL, BT_V2DF, BT_INT) +DEF_OV_TYPE (BT_OV_FLT_V4SF_INT, BT_FLT, BT_V4SF, BT_INT) DEF_OV_TYPE (BT_OV_INT_BV16QI_BV16QI, BT_INT, BT_BV16QI, BT_BV16QI) DEF_OV_TYPE (BT_OV_INT_BV16QI_UV16QI, BT_INT, BT_BV16QI, BT_UV16QI) DEF_OV_TYPE (BT_OV_INT_BV16QI_V16QI, BT_INT, BT_BV16QI, BT_V16QI) @@ -426,6 +467,8 @@ DEF_OV_TYPE (BT_OV_INT_V2DF_V2DF, BT_INT, BT_V2DF, BT_V2DF) DEF_OV_TYPE (BT_OV_INT_V2DI_BV2DI, BT_INT, BT_V2DI, BT_BV2DI) DEF_OV_TYPE (BT_OV_INT_V2DI_UV2DI, BT_INT, BT_V2DI, BT_UV2DI) DEF_OV_TYPE (BT_OV_INT_V2DI_V2DI, BT_INT, BT_V2DI, BT_V2DI) +DEF_OV_TYPE (BT_OV_INT_V4SF_UV4SI, BT_INT, BT_V4SF, BT_UV4SI) +DEF_OV_TYPE (BT_OV_INT_V4SF_V4SF, BT_INT, BT_V4SF, BT_V4SF) DEF_OV_TYPE (BT_OV_INT_V4SI_BV4SI, BT_INT, BT_V4SI, BT_BV4SI) DEF_OV_TYPE (BT_OV_INT_V4SI_INT, BT_INT, BT_V4SI, BT_INT) DEF_OV_TYPE (BT_OV_INT_V4SI_UV4SI, BT_INT, BT_V4SI, BT_UV4SI) @@ -616,6 +659,7 @@ DEF_OV_TYPE (BT_OV_V2DF_DBLCONSTPTR_USHORT, BT_V2DF, BT_DBLCONSTPTR, BT_USHORT) DEF_OV_TYPE (BT_OV_V2DF_DBL_INT, BT_V2DF, BT_DBL, BT_INT) DEF_OV_TYPE (BT_OV_V2DF_DBL_V2DF_INT, BT_V2DF, BT_DBL, BT_V2DF, BT_INT) DEF_OV_TYPE (BT_OV_V2DF_LONG_DBLPTR, BT_V2DF, BT_LONG, BT_DBLPTR) +DEF_OV_TYPE (BT_OV_V2DF_UV2DI, BT_V2DF, BT_UV2DI) DEF_OV_TYPE (BT_OV_V2DF_UV2DI_INT, BT_V2DF, BT_UV2DI, BT_INT) DEF_OV_TYPE (BT_OV_V2DF_V2DF, BT_V2DF, BT_V2DF) DEF_OV_TYPE (BT_OV_V2DF_V2DF_BV2DI, BT_V2DF, BT_V2DF, BT_BV2DI) @@ -628,7 +672,9 @@ DEF_OV_TYPE (BT_OV_V2DF_V2DF_V2DF_INT, BT_V2DF, BT_V2DF, BT_V2DF, BT_INT) DEF_OV_TYPE (BT_OV_V2DF_V2DF_V2DF_ULONGLONG, BT_V2DF, BT_V2DF, BT_V2DF, BT_ULONGLONG) DEF_OV_TYPE (BT_OV_V2DF_V2DF_V2DF_UV16QI, BT_V2DF, BT_V2DF, BT_V2DF, BT_UV16QI) DEF_OV_TYPE (BT_OV_V2DF_V2DF_V2DF_UV2DI, BT_V2DF, BT_V2DF, BT_V2DF, BT_UV2DI) +DEF_OV_TYPE (BT_OV_V2DF_V2DF_V2DF_V2DF, BT_V2DF, BT_V2DF, BT_V2DF, BT_V2DF) DEF_OV_TYPE (BT_OV_V2DF_V2DF_V2DI, BT_V2DF, BT_V2DF, BT_V2DI) +DEF_OV_TYPE (BT_OV_V2DF_V2DI, BT_V2DF, BT_V2DI) DEF_OV_TYPE (BT_OV_V2DF_V2DI_INT, BT_V2DF, BT_V2DI, BT_INT) DEF_OV_TYPE (BT_OV_V2DI_BV2DI_V2DI, BT_V2DI, BT_BV2DI, BT_V2DI) DEF_OV_TYPE (BT_OV_V2DI_LONGLONG, BT_V2DI, BT_LONGLONG) @@ -660,6 +706,26 @@ DEF_OV_TYPE (BT_OV_V2DI_V4SI, BT_V2DI, BT_V4SI) DEF_OV_TYPE (BT_OV_V2DI_V4SI_V4SI, BT_V2DI, BT_V4SI, BT_V4SI) DEF_OV_TYPE (BT_OV_V2DI_V4SI_V4SI_V2DI, BT_V2DI, BT_V4SI, BT_V4SI, BT_V2DI) DEF_OV_TYPE (BT_OV_V2DI_V8HI, BT_V2DI, BT_V8HI) +DEF_OV_TYPE (BT_OV_V4SF_BV4SI_V4SF, BT_V4SF, BT_BV4SI, BT_V4SF) +DEF_OV_TYPE (BT_OV_V4SF_FLT, BT_V4SF, BT_FLT) +DEF_OV_TYPE (BT_OV_V4SF_FLTCONSTPTR, BT_V4SF, BT_FLTCONSTPTR) +DEF_OV_TYPE (BT_OV_V4SF_FLTCONSTPTR_UINT, BT_V4SF, BT_FLTCONSTPTR, BT_UINT) +DEF_OV_TYPE (BT_OV_V4SF_FLTCONSTPTR_USHORT, BT_V4SF, BT_FLTCONSTPTR, BT_USHORT) +DEF_OV_TYPE (BT_OV_V4SF_FLT_INT, BT_V4SF, BT_FLT, BT_INT) +DEF_OV_TYPE (BT_OV_V4SF_FLT_V4SF_INT, BT_V4SF, BT_FLT, BT_V4SF, BT_INT) +DEF_OV_TYPE (BT_OV_V4SF_LONG_FLTPTR, BT_V4SF, BT_LONG, BT_FLTPTR) +DEF_OV_TYPE (BT_OV_V4SF_V4SF, BT_V4SF, BT_V4SF) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_BV4SI, BT_V4SF, BT_V4SF, BT_BV4SI) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_UCHAR, BT_V4SF, BT_V4SF, BT_UCHAR) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_UV4SI, BT_V4SF, BT_V4SF, BT_UV4SI) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_UV4SI_FLTCONSTPTR_UCHAR, BT_V4SF, BT_V4SF, BT_UV4SI, BT_FLTCONSTPTR, BT_UCHAR) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SF, BT_V4SF, BT_V4SF, BT_V4SF) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SF_BV4SI, BT_V4SF, BT_V4SF, BT_V4SF, BT_BV4SI) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SF_ULONGLONG, BT_V4SF, BT_V4SF, BT_V4SF, BT_ULONGLONG) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SF_UV16QI, BT_V4SF, BT_V4SF, BT_V4SF, BT_UV16QI) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SF_UV4SI, BT_V4SF, BT_V4SF, BT_V4SF, BT_UV4SI) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SF_V4SF, BT_V4SF, BT_V4SF, BT_V4SF, BT_V4SF) +DEF_OV_TYPE (BT_OV_V4SF_V4SF_V4SI, BT_V4SF, BT_V4SF, BT_V4SI) DEF_OV_TYPE (BT_OV_V4SI_BV4SI_V4SI, BT_V4SI, BT_BV4SI, BT_V4SI) DEF_OV_TYPE (BT_OV_V4SI_INT, BT_V4SI, BT_INT) DEF_OV_TYPE (BT_OV_V4SI_INTCONSTPTR, BT_V4SI, BT_INTCONSTPTR) @@ -745,6 +811,9 @@ DEF_OV_TYPE (BT_OV_VOID_V2DF_UV2DI_DBLPTR_ULONGLONG, BT_VOID, BT_V2DF, BT_UV2DI, DEF_OV_TYPE (BT_OV_VOID_V2DI_LONGLONGPTR_UINT, BT_VOID, BT_V2DI, BT_LONGLONGPTR, BT_UINT) DEF_OV_TYPE (BT_OV_VOID_V2DI_LONG_LONGLONGPTR, BT_VOID, BT_V2DI, BT_LONG, BT_LONGLONGPTR) DEF_OV_TYPE (BT_OV_VOID_V2DI_UV2DI_LONGLONGPTR_ULONGLONG, BT_VOID, BT_V2DI, BT_UV2DI, BT_LONGLONGPTR, BT_ULONGLONG) +DEF_OV_TYPE (BT_OV_VOID_V4SF_FLTPTR_UINT, BT_VOID, BT_V4SF, BT_FLTPTR, BT_UINT) +DEF_OV_TYPE (BT_OV_VOID_V4SF_LONG_FLTPTR, BT_VOID, BT_V4SF, BT_LONG, BT_FLTPTR) +DEF_OV_TYPE (BT_OV_VOID_V4SF_V4SF_FLTPTR_ULONGLONG, BT_VOID, BT_V4SF, BT_V4SF, BT_FLTPTR, BT_ULONGLONG) DEF_OV_TYPE (BT_OV_VOID_V4SI_INTPTR_UINT, BT_VOID, BT_V4SI, BT_INTPTR, BT_UINT) DEF_OV_TYPE (BT_OV_VOID_V4SI_LONG_INTPTR, BT_VOID, BT_V4SI, BT_LONG, BT_INTPTR) DEF_OV_TYPE (BT_OV_VOID_V4SI_UV4SI_INTPTR_ULONGLONG, BT_VOID, BT_V4SI, BT_UV4SI, BT_INTPTR, BT_ULONGLONG) diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def index bb2d743dd55..9046cb08f94 100644 --- a/gcc/config/s390/s390-builtins.def +++ b/gcc/config/s390/s390-builtins.def @@ -271,6 +271,7 @@ #undef B_HTM #undef B_VX #undef B_VXE +#undef B_DEP #undef BFLAGS_MASK_INIT #define BFLAGS_MASK_INIT (B_INT) @@ -279,15 +280,18 @@ #define B_HTM (1 << 1) /* Builtins requiring the transactional execution facility. */ #define B_VX (1 << 2) /* Builtins requiring the z13 vector extensions. */ #define B_VXE (1 << 3) /* Builtins requiring the arch12 vector extensions. */ +#define B_DEP (1 << 4) /* Builtin has been deprecated and a warning should be issued. */ /* B_DEF defines a standard (not overloaded) builtin B_DEF (<builtin name>, <RTL expander name>, <function attributes>, <builtin flags>, <operand flags, see above>, <fntype>) OB_DEF defines an overloaded builtin OB_DEF (<builtin name>, <start variant>, <end variant>, <builtin flags>, <fntype>) + The builtin flags apply to all its variants and do not need to be mentioned there again. OB_DEF_VAR defines a variant of an overloaded builtin - OB_DEF_VAR (<variant name>, <standard builtin name>, <flags>, <fntype>) */ + OB_DEF_VAR (<variant name>, <standard builtin name>, <flags>, <operand flags>, <fntype>) + flags: Flags applying to all its variants should be mentioned in the OB_DEF line instead. */ B_DEF (tbeginc, tbeginc, 0, B_HTM, 0, BT_FN_INT) @@ -307,13 +311,14 @@ B_DEF (s390_lcbb, lcbb, 0, OB_DEF (s390_vec_step, MAX, MAX, B_VX, BT_FN_INT_INT) OB_DEF (s390_vec_gather_element, s390_vec_gather_element_s32,s390_vec_gather_element_dbl,B_VX,BT_FN_OV4SI_OV4SI_OUV4SI_INTCONSTPTR_UCHAR) -OB_DEF_VAR (s390_vec_gather_element_s32,s390_vgef, O4_U2, BT_OV_V4SI_V4SI_UV4SI_INTCONSTPTR_UCHAR) -OB_DEF_VAR (s390_vec_gather_element_b32,s390_vgef, O4_U2, BT_OV_BV4SI_BV4SI_UV4SI_UINTCONSTPTR_UCHAR) -OB_DEF_VAR (s390_vec_gather_element_u32,s390_vgef, O4_U2, BT_OV_UV4SI_UV4SI_UV4SI_UINTCONSTPTR_UCHAR) -OB_DEF_VAR (s390_vec_gather_element_s64,s390_vgeg, O4_U1, BT_OV_V2DI_V2DI_UV2DI_LONGLONGCONSTPTR_UCHAR) -OB_DEF_VAR (s390_vec_gather_element_b64,s390_vgeg, O4_U1, BT_OV_BV2DI_BV2DI_UV2DI_ULONGLONGCONSTPTR_UCHAR) -OB_DEF_VAR (s390_vec_gather_element_u64,s390_vgeg, O4_U1, BT_OV_UV2DI_UV2DI_UV2DI_ULONGLONGCONSTPTR_UCHAR) -OB_DEF_VAR (s390_vec_gather_element_dbl,s390_vgeg, O4_U1, BT_OV_V2DF_V2DF_UV2DI_DBLCONSTPTR_UCHAR) +OB_DEF_VAR (s390_vec_gather_element_s32,s390_vgef, 0, O4_U2, BT_OV_V4SI_V4SI_UV4SI_INTCONSTPTR_UCHAR) +OB_DEF_VAR (s390_vec_gather_element_b32,s390_vgef, 0, O4_U2, BT_OV_BV4SI_BV4SI_UV4SI_UINTCONSTPTR_UCHAR) +OB_DEF_VAR (s390_vec_gather_element_u32,s390_vgef, 0, O4_U2, BT_OV_UV4SI_UV4SI_UV4SI_UINTCONSTPTR_UCHAR) +OB_DEF_VAR (s390_vec_gather_element_flt,s390_vgef, B_VXE, O4_U2, BT_OV_V4SF_V4SF_UV4SI_FLTCONSTPTR_UCHAR) +OB_DEF_VAR (s390_vec_gather_element_s64,s390_vgeg, 0, O4_U1, BT_OV_V2DI_V2DI_UV2DI_LONGLONGCONSTPTR_UCHAR) +OB_DEF_VAR (s390_vec_gather_element_b64,s390_vgeg, 0, O4_U1, BT_OV_BV2DI_BV2DI_UV2DI_ULONGLONGCONSTPTR_UCHAR) +OB_DEF_VAR (s390_vec_gather_element_u64,s390_vgeg, 0, O4_U1, BT_OV_UV2DI_UV2DI_UV2DI_ULONGLONGCONSTPTR_UCHAR) +OB_DEF_VAR (s390_vec_gather_element_dbl,s390_vgeg, 0, O4_U1, BT_OV_V2DF_V2DF_UV2DI_DBLCONSTPTR_UCHAR) B_DEF (s390_vgef, vec_gather_elementv4si,0, B_VX, O4_U2, BT_FN_UV4SI_UV4SI_UV4SI_UINTCONSTPTR_UCHAR) B_DEF (s390_vgeg, vec_gather_elementv2di,0, B_VX, O4_U1, BT_FN_UV2DI_UV2DI_UV2DI_ULONGLONGCONSTPTR_UCHAR) @@ -323,41 +328,55 @@ B_DEF (s390_vgmh, vec_genmaskv8hi, 0, B_DEF (s390_vgmf, vec_genmaskv4si, 0, B_VX, O1_U8 | O2_U8, BT_FN_UV4SI_UCHAR_UCHAR) B_DEF (s390_vgmg, vec_genmaskv2di, 0, B_VX, O1_U8 | O2_U8, BT_FN_UV2DI_UCHAR_UCHAR) -OB_DEF (s390_vec_xld2, s390_vec_xld2_s8, s390_vec_xld2_dbl, B_VX, BT_FN_V4SI_INT_VOIDPTR) -OB_DEF_VAR (s390_vec_xld2_s8, MAX, O1_LIT, BT_OV_V16QI_LONG_SCHARPTR) /* vl */ -OB_DEF_VAR (s390_vec_xld2_u8, MAX, O1_LIT, BT_OV_UV16QI_LONG_UCHARPTR) /* vl */ -OB_DEF_VAR (s390_vec_xld2_s16, MAX, O1_LIT, BT_OV_V8HI_LONG_SHORTPTR) /* vl */ -OB_DEF_VAR (s390_vec_xld2_u16, MAX, O1_LIT, BT_OV_UV8HI_LONG_USHORTPTR) /* vl */ -OB_DEF_VAR (s390_vec_xld2_s32, MAX, O1_LIT, BT_OV_V4SI_LONG_INTPTR) /* vl */ -OB_DEF_VAR (s390_vec_xld2_u32, MAX, O1_LIT, BT_OV_UV4SI_LONG_UINTPTR) /* vl */ -OB_DEF_VAR (s390_vec_xld2_s64, MAX, O1_LIT, BT_OV_V2DI_LONG_LONGLONGPTR) /* vl */ -OB_DEF_VAR (s390_vec_xld2_u64, MAX, O1_LIT, BT_OV_UV2DI_LONG_ULONGLONGPTR) /* vl */ -OB_DEF_VAR (s390_vec_xld2_dbl, MAX, O1_LIT, BT_OV_V2DF_LONG_DBLPTR) /* vl */ - -OB_DEF (s390_vec_xlw4, s390_vec_xlw4_s8, s390_vec_xlw4_u32, B_VX, BT_FN_V4SI_INT_VOIDPTR) -OB_DEF_VAR (s390_vec_xlw4_s8, MAX, O1_LIT, BT_OV_V16QI_LONG_SCHARPTR) /* vl */ -OB_DEF_VAR (s390_vec_xlw4_u8, MAX, O1_LIT, BT_OV_UV16QI_LONG_UCHARPTR) /* vl */ -OB_DEF_VAR (s390_vec_xlw4_s16, MAX, O1_LIT, BT_OV_V8HI_LONG_SHORTPTR) /* vl */ -OB_DEF_VAR (s390_vec_xlw4_u16, MAX, O1_LIT, BT_OV_UV8HI_LONG_USHORTPTR) /* vl */ -OB_DEF_VAR (s390_vec_xlw4_s32, MAX, O1_LIT, BT_OV_V4SI_LONG_INTPTR) /* vl */ -OB_DEF_VAR (s390_vec_xlw4_u32, MAX, O1_LIT, BT_OV_UV4SI_LONG_UINTPTR) /* vl */ +OB_DEF (s390_vec_xl, s390_vec_xl_s8, s390_vec_xl_dbl, B_VX, BT_FN_V4SI_INT_VOIDPTR) +OB_DEF_VAR (s390_vec_xl_s8, MAX, 0, O1_LIT, BT_OV_V16QI_LONG_SCHARPTR) /* vl */ +OB_DEF_VAR (s390_vec_xl_u8, MAX, 0, O1_LIT, BT_OV_UV16QI_LONG_UCHARPTR) /* vl */ +OB_DEF_VAR (s390_vec_xl_s16, MAX, 0, O1_LIT, BT_OV_V8HI_LONG_SHORTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xl_u16, MAX, 0, O1_LIT, BT_OV_UV8HI_LONG_USHORTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xl_s32, MAX, 0, O1_LIT, BT_OV_V4SI_LONG_INTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xl_u32, MAX, 0, O1_LIT, BT_OV_UV4SI_LONG_UINTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xl_s64, MAX, 0, O1_LIT, BT_OV_V2DI_LONG_LONGLONGPTR) /* vl */ +OB_DEF_VAR (s390_vec_xl_u64, MAX, 0, O1_LIT, BT_OV_UV2DI_LONG_ULONGLONGPTR) /* vl */ +OB_DEF_VAR (s390_vec_xl_flt, MAX, 0, O1_LIT, BT_OV_V4SF_LONG_FLTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xl_dbl, MAX, 0, O1_LIT, BT_OV_V2DF_LONG_DBLPTR) /* vl */ + +OB_DEF (s390_vec_xld2, s390_vec_xld2_s8, s390_vec_xld2_dbl, B_DEP | B_VX, BT_FN_V4SI_INT_VOIDPTR) +OB_DEF_VAR (s390_vec_xld2_s8, MAX, 0, O1_LIT, BT_OV_V16QI_LONG_SCHARPTR) /* vl */ +OB_DEF_VAR (s390_vec_xld2_u8, MAX, 0, O1_LIT, BT_OV_UV16QI_LONG_UCHARPTR) /* vl */ +OB_DEF_VAR (s390_vec_xld2_s16, MAX, 0, O1_LIT, BT_OV_V8HI_LONG_SHORTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xld2_u16, MAX, 0, O1_LIT, BT_OV_UV8HI_LONG_USHORTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xld2_s32, MAX, 0, O1_LIT, BT_OV_V4SI_LONG_INTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xld2_u32, MAX, 0, O1_LIT, BT_OV_UV4SI_LONG_UINTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xld2_s64, MAX, 0, O1_LIT, BT_OV_V2DI_LONG_LONGLONGPTR) /* vl */ +OB_DEF_VAR (s390_vec_xld2_u64, MAX, 0, O1_LIT, BT_OV_UV2DI_LONG_ULONGLONGPTR) /* vl */ +OB_DEF_VAR (s390_vec_xld2_dbl, MAX, 0, O1_LIT, BT_OV_V2DF_LONG_DBLPTR) /* vl */ + +OB_DEF (s390_vec_xlw4, s390_vec_xlw4_s8, s390_vec_xlw4_u32, B_DEP | B_VX, BT_FN_V4SI_INT_VOIDPTR) +OB_DEF_VAR (s390_vec_xlw4_s8, MAX, 0, O1_LIT, BT_OV_V16QI_LONG_SCHARPTR) /* vl */ +OB_DEF_VAR (s390_vec_xlw4_u8, MAX, 0, O1_LIT, BT_OV_UV16QI_LONG_UCHARPTR) /* vl */ +OB_DEF_VAR (s390_vec_xlw4_s16, MAX, 0, O1_LIT, BT_OV_V8HI_LONG_SHORTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xlw4_u16, MAX, 0, O1_LIT, BT_OV_UV8HI_LONG_USHORTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xlw4_s32, MAX, 0, O1_LIT, BT_OV_V4SI_LONG_INTPTR) /* vl */ +OB_DEF_VAR (s390_vec_xlw4_u32, MAX, 0, O1_LIT, BT_OV_UV4SI_LONG_UINTPTR) /* vl */ OB_DEF (s390_vec_splats, s390_vec_splats_s8, s390_vec_splats_dbl,B_VX, BT_FN_OV4SI_INT) -OB_DEF_VAR (s390_vec_splats_s8, s390_vlrepb, 0, BT_OV_V16QI_SCHAR) -OB_DEF_VAR (s390_vec_splats_u8, s390_vlrepb, 0, BT_OV_UV16QI_UCHAR) -OB_DEF_VAR (s390_vec_splats_s16, s390_vlreph, 0, BT_OV_V8HI_SHORT) -OB_DEF_VAR (s390_vec_splats_u16, s390_vlreph, 0, BT_OV_UV8HI_USHORT) -OB_DEF_VAR (s390_vec_splats_s32, s390_vlrepf, 0, BT_OV_V4SI_INT) -OB_DEF_VAR (s390_vec_splats_u32, s390_vlrepf, 0, BT_OV_UV4SI_UINT) -OB_DEF_VAR (s390_vec_splats_s64, s390_vlrepg, 0, BT_OV_V2DI_LONGLONG) -OB_DEF_VAR (s390_vec_splats_u64, s390_vlrepg, 0, BT_OV_UV2DI_ULONGLONG) -OB_DEF_VAR (s390_vec_splats_dbl, s390_vlrepg_dbl, 0, BT_OV_V2DF_DBL) /* vlrepg */ +OB_DEF_VAR (s390_vec_splats_s8, s390_vlrepb, 0, 0, BT_OV_V16QI_SCHAR) +OB_DEF_VAR (s390_vec_splats_u8, s390_vlrepb, 0, 0, BT_OV_UV16QI_UCHAR) +OB_DEF_VAR (s390_vec_splats_s16, s390_vlreph, 0, 0, BT_OV_V8HI_SHORT) +OB_DEF_VAR (s390_vec_splats_u16, s390_vlreph, 0, 0, BT_OV_UV8HI_USHORT) +OB_DEF_VAR (s390_vec_splats_s32, s390_vlrepf, 0, 0, BT_OV_V4SI_INT) +OB_DEF_VAR (s390_vec_splats_u32, s390_vlrepf, 0, 0, BT_OV_UV4SI_UINT) +OB_DEF_VAR (s390_vec_splats_s64, s390_vlrepg, 0, 0, BT_OV_V2DI_LONGLONG) +OB_DEF_VAR (s390_vec_splats_u64, s390_vlrepg, 0, 0, BT_OV_UV2DI_ULONGLONG) +OB_DEF_VAR (s390_vec_splats_flt, s390_vlrepf_flt, B_VXE, 0, BT_OV_V4SF_FLT) /* vlrepf */ +OB_DEF_VAR (s390_vec_splats_dbl, s390_vlrepg_dbl, 0, 0, BT_OV_V2DF_DBL) /* vlrepg */ B_DEF (s390_vlrepb, vec_splatsv16qi, 0, B_VX, 0, BT_FN_UV16QI_UCHAR) B_DEF (s390_vlreph, vec_splatsv8hi, 0, B_VX, 0, BT_FN_UV8HI_USHORT) B_DEF (s390_vlrepf, vec_splatsv4si, 0, B_VX, 0, BT_FN_UV4SI_UINT) +B_DEF (s390_vlrepf_flt, vec_splatsv4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SF_FLT) B_DEF (s390_vlrepg, vec_splatsv2di, 0, B_VX, 0, BT_FN_UV2DI_ULONGLONG) -B_DEF (s390_vlrepg_dbl, vec_splatsv2df, 0, B_VX | B_INT, 0, BT_FN_V2DF_DBL) +B_DEF (s390_vlrepg_dbl, vec_splatsv2df, 0, B_INT | B_VX, 0, BT_FN_V2DF_DBL) B_DEF (s390_vrepib, vec_splatsv16qi, 0, B_VX, O1_U8, BT_FN_V16QI_UCHAR) B_DEF (s390_vrepih, vec_splatsv8hi, 0, B_VX, O1_S16, BT_FN_V8HI_SHORT) B_DEF (s390_vrepif, vec_splatsv4si, 0, B_VX, O1_S16, BT_FN_V4SI_SHORT) @@ -372,173 +391,194 @@ B_DEF (s390_vec_splat_s32, vec_splatsv4si, 0, B_DEF (s390_vec_splat_u64, vec_splatsv2di, 0, B_VX, O1_U16, BT_FN_UV2DI_USHORT) B_DEF (s390_vec_splat_s64, vec_splatsv2di, 0, B_VX, O1_S16, BT_FN_V2DI_SHORT) +/* First two operands are swapped in s390-c.c */ OB_DEF (s390_vec_insert, s390_vec_insert_s8, s390_vec_insert_dbl,B_VX, BT_FN_OV4SI_INT_OV4SI_INT) -OB_DEF_VAR (s390_vec_insert_s8, s390_vlvgb, O3_ELEM, BT_OV_V16QI_SCHAR_V16QI_INT) -OB_DEF_VAR (s390_vec_insert_u8, s390_vlvgb, O3_ELEM, BT_OV_UV16QI_UCHAR_UV16QI_INT) -OB_DEF_VAR (s390_vec_insert_b8, s390_vlvgb, O3_ELEM, BT_OV_UV16QI_UCHAR_BV16QI_INT) -OB_DEF_VAR (s390_vec_insert_s16, s390_vlvgh, O3_ELEM, BT_OV_V8HI_SHORT_V8HI_INT) -OB_DEF_VAR (s390_vec_insert_u16, s390_vlvgh, O3_ELEM, BT_OV_UV8HI_USHORT_UV8HI_INT) -OB_DEF_VAR (s390_vec_insert_b16, s390_vlvgh, O3_ELEM, BT_OV_UV8HI_USHORT_BV8HI_INT) -OB_DEF_VAR (s390_vec_insert_s32, s390_vlvgf, O3_ELEM, BT_OV_V4SI_INT_V4SI_INT) -OB_DEF_VAR (s390_vec_insert_u32, s390_vlvgf, O3_ELEM, BT_OV_UV4SI_UINT_UV4SI_INT) -OB_DEF_VAR (s390_vec_insert_b32, s390_vlvgf, O3_ELEM, BT_OV_UV4SI_UINT_BV4SI_INT) -OB_DEF_VAR (s390_vec_insert_s64, s390_vlvgg, O3_ELEM, BT_OV_V2DI_LONGLONG_V2DI_INT) -OB_DEF_VAR (s390_vec_insert_u64, s390_vlvgg, O3_ELEM, BT_OV_UV2DI_ULONGLONG_UV2DI_INT) -OB_DEF_VAR (s390_vec_insert_b64, s390_vlvgg, O3_ELEM, BT_OV_UV2DI_ULONGLONG_BV2DI_INT) -OB_DEF_VAR (s390_vec_insert_dbl, s390_vlvgg_dbl, O3_ELEM, BT_OV_V2DF_DBL_V2DF_INT) +OB_DEF_VAR (s390_vec_insert_s8, s390_vlvgb, 0, O3_ELEM, BT_OV_V16QI_SCHAR_V16QI_INT) +OB_DEF_VAR (s390_vec_insert_u8, s390_vlvgb, 0, O3_ELEM, BT_OV_UV16QI_UCHAR_UV16QI_INT) +OB_DEF_VAR (s390_vec_insert_b8, s390_vlvgb, 0, O3_ELEM, BT_OV_UV16QI_UCHAR_BV16QI_INT) +OB_DEF_VAR (s390_vec_insert_s16, s390_vlvgh, 0, O3_ELEM, BT_OV_V8HI_SHORT_V8HI_INT) +OB_DEF_VAR (s390_vec_insert_u16, s390_vlvgh, 0, O3_ELEM, BT_OV_UV8HI_USHORT_UV8HI_INT) +OB_DEF_VAR (s390_vec_insert_b16, s390_vlvgh, 0, O3_ELEM, BT_OV_UV8HI_USHORT_BV8HI_INT) +OB_DEF_VAR (s390_vec_insert_s32, s390_vlvgf, 0, O3_ELEM, BT_OV_V4SI_INT_V4SI_INT) +OB_DEF_VAR (s390_vec_insert_u32, s390_vlvgf, 0, O3_ELEM, BT_OV_UV4SI_UINT_UV4SI_INT) +OB_DEF_VAR (s390_vec_insert_b32, s390_vlvgf, 0, O3_ELEM, BT_OV_UV4SI_UINT_BV4SI_INT) +OB_DEF_VAR (s390_vec_insert_s64, s390_vlvgg, 0, O3_ELEM, BT_OV_V2DI_LONGLONG_V2DI_INT) +OB_DEF_VAR (s390_vec_insert_u64, s390_vlvgg, 0, O3_ELEM, BT_OV_UV2DI_ULONGLONG_UV2DI_INT) +OB_DEF_VAR (s390_vec_insert_b64, s390_vlvgg, 0, O3_ELEM, BT_OV_UV2DI_ULONGLONG_BV2DI_INT) +OB_DEF_VAR (s390_vec_insert_flt, s390_vlvgf_flt, B_VXE, O3_ELEM, BT_OV_V4SF_FLT_V4SF_INT) /* vlvgf */ +OB_DEF_VAR (s390_vec_insert_dbl, s390_vlvgg_dbl, 0, O3_ELEM, BT_OV_V2DF_DBL_V2DF_INT) /* vlvgg */ B_DEF (s390_vlvgb, vec_insertv16qi, 0, B_VX, O3_ELEM, BT_FN_UV16QI_UV16QI_UCHAR_INT) B_DEF (s390_vlvgh, vec_insertv8hi, 0, B_VX, O3_ELEM, BT_FN_UV8HI_UV8HI_USHORT_INT) B_DEF (s390_vlvgf, vec_insertv4si, 0, B_VX, O3_ELEM, BT_FN_UV4SI_UV4SI_UINT_INT) B_DEF (s390_vlvgg, vec_insertv2di, 0, B_VX, O3_ELEM, BT_FN_UV2DI_UV2DI_ULONGLONG_INT) -B_DEF (s390_vlvgg_dbl, vec_insertv2df, 0, B_VX | B_INT, O3_ELEM, BT_FN_V2DF_V2DF_DBL_INT) +B_DEF (s390_vlvgf_flt, vec_insertv4sf, 0, B_INT | B_VXE, O3_ELEM, BT_FN_V4SF_V4SF_FLT_INT) +B_DEF (s390_vlvgg_dbl, vec_insertv2df, 0, B_INT | B_VX, O3_ELEM, BT_FN_V2DF_V2DF_DBL_INT) OB_DEF (s390_vec_promote, s390_vec_promote_s8,s390_vec_promote_dbl,B_VX, BT_FN_OV4SI_INT_INT) -OB_DEF_VAR (s390_vec_promote_s8, s390_vlvgb_noin, O2_ELEM, BT_OV_V16QI_SCHAR_INT) /* vlvgb */ -OB_DEF_VAR (s390_vec_promote_u8, s390_vlvgb_noin, O2_ELEM, BT_OV_UV16QI_UCHAR_INT) /* vlvgb */ -OB_DEF_VAR (s390_vec_promote_s16, s390_vlvgh_noin, O2_ELEM, BT_OV_V8HI_SHORT_INT) /* vlvgh */ -OB_DEF_VAR (s390_vec_promote_u16, s390_vlvgh_noin, O2_ELEM, BT_OV_UV8HI_USHORT_INT) /* vlvgh */ -OB_DEF_VAR (s390_vec_promote_s32, s390_vlvgf_noin, O2_ELEM, BT_OV_V4SI_INT_INT) /* vlvgf */ -OB_DEF_VAR (s390_vec_promote_u32, s390_vlvgf_noin, O2_ELEM, BT_OV_UV4SI_UINT_INT) /* vlvgf */ -OB_DEF_VAR (s390_vec_promote_s64, s390_vlvgg_noin, O2_ELEM, BT_OV_V2DI_LONGLONG_INT) /* vlvgg */ -OB_DEF_VAR (s390_vec_promote_u64, s390_vlvgg_noin, O2_ELEM, BT_OV_UV2DI_ULONGLONG_INT) /* vlvgg */ -OB_DEF_VAR (s390_vec_promote_dbl, s390_vlvgg_dbl_noin,O2_ELEM, BT_OV_V2DF_DBL_INT) /* vlvgg */ - -B_DEF (s390_vlvgb_noin, vec_promotev16qi, 0, B_VX | B_INT, 0, BT_FN_UV16QI_UCHAR_INT) -B_DEF (s390_vlvgh_noin, vec_promotev8hi, 0, B_VX | B_INT, 0, BT_FN_UV8HI_USHORT_INT) -B_DEF (s390_vlvgf_noin, vec_promotev4si, 0, B_VX | B_INT, 0, BT_FN_UV4SI_UINT_INT) -B_DEF (s390_vlvgg_noin, vec_promotev2di, 0, B_VX | B_INT, 0, BT_FN_UV2DI_ULONGLONG_INT) -B_DEF (s390_vlvgg_dbl_noin, vec_promotev2df, 0, B_VX | B_INT, 0, BT_FN_V2DF_DBL_INT) +OB_DEF_VAR (s390_vec_promote_s8, s390_vlvgb_noin, 0, O2_ELEM, BT_OV_V16QI_SCHAR_INT) /* vlvgb */ +OB_DEF_VAR (s390_vec_promote_u8, s390_vlvgb_noin, 0, O2_ELEM, BT_OV_UV16QI_UCHAR_INT) /* vlvgb */ +OB_DEF_VAR (s390_vec_promote_s16, s390_vlvgh_noin, 0, O2_ELEM, BT_OV_V8HI_SHORT_INT) /* vlvgh */ +OB_DEF_VAR (s390_vec_promote_u16, s390_vlvgh_noin, 0, O2_ELEM, BT_OV_UV8HI_USHORT_INT) /* vlvgh */ +OB_DEF_VAR (s390_vec_promote_s32, s390_vlvgf_noin, 0, O2_ELEM, BT_OV_V4SI_INT_INT) /* vlvgf */ +OB_DEF_VAR (s390_vec_promote_u32, s390_vlvgf_noin, 0, O2_ELEM, BT_OV_UV4SI_UINT_INT) /* vlvgf */ +OB_DEF_VAR (s390_vec_promote_s64, s390_vlvgg_noin, 0, O2_ELEM, BT_OV_V2DI_LONGLONG_INT) /* vlvgg */ +OB_DEF_VAR (s390_vec_promote_u64, s390_vlvgg_noin, 0, O2_ELEM, BT_OV_UV2DI_ULONGLONG_INT) /* vlvgg */ +OB_DEF_VAR (s390_vec_promote_flt, s390_vlvgf_flt_noin,B_VXE, O2_ELEM, BT_OV_V4SF_FLT_INT) /* vlvgf */ +OB_DEF_VAR (s390_vec_promote_dbl, s390_vlvgg_dbl_noin,0, O2_ELEM, BT_OV_V2DF_DBL_INT) /* vlvgg */ + +B_DEF (s390_vlvgb_noin, vec_promotev16qi, 0, B_INT | B_VX, 0, BT_FN_UV16QI_UCHAR_INT) +B_DEF (s390_vlvgh_noin, vec_promotev8hi, 0, B_INT | B_VX, 0, BT_FN_UV8HI_USHORT_INT) +B_DEF (s390_vlvgf_noin, vec_promotev4si, 0, B_INT | B_VX, 0, BT_FN_UV4SI_UINT_INT) +B_DEF (s390_vlvgg_noin, vec_promotev2di, 0, B_INT | B_VX, 0, BT_FN_UV2DI_ULONGLONG_INT) +B_DEF (s390_vlvgf_flt_noin, vec_promotev4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SF_FLT_INT) +B_DEF (s390_vlvgg_dbl_noin, vec_promotev2df, 0, B_INT | B_VX, 0, BT_FN_V2DF_DBL_INT) OB_DEF (s390_vec_extract, s390_vec_extract_s8,s390_vec_extract_dbl,B_VX, BT_FN_INT_OV4SI_INT) -OB_DEF_VAR (s390_vec_extract_s8, s390_vlgvb, O2_ELEM, BT_OV_SCHAR_V16QI_INT) -OB_DEF_VAR (s390_vec_extract_u8, s390_vlgvb, O2_ELEM, BT_OV_UCHAR_UV16QI_INT) -OB_DEF_VAR (s390_vec_extract_b8, s390_vlgvb, O2_ELEM, BT_OV_UCHAR_BV16QI_INT) -OB_DEF_VAR (s390_vec_extract_s16, s390_vlgvh, O2_ELEM, BT_OV_SHORT_V8HI_INT) -OB_DEF_VAR (s390_vec_extract_u16, s390_vlgvh, O2_ELEM, BT_OV_USHORT_UV8HI_INT) -OB_DEF_VAR (s390_vec_extract_b16, s390_vlgvh, O2_ELEM, BT_OV_USHORT_BV8HI_INT) -OB_DEF_VAR (s390_vec_extract_s32, s390_vlgvf, O2_ELEM, BT_OV_INT_V4SI_INT) -OB_DEF_VAR (s390_vec_extract_u32, s390_vlgvf, O2_ELEM, BT_OV_UINT_UV4SI_INT) -OB_DEF_VAR (s390_vec_extract_b32, s390_vlgvf, O2_ELEM, BT_OV_UINT_BV4SI_INT) -OB_DEF_VAR (s390_vec_extract_s64, s390_vlgvg, O2_ELEM, BT_OV_LONGLONG_V2DI_INT) -OB_DEF_VAR (s390_vec_extract_u64, s390_vlgvg, O2_ELEM, BT_OV_ULONGLONG_UV2DI_INT) -OB_DEF_VAR (s390_vec_extract_b64, s390_vlgvg, O2_ELEM, BT_OV_ULONGLONG_BV2DI_INT) -OB_DEF_VAR (s390_vec_extract_dbl, s390_vlgvg_dbl, O2_ELEM, BT_OV_DBL_V2DF_INT) /* vlgvg */ +OB_DEF_VAR (s390_vec_extract_s8, s390_vlgvb, 0, O2_ELEM, BT_OV_SCHAR_V16QI_INT) +OB_DEF_VAR (s390_vec_extract_u8, s390_vlgvb, 0, O2_ELEM, BT_OV_UCHAR_UV16QI_INT) +OB_DEF_VAR (s390_vec_extract_b8, s390_vlgvb, 0, O2_ELEM, BT_OV_UCHAR_BV16QI_INT) +OB_DEF_VAR (s390_vec_extract_s16, s390_vlgvh, 0, O2_ELEM, BT_OV_SHORT_V8HI_INT) +OB_DEF_VAR (s390_vec_extract_u16, s390_vlgvh, 0, O2_ELEM, BT_OV_USHORT_UV8HI_INT) +OB_DEF_VAR (s390_vec_extract_b16, s390_vlgvh, 0, O2_ELEM, BT_OV_USHORT_BV8HI_INT) +OB_DEF_VAR (s390_vec_extract_s32, s390_vlgvf, 0, O2_ELEM, BT_OV_INT_V4SI_INT) +OB_DEF_VAR (s390_vec_extract_u32, s390_vlgvf, 0, O2_ELEM, BT_OV_UINT_UV4SI_INT) +OB_DEF_VAR (s390_vec_extract_b32, s390_vlgvf, 0, O2_ELEM, BT_OV_UINT_BV4SI_INT) +OB_DEF_VAR (s390_vec_extract_flt, s390_vlgvf_flt, B_VXE, O2_ELEM, BT_OV_FLT_V4SF_INT) +OB_DEF_VAR (s390_vec_extract_s64, s390_vlgvg, 0, O2_ELEM, BT_OV_LONGLONG_V2DI_INT) +OB_DEF_VAR (s390_vec_extract_u64, s390_vlgvg, 0, O2_ELEM, BT_OV_ULONGLONG_UV2DI_INT) +OB_DEF_VAR (s390_vec_extract_b64, s390_vlgvg, 0, O2_ELEM, BT_OV_ULONGLONG_BV2DI_INT) +OB_DEF_VAR (s390_vec_extract_dbl, s390_vlgvg_dbl, 0, O2_ELEM, BT_OV_DBL_V2DF_INT) /* vlgvg */ B_DEF (s390_vlgvb, vec_extractv16qi, 0, B_VX, O2_ELEM, BT_FN_UCHAR_UV16QI_INT) B_DEF (s390_vlgvh, vec_extractv8hi, 0, B_VX, O2_ELEM, BT_FN_USHORT_UV8HI_INT) B_DEF (s390_vlgvf, vec_extractv4si, 0, B_VX, O2_ELEM, BT_FN_UINT_UV4SI_INT) +B_DEF (s390_vlgvf_flt, vec_extractv4sf, 0, B_INT | B_VXE, O2_ELEM, BT_FN_FLT_V4SF_INT) B_DEF (s390_vlgvg, vec_extractv2di, 0, B_VX, O2_ELEM, BT_FN_ULONGLONG_UV2DI_INT) -B_DEF (s390_vlgvg_dbl, vec_extractv2df, 0, B_VX | B_INT, O2_ELEM, BT_FN_DBL_V2DF_INT) +B_DEF (s390_vlgvg_dbl, vec_extractv2df, 0, B_INT | B_VX, O2_ELEM, BT_FN_DBL_V2DF_INT) OB_DEF (s390_vec_insert_and_zero, s390_vec_insert_and_zero_s8,s390_vec_insert_and_zero_dbl,B_VX,BT_FN_OV4SI_INTCONSTPTR) -OB_DEF_VAR (s390_vec_insert_and_zero_s8,s390_vllezb, 0, BT_OV_V16QI_SCHARCONSTPTR) -OB_DEF_VAR (s390_vec_insert_and_zero_u8,s390_vllezb, 0, BT_OV_UV16QI_UCHARCONSTPTR) -OB_DEF_VAR (s390_vec_insert_and_zero_s16,s390_vllezh, 0, BT_OV_V8HI_SHORTCONSTPTR) -OB_DEF_VAR (s390_vec_insert_and_zero_u16,s390_vllezh, 0, BT_OV_UV8HI_USHORTCONSTPTR) -OB_DEF_VAR (s390_vec_insert_and_zero_s32,s390_vllezf, 0, BT_OV_V4SI_INTCONSTPTR) -OB_DEF_VAR (s390_vec_insert_and_zero_u32,s390_vllezf, 0, BT_OV_UV4SI_UINTCONSTPTR) -OB_DEF_VAR (s390_vec_insert_and_zero_s64,s390_vllezg, 0, BT_OV_V2DI_LONGLONGCONSTPTR) -OB_DEF_VAR (s390_vec_insert_and_zero_u64,s390_vllezg, 0, BT_OV_UV2DI_ULONGLONGCONSTPTR) -OB_DEF_VAR (s390_vec_insert_and_zero_dbl,s390_vllezg, 0, BT_OV_V2DF_DBLCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_s8,s390_vllezb, 0, 0, BT_OV_V16QI_SCHARCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_u8,s390_vllezb, 0, 0, BT_OV_UV16QI_UCHARCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_s16,s390_vllezh, 0, 0, BT_OV_V8HI_SHORTCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_u16,s390_vllezh, 0, 0, BT_OV_UV8HI_USHORTCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_s32,s390_vllezf, 0, 0, BT_OV_V4SI_INTCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_u32,s390_vllezf, 0, 0, BT_OV_UV4SI_UINTCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_flt,s390_vllezf_flt, B_VXE, 0, BT_OV_V4SF_FLTCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_s64,s390_vllezg, 0, 0, BT_OV_V2DI_LONGLONGCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_u64,s390_vllezg, 0, 0, BT_OV_UV2DI_ULONGLONGCONSTPTR) +OB_DEF_VAR (s390_vec_insert_and_zero_dbl,s390_vllezg_dbl, 0, 0, BT_OV_V2DF_DBLCONSTPTR) B_DEF (s390_vllezb, vec_insert_and_zerov16qi,0, B_VX, 0, BT_FN_UV16QI_UCHARCONSTPTR) B_DEF (s390_vllezh, vec_insert_and_zerov8hi,0, B_VX, 0, BT_FN_UV8HI_USHORTCONSTPTR) B_DEF (s390_vllezf, vec_insert_and_zerov4si,0, B_VX, 0, BT_FN_UV4SI_UINTCONSTPTR) +B_DEF (s390_vllezf_flt, vec_insert_and_zerov4sf,0, B_INT | B_VXE, 0, BT_FN_V4SF_FLTCONSTPTR) B_DEF (s390_vllezg, vec_insert_and_zerov2di,0, B_VX, 0, BT_FN_UV2DI_ULONGLONGCONSTPTR) +B_DEF (s390_vllezg_dbl, vec_insert_and_zerov2df,0, B_INT | B_VX, 0, BT_FN_V2DF_DBLCONSTPTR) +/* The 2nd operand will by translated in s390-c.c from 64, 128, 256, ... to 0, 1, 2, ... */ OB_DEF (s390_vec_load_bndry, s390_vec_load_bndry_s8,s390_vec_load_bndry_dbl,B_VX, BT_FN_OV4SI_INTCONSTPTR_INT) -OB_DEF_VAR (s390_vec_load_bndry_s8, s390_vlbb, O2_U16, BT_OV_V16QI_SCHARCONSTPTR_USHORT) -OB_DEF_VAR (s390_vec_load_bndry_u8, s390_vlbb, O2_U16, BT_OV_UV16QI_UCHARCONSTPTR_USHORT) -OB_DEF_VAR (s390_vec_load_bndry_s16, s390_vlbb, O2_U16, BT_OV_V8HI_SHORTCONSTPTR_USHORT) -OB_DEF_VAR (s390_vec_load_bndry_u16, s390_vlbb, O2_U16, BT_OV_UV8HI_USHORTCONSTPTR_USHORT) -OB_DEF_VAR (s390_vec_load_bndry_s32, s390_vlbb, O2_U16, BT_OV_V4SI_INTCONSTPTR_USHORT) -OB_DEF_VAR (s390_vec_load_bndry_u32, s390_vlbb, O2_U16, BT_OV_UV4SI_UINTCONSTPTR_USHORT) -OB_DEF_VAR (s390_vec_load_bndry_s64, s390_vlbb, O2_U16, BT_OV_V2DI_LONGLONGCONSTPTR_USHORT) -OB_DEF_VAR (s390_vec_load_bndry_u64, s390_vlbb, O2_U16, BT_OV_UV2DI_ULONGLONGCONSTPTR_USHORT) -OB_DEF_VAR (s390_vec_load_bndry_dbl, s390_vlbb, O2_U16, BT_OV_V2DF_DBLCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_s8, s390_vlbb, 0, O2_U16, BT_OV_V16QI_SCHARCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_u8, s390_vlbb, 0, O2_U16, BT_OV_UV16QI_UCHARCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_s16, s390_vlbb, 0, O2_U16, BT_OV_V8HI_SHORTCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_u16, s390_vlbb, 0, O2_U16, BT_OV_UV8HI_USHORTCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_s32, s390_vlbb, 0, O2_U16, BT_OV_V4SI_INTCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_u32, s390_vlbb, 0, O2_U16, BT_OV_UV4SI_UINTCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_s64, s390_vlbb, 0, O2_U16, BT_OV_V2DI_LONGLONGCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_u64, s390_vlbb, 0, O2_U16, BT_OV_UV2DI_ULONGLONGCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_flt, s390_vlbb, B_VXE, O2_U16, BT_OV_V4SF_FLTCONSTPTR_USHORT) +OB_DEF_VAR (s390_vec_load_bndry_dbl, s390_vlbb, 0, O2_U16, BT_OV_V2DF_DBLCONSTPTR_USHORT) B_DEF (s390_vlbb, vlbb, 0, B_VX, O2_U3, BT_FN_UV16QI_UCHARCONSTPTR_USHORT) OB_DEF (s390_vec_load_pair, s390_vec_load_pair_s64,s390_vec_load_pair_u64,B_VX, BT_FN_OV2DI_LONGLONG_LONGLONG) -OB_DEF_VAR (s390_vec_load_pair_s64, MAX, 0, BT_OV_V2DI_LONGLONG_LONGLONG) /* vlvgp */ -OB_DEF_VAR (s390_vec_load_pair_u64, MAX, 0, BT_OV_UV2DI_ULONGLONG_ULONGLONG) /* vlvgp */ +OB_DEF_VAR (s390_vec_load_pair_s64, MAX, 0, 0, BT_OV_V2DI_LONGLONG_LONGLONG) /* vlvgp */ +OB_DEF_VAR (s390_vec_load_pair_u64, MAX, 0, 0, BT_OV_UV2DI_ULONGLONG_ULONGLONG) /* vlvgp */ +/* First two operands are swapped in s390-c.c */ OB_DEF (s390_vec_load_len, s390_vec_load_len_s8,s390_vec_load_len_dbl,B_VX, BT_FN_OV4SI_INTCONSTPTR_UINT) -OB_DEF_VAR (s390_vec_load_len_s8, s390_vll, 0, BT_OV_V16QI_SCHARCONSTPTR_UINT) -OB_DEF_VAR (s390_vec_load_len_u8, s390_vll, 0, BT_OV_UV16QI_UCHARCONSTPTR_UINT) -OB_DEF_VAR (s390_vec_load_len_s16, s390_vll, 0, BT_OV_V8HI_SHORTCONSTPTR_UINT) -OB_DEF_VAR (s390_vec_load_len_u16, s390_vll, 0, BT_OV_UV8HI_USHORTCONSTPTR_UINT) -OB_DEF_VAR (s390_vec_load_len_s32, s390_vll, 0, BT_OV_V4SI_INTCONSTPTR_UINT) -OB_DEF_VAR (s390_vec_load_len_u32, s390_vll, 0, BT_OV_UV4SI_UINTCONSTPTR_UINT) -OB_DEF_VAR (s390_vec_load_len_s64, s390_vll, 0, BT_OV_V2DI_LONGLONGCONSTPTR_UINT) -OB_DEF_VAR (s390_vec_load_len_u64, s390_vll, 0, BT_OV_UV2DI_ULONGLONGCONSTPTR_UINT) -OB_DEF_VAR (s390_vec_load_len_dbl, s390_vll, 0, BT_OV_V2DF_DBLCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_s8, s390_vll, 0, 0, BT_OV_V16QI_SCHARCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_u8, s390_vll, 0, 0, BT_OV_UV16QI_UCHARCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_s16, s390_vll, 0, 0, BT_OV_V8HI_SHORTCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_u16, s390_vll, 0, 0, BT_OV_UV8HI_USHORTCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_s32, s390_vll, 0, 0, BT_OV_V4SI_INTCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_u32, s390_vll, 0, 0, BT_OV_UV4SI_UINTCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_s64, s390_vll, 0, 0, BT_OV_V2DI_LONGLONGCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_u64, s390_vll, 0, 0, BT_OV_UV2DI_ULONGLONGCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_flt, s390_vll, B_VXE, 0, BT_OV_V4SF_FLTCONSTPTR_UINT) +OB_DEF_VAR (s390_vec_load_len_dbl, s390_vll, 0, 0, BT_OV_V2DF_DBLCONSTPTR_UINT) B_DEF (s390_vll, vllv16qi, 0, B_VX, 0, BT_FN_V16QI_UINT_VOIDCONSTPTR) +B_DEF (s390_vlrlr, vlrlrv16qi, 0, B_VXE, 0, BT_FN_V16QI_UINT_VOIDCONSTPTR) OB_DEF (s390_vec_mergeh, s390_vec_mergeh_s8, s390_vec_mergeh_dbl,B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_mergeh_s8, s390_vmrhb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_mergeh_u8, s390_vmrhb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_mergeh_b8, s390_vmrhb, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_mergeh_s16, s390_vmrhh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_mergeh_u16, s390_vmrhh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_mergeh_b16, s390_vmrhh, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_mergeh_s32, s390_vmrhf, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_mergeh_u32, s390_vmrhf, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_mergeh_b32, s390_vmrhf, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_mergeh_s64, s390_vmrhg, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_mergeh_u64, s390_vmrhg, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_mergeh_b64, s390_vmrhg, 0, BT_OV_BV2DI_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_mergeh_dbl, s390_vmrhg, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_mergeh_s8, s390_vmrhb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_mergeh_u8, s390_vmrhb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_mergeh_b8, s390_vmrhb, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_mergeh_s16, s390_vmrhh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_mergeh_u16, s390_vmrhh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_mergeh_b16, s390_vmrhh, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_mergeh_s32, s390_vmrhf, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_mergeh_u32, s390_vmrhf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_mergeh_b32, s390_vmrhf, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_mergeh_s64, s390_vmrhg, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_mergeh_u64, s390_vmrhg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_mergeh_b64, s390_vmrhg, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_mergeh_flt, s390_vmrhf_flt, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_mergeh_dbl, s390_vmrhg_dbl, 0, 0, BT_OV_V2DF_V2DF_V2DF) B_DEF (s390_vmrhb, vec_mergehv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) B_DEF (s390_vmrhh, vec_mergehv8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI) B_DEF (s390_vmrhf, vec_mergehv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI) +B_DEF (s390_vmrhf_flt, vec_mergehv4sf, 0, B_INT | B_VX, 0, BT_FN_V4SF_V4SF_V4SF) B_DEF (s390_vmrhg, vec_mergehv2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI) +B_DEF (s390_vmrhg_dbl, vec_mergehv2df, 0, B_INT | B_VX, 0, BT_FN_V2DF_V2DF_V2DF) OB_DEF (s390_vec_mergel, s390_vec_mergel_s8, s390_vec_mergel_dbl,B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_mergel_s8, s390_vmrlb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_mergel_u8, s390_vmrlb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_mergel_b8, s390_vmrlb, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_mergel_s16, s390_vmrlh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_mergel_u16, s390_vmrlh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_mergel_b16, s390_vmrlh, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_mergel_s32, s390_vmrlf, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_mergel_u32, s390_vmrlf, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_mergel_b32, s390_vmrlf, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_mergel_s64, s390_vmrlg, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_mergel_u64, s390_vmrlg, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_mergel_b64, s390_vmrlg, 0, BT_OV_BV2DI_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_mergel_dbl, s390_vmrlg, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_mergel_s8, s390_vmrlb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_mergel_u8, s390_vmrlb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_mergel_b8, s390_vmrlb, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_mergel_s16, s390_vmrlh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_mergel_u16, s390_vmrlh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_mergel_b16, s390_vmrlh, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_mergel_s32, s390_vmrlf, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_mergel_u32, s390_vmrlf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_mergel_b32, s390_vmrlf, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_mergel_s64, s390_vmrlg, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_mergel_u64, s390_vmrlg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_mergel_b64, s390_vmrlg, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_mergel_flt, s390_vmrlf_flt, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_mergel_dbl, s390_vmrlg_dbl, 0, 0, BT_OV_V2DF_V2DF_V2DF) B_DEF (s390_vmrlb, vec_mergelv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) B_DEF (s390_vmrlh, vec_mergelv8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI) B_DEF (s390_vmrlf, vec_mergelv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI) +B_DEF (s390_vmrlf_flt, vec_mergelv4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SF_V4SF_V4SF) B_DEF (s390_vmrlg, vec_mergelv2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI) +B_DEF (s390_vmrlg_dbl, vec_mergelv2df, 0, B_INT | B_VX, 0, BT_FN_V2DF_V2DF_V2DF) OB_DEF (s390_vec_pack, s390_vec_pack_s16, s390_vec_pack_b64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_pack_s16, s390_vpkh, 0, BT_OV_V16QI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_pack_u16, s390_vpkh, 0, BT_OV_UV16QI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_pack_b16, s390_vpkh, 0, BT_OV_BV16QI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_pack_s32, s390_vpkf, 0, BT_OV_V8HI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_pack_u32, s390_vpkf, 0, BT_OV_UV8HI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_pack_b32, s390_vpkf, 0, BT_OV_BV8HI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_pack_s64, s390_vpkg, 0, BT_OV_V4SI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_pack_u64, s390_vpkg, 0, BT_OV_UV4SI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_pack_b64, s390_vpkg, 0, BT_OV_BV4SI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_pack_s16, s390_vpkh, 0, 0, BT_OV_V16QI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_pack_u16, s390_vpkh, 0, 0, BT_OV_UV16QI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_pack_b16, s390_vpkh, 0, 0, BT_OV_BV16QI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_pack_s32, s390_vpkf, 0, 0, BT_OV_V8HI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_pack_u32, s390_vpkf, 0, 0, BT_OV_UV8HI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_pack_b32, s390_vpkf, 0, 0, BT_OV_BV8HI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_pack_s64, s390_vpkg, 0, 0, BT_OV_V4SI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_pack_u64, s390_vpkg, 0, 0, BT_OV_UV4SI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_pack_b64, s390_vpkg, 0, 0, BT_OV_BV4SI_BV2DI_BV2DI) B_DEF (s390_vpkh, vec_packv8hi, 0, B_VX, 0, BT_FN_UV16QI_UV8HI_UV8HI) B_DEF (s390_vpkf, vec_packv4si, 0, B_VX, 0, BT_FN_UV8HI_UV4SI_UV4SI) B_DEF (s390_vpkg, vec_packv2di, 0, B_VX, 0, BT_FN_UV4SI_UV2DI_UV2DI) OB_DEF (s390_vec_packs, s390_vec_packs_s16, s390_vec_packs_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_packs_s16, s390_vpksh, 0, BT_OV_V16QI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_packs_u16, s390_vpklsh, 0, BT_OV_UV16QI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_packs_s32, s390_vpksf, 0, BT_OV_V8HI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_packs_u32, s390_vpklsf, 0, BT_OV_UV8HI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_packs_s64, s390_vpksg, 0, BT_OV_V4SI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_packs_u64, s390_vpklsg, 0, BT_OV_UV4SI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_packs_s16, s390_vpksh, 0, 0, BT_OV_V16QI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_packs_u16, s390_vpklsh, 0, 0, BT_OV_UV16QI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_packs_s32, s390_vpksf, 0, 0, BT_OV_V8HI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_packs_u32, s390_vpklsf, 0, 0, BT_OV_UV8HI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_packs_s64, s390_vpksg, 0, 0, BT_OV_V4SI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_packs_u64, s390_vpklsg, 0, 0, BT_OV_UV4SI_UV2DI_UV2DI) B_DEF (s390_vpksh, vec_packsv8hi, 0, B_VX, 0, BT_FN_V16QI_V8HI_V8HI) B_DEF (s390_vpklsh, vec_packsuv8hi, 0, B_VX, 0, BT_FN_UV16QI_UV8HI_UV8HI) @@ -548,12 +588,12 @@ B_DEF (s390_vpksg, vec_packsv2di, 0, B_DEF (s390_vpklsg, vec_packsuv2di, 0, B_VX, 0, BT_FN_UV4SI_UV2DI_UV2DI) OB_DEF (s390_vec_packs_cc, s390_vec_packs_cc_s16,s390_vec_packs_cc_u64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vec_packs_cc_s16, s390_vpkshs, 0, BT_OV_V16QI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vec_packs_cc_u16, s390_vpklshs, 0, BT_OV_UV16QI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vec_packs_cc_s32, s390_vpksfs, 0, BT_OV_V8HI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vec_packs_cc_u32, s390_vpklsfs, 0, BT_OV_UV8HI_UV4SI_UV4SI_INTPTR) -OB_DEF_VAR (s390_vec_packs_cc_s64, s390_vpksgs, 0, BT_OV_V4SI_V2DI_V2DI_INTPTR) -OB_DEF_VAR (s390_vec_packs_cc_u64, s390_vpklsgs, 0, BT_OV_UV4SI_UV2DI_UV2DI_INTPTR) +OB_DEF_VAR (s390_vec_packs_cc_s16, s390_vpkshs, 0, 0, BT_OV_V16QI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vec_packs_cc_u16, s390_vpklshs, 0, 0, BT_OV_UV16QI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vec_packs_cc_s32, s390_vpksfs, 0, 0, BT_OV_V8HI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vec_packs_cc_u32, s390_vpklsfs, 0, 0, BT_OV_UV8HI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vec_packs_cc_s64, s390_vpksgs, 0, 0, BT_OV_V4SI_V2DI_V2DI_INTPTR) +OB_DEF_VAR (s390_vec_packs_cc_u64, s390_vpklsgs, 0, 0, BT_OV_UV4SI_UV2DI_UV2DI_INTPTR) B_DEF (s390_vpkshs, vec_packs_ccv8hi, 0, B_VX, 0, BT_FN_V16QI_V8HI_V8HI_INTPTR) B_DEF (s390_vpklshs, vec_packsu_ccv8hi, 0, B_VX, 0, BT_FN_UV16QI_UV8HI_UV8HI_INTPTR) @@ -563,160 +603,185 @@ B_DEF (s390_vpksgs, vec_packs_ccv2di, 0, B_DEF (s390_vpklsgs, vec_packsu_ccv2di, 0, B_VX, 0, BT_FN_UV4SI_UV2DI_UV2DI_INTPTR) OB_DEF (s390_vec_packsu, s390_vec_packsu_s16,s390_vec_packsu_u64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_packsu_s16, s390_vec_packsu_u16,0, BT_OV_UV16QI_V8HI_V8HI) /* vpklsh */ -OB_DEF_VAR (s390_vec_packsu_u16, s390_vpklsh, 0, BT_OV_UV16QI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_packsu_s32, s390_vec_packsu_u32,0, BT_OV_UV8HI_V4SI_V4SI) /* vpklsf */ -OB_DEF_VAR (s390_vec_packsu_u32, s390_vpklsf, 0, BT_OV_UV8HI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_packsu_s64, s390_vec_packsu_u64,0, BT_OV_UV4SI_V2DI_V2DI) /* vpklsg */ -OB_DEF_VAR (s390_vec_packsu_u64, s390_vpklsg, 0, BT_OV_UV4SI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_packsu_s16, s390_vec_packsu_u16,0, 0, BT_OV_UV16QI_V8HI_V8HI) /* vpklsh */ +OB_DEF_VAR (s390_vec_packsu_u16, s390_vpklsh, 0, 0, BT_OV_UV16QI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_packsu_s32, s390_vec_packsu_u32,0, 0, BT_OV_UV8HI_V4SI_V4SI) /* vpklsf */ +OB_DEF_VAR (s390_vec_packsu_u32, s390_vpklsf, 0, 0, BT_OV_UV8HI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_packsu_s64, s390_vec_packsu_u64,0, 0, BT_OV_UV4SI_V2DI_V2DI) /* vpklsg */ +OB_DEF_VAR (s390_vec_packsu_u64, s390_vpklsg, 0, 0, BT_OV_UV4SI_UV2DI_UV2DI) -B_DEF (s390_vec_packsu_u16, vec_packsu_uv8hi, 0, B_VX | B_INT, 0, BT_FN_UV16QI_UV8HI_UV8HI) /* vpklsh */ -B_DEF (s390_vec_packsu_u32, vec_packsu_uv4si, 0, B_VX | B_INT, 0, BT_FN_UV8HI_UV4SI_UV4SI) /* vpklsf */ -B_DEF (s390_vec_packsu_u64, vec_packsu_uv2di, 0, B_VX | B_INT, 0, BT_FN_UV4SI_UV2DI_UV2DI) /* vpklsg */ +B_DEF (s390_vec_packsu_u16, vec_packsu_uv8hi, 0, B_INT | B_VX, 0, BT_FN_UV16QI_UV8HI_UV8HI) /* vpklsh */ +B_DEF (s390_vec_packsu_u32, vec_packsu_uv4si, 0, B_INT | B_VX, 0, BT_FN_UV8HI_UV4SI_UV4SI) /* vpklsf */ +B_DEF (s390_vec_packsu_u64, vec_packsu_uv2di, 0, B_INT | B_VX, 0, BT_FN_UV4SI_UV2DI_UV2DI) /* vpklsg */ OB_DEF (s390_vec_packsu_cc, s390_vec_packsu_cc_u16,s390_vec_packsu_cc_u64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vec_packsu_cc_u16, s390_vpklshs, 0, BT_OV_UV16QI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vec_packsu_cc_u32, s390_vpklsfs, 0, BT_OV_UV8HI_UV4SI_UV4SI_INTPTR) -OB_DEF_VAR (s390_vec_packsu_cc_u64, s390_vpklsgs, 0, BT_OV_UV4SI_UV2DI_UV2DI_INTPTR) +OB_DEF_VAR (s390_vec_packsu_cc_u16, s390_vpklshs, 0, 0, BT_OV_UV16QI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vec_packsu_cc_u32, s390_vpklsfs, 0, 0, BT_OV_UV8HI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vec_packsu_cc_u64, s390_vpklsgs, 0, 0, BT_OV_UV4SI_UV2DI_UV2DI_INTPTR) OB_DEF (s390_vec_perm, s390_vec_perm_s8, s390_vec_perm_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_perm_s8, s390_vperm, 0, BT_OV_V16QI_V16QI_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_perm_b8, s390_vperm, 0, BT_OV_BV16QI_BV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_perm_u8, s390_vperm, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_perm_s16, s390_vperm, 0, BT_OV_V8HI_V8HI_V8HI_UV16QI) -OB_DEF_VAR (s390_vec_perm_b16, s390_vperm, 0, BT_OV_BV8HI_BV8HI_BV8HI_UV16QI) -OB_DEF_VAR (s390_vec_perm_u16, s390_vperm, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV16QI) -OB_DEF_VAR (s390_vec_perm_s32, s390_vperm, 0, BT_OV_V4SI_V4SI_V4SI_UV16QI) -OB_DEF_VAR (s390_vec_perm_b32, s390_vperm, 0, BT_OV_BV4SI_BV4SI_BV4SI_UV16QI) -OB_DEF_VAR (s390_vec_perm_u32, s390_vperm, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV16QI) -OB_DEF_VAR (s390_vec_perm_s64, s390_vperm, 0, BT_OV_V2DI_V2DI_V2DI_UV16QI) -OB_DEF_VAR (s390_vec_perm_b64, s390_vperm, 0, BT_OV_BV2DI_BV2DI_BV2DI_UV16QI) -OB_DEF_VAR (s390_vec_perm_u64, s390_vperm, 0, BT_OV_UV2DI_UV2DI_UV2DI_UV16QI) -OB_DEF_VAR (s390_vec_perm_dbl, s390_vperm, 0, BT_OV_V2DF_V2DF_V2DF_UV16QI) +OB_DEF_VAR (s390_vec_perm_s8, s390_vperm, 0, 0, BT_OV_V16QI_V16QI_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_perm_b8, s390_vperm, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_perm_u8, s390_vperm, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_perm_s16, s390_vperm, 0, 0, BT_OV_V8HI_V8HI_V8HI_UV16QI) +OB_DEF_VAR (s390_vec_perm_b16, s390_vperm, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI_UV16QI) +OB_DEF_VAR (s390_vec_perm_u16, s390_vperm, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV16QI) +OB_DEF_VAR (s390_vec_perm_s32, s390_vperm, 0, 0, BT_OV_V4SI_V4SI_V4SI_UV16QI) +OB_DEF_VAR (s390_vec_perm_b32, s390_vperm, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI_UV16QI) +OB_DEF_VAR (s390_vec_perm_u32, s390_vperm, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV16QI) +OB_DEF_VAR (s390_vec_perm_s64, s390_vperm, 0, 0, BT_OV_V2DI_V2DI_V2DI_UV16QI) +OB_DEF_VAR (s390_vec_perm_b64, s390_vperm, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI_UV16QI) +OB_DEF_VAR (s390_vec_perm_u64, s390_vperm, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI_UV16QI) +OB_DEF_VAR (s390_vec_perm_flt, s390_vperm, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF_UV16QI) +OB_DEF_VAR (s390_vec_perm_dbl, s390_vperm, 0, 0, BT_OV_V2DF_V2DF_V2DF_UV16QI) B_DEF (s390_vperm, vec_permv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_permi, s390_vec_permi_s64, s390_vec_permi_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_INT) -OB_DEF_VAR (s390_vec_permi_s64, s390_vpdi, O3_U2, BT_OV_V2DI_V2DI_V2DI_INT) -OB_DEF_VAR (s390_vec_permi_b64, s390_vpdi, O3_U2, BT_OV_BV2DI_BV2DI_BV2DI_INT) -OB_DEF_VAR (s390_vec_permi_u64, s390_vpdi, O3_U2, BT_OV_UV2DI_UV2DI_UV2DI_INT) -OB_DEF_VAR (s390_vec_permi_dbl, s390_vpdi, O3_U2, BT_OV_V2DF_V2DF_V2DF_INT) +OB_DEF_VAR (s390_vec_permi_s64, s390_vpdi, 0, O3_U2, BT_OV_V2DI_V2DI_V2DI_INT) +OB_DEF_VAR (s390_vec_permi_b64, s390_vpdi, 0, O3_U2, BT_OV_BV2DI_BV2DI_BV2DI_INT) +OB_DEF_VAR (s390_vec_permi_u64, s390_vpdi, 0, O3_U2, BT_OV_UV2DI_UV2DI_UV2DI_INT) +OB_DEF_VAR (s390_vec_permi_dbl, s390_vpdi, 0, O3_U2, BT_OV_V2DF_V2DF_V2DF_INT) B_DEF (s390_vpdi, vec_permiv2di, 0, B_VX, O3_U2, BT_FN_UV2DI_UV2DI_UV2DI_INT) OB_DEF (s390_vec_splat, s390_vec_splat2_s8, s390_vec_splat2_dbl,B_VX, BT_FN_OV4SI_OV4SI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_s8, s390_vrepb, O2_U4, BT_OV_V16QI_V16QI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_b8, s390_vrepb, O2_U4, BT_OV_BV16QI_BV16QI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_u8, s390_vrepb, O2_U4, BT_OV_UV16QI_UV16QI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_s16, s390_vreph, O2_U3, BT_OV_V8HI_V8HI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_b16, s390_vreph, O2_U3, BT_OV_BV8HI_BV8HI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_u16, s390_vreph, O2_U3, BT_OV_UV8HI_UV8HI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_s32, s390_vrepf, O2_U2, BT_OV_V4SI_V4SI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_b32, s390_vrepf, O2_U2, BT_OV_BV4SI_BV4SI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_u32, s390_vrepf, O2_U2, BT_OV_UV4SI_UV4SI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_s64, s390_vrepg, O2_U1, BT_OV_V2DI_V2DI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_b64, s390_vrepg, O2_U1, BT_OV_BV2DI_BV2DI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_u64, s390_vrepg, O2_U1, BT_OV_UV2DI_UV2DI_UCHAR) -OB_DEF_VAR (s390_vec_splat2_dbl, s390_vrepg, O2_U1, BT_OV_V2DF_V2DF_UCHAR) +OB_DEF_VAR (s390_vec_splat2_s8, s390_vrepb, 0, O2_U4, BT_OV_V16QI_V16QI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_b8, s390_vrepb, 0, O2_U4, BT_OV_BV16QI_BV16QI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_u8, s390_vrepb, 0, O2_U4, BT_OV_UV16QI_UV16QI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_s16, s390_vreph, 0, O2_U3, BT_OV_V8HI_V8HI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_b16, s390_vreph, 0, O2_U3, BT_OV_BV8HI_BV8HI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_u16, s390_vreph, 0, O2_U3, BT_OV_UV8HI_UV8HI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_s32, s390_vrepf, 0, O2_U2, BT_OV_V4SI_V4SI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_b32, s390_vrepf, 0, O2_U2, BT_OV_BV4SI_BV4SI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_u32, s390_vrepf, 0, O2_U2, BT_OV_UV4SI_UV4SI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_s64, s390_vrepg, 0, O2_U1, BT_OV_V2DI_V2DI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_b64, s390_vrepg, 0, O2_U1, BT_OV_BV2DI_BV2DI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_u64, s390_vrepg, 0, O2_U1, BT_OV_UV2DI_UV2DI_UCHAR) +OB_DEF_VAR (s390_vec_splat2_flt, s390_vrepf_flt, B_VXE, O2_U2, BT_OV_V4SF_V4SF_UCHAR) /* vrepf */ +OB_DEF_VAR (s390_vec_splat2_dbl, s390_vrepg_dbl, 0, O2_U1, BT_OV_V2DF_V2DF_UCHAR) /* vrepg */ B_DEF (s390_vrepb, vec_splatv16qi, 0, B_VX, O2_U4, BT_FN_UV16QI_UV16QI_UCHAR) B_DEF (s390_vreph, vec_splatv8hi, 0, B_VX, O2_U3, BT_FN_UV8HI_UV8HI_UCHAR) B_DEF (s390_vrepf, vec_splatv4si, 0, B_VX, O2_U2, BT_FN_UV4SI_UV4SI_UCHAR) +B_DEF (s390_vrepf_flt, vec_splatv4sf, 0, B_INT | B_VXE, O2_U2, BT_FN_V4SF_V4SF_UCHAR) B_DEF (s390_vrepg, vec_splatv2di, 0, B_VX, O2_U1, BT_FN_UV2DI_UV2DI_UCHAR) +B_DEF (s390_vrepg_dbl, vec_splatv2df, 0, B_INT | B_VX, O2_U1, BT_FN_V2DF_V2DF_UCHAR) OB_DEF (s390_vec_scatter_element, s390_vec_scatter_element_s32,s390_vec_scatter_element_dbl,B_VX,BT_FN_VOID_V4SI_V4SI_INTPTR_ULONGLONG) -OB_DEF_VAR (s390_vec_scatter_element_s32,s390_vscef, O4_U2, BT_OV_VOID_V4SI_UV4SI_INTPTR_ULONGLONG) -OB_DEF_VAR (s390_vec_scatter_element_b32,s390_vscef, O4_U2, BT_OV_VOID_BV4SI_UV4SI_UINTPTR_ULONGLONG) -OB_DEF_VAR (s390_vec_scatter_element_u32,s390_vscef, O4_U2, BT_OV_VOID_UV4SI_UV4SI_UINTPTR_ULONGLONG) -OB_DEF_VAR (s390_vec_scatter_element_s64,s390_vsceg, O4_U1, BT_OV_VOID_V2DI_UV2DI_LONGLONGPTR_ULONGLONG) -OB_DEF_VAR (s390_vec_scatter_element_b64,s390_vsceg, O4_U1, BT_OV_VOID_BV2DI_UV2DI_ULONGLONGPTR_ULONGLONG) -OB_DEF_VAR (s390_vec_scatter_element_u64,s390_vsceg, O4_U1, BT_OV_VOID_UV2DI_UV2DI_ULONGLONGPTR_ULONGLONG) -OB_DEF_VAR (s390_vec_scatter_element_dbl,s390_vsceg, O4_U1, BT_OV_VOID_V2DF_UV2DI_DBLPTR_ULONGLONG) +OB_DEF_VAR (s390_vec_scatter_element_s32,s390_vscef, 0, O4_U2, BT_OV_VOID_V4SI_UV4SI_INTPTR_ULONGLONG) +OB_DEF_VAR (s390_vec_scatter_element_b32,s390_vscef, 0, O4_U2, BT_OV_VOID_BV4SI_UV4SI_UINTPTR_ULONGLONG) +OB_DEF_VAR (s390_vec_scatter_element_u32,s390_vscef, 0, O4_U2, BT_OV_VOID_UV4SI_UV4SI_UINTPTR_ULONGLONG) +OB_DEF_VAR (s390_vec_scatter_element_s64,s390_vsceg, 0, O4_U1, BT_OV_VOID_V2DI_UV2DI_LONGLONGPTR_ULONGLONG) +OB_DEF_VAR (s390_vec_scatter_element_b64,s390_vsceg, 0, O4_U1, BT_OV_VOID_BV2DI_UV2DI_ULONGLONGPTR_ULONGLONG) +OB_DEF_VAR (s390_vec_scatter_element_u64,s390_vsceg, 0, O4_U1, BT_OV_VOID_UV2DI_UV2DI_ULONGLONGPTR_ULONGLONG) +OB_DEF_VAR (s390_vec_scatter_element_flt,s390_vscef, B_VXE, O4_U2, BT_OV_VOID_V4SF_V4SF_FLTPTR_ULONGLONG) +OB_DEF_VAR (s390_vec_scatter_element_dbl,s390_vsceg, 0, O4_U1, BT_OV_VOID_V2DF_UV2DI_DBLPTR_ULONGLONG) B_DEF (s390_vscef, vec_scatter_elementv4si,0, B_VX, O4_U2, BT_FN_VOID_UV4SI_UV4SI_UINTPTR_ULONGLONG) B_DEF (s390_vsceg, vec_scatter_elementv2di,0, B_VX, O4_U1, BT_FN_VOID_UV2DI_UV2DI_ULONGLONGPTR_ULONGLONG) +/* First two operands are swapped in s390-c.c */ OB_DEF (s390_vec_sel, s390_vec_sel_b8_a, s390_vec_sel_dbl_b, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_sel_b8_a, s390_vsel, 0, BT_OV_BV16QI_BV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_sel_b8_b, s390_vsel, 0, BT_OV_BV16QI_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_sel_s8_a, s390_vsel, 0, BT_OV_V16QI_V16QI_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_sel_s8_b, s390_vsel, 0, BT_OV_V16QI_V16QI_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_sel_u8_a, s390_vsel, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_sel_u8_b, s390_vsel, 0, BT_OV_UV16QI_UV16QI_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_sel_b16_a, s390_vsel, 0, BT_OV_BV8HI_BV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_sel_b16_b, s390_vsel, 0, BT_OV_BV8HI_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_sel_s16_a, s390_vsel, 0, BT_OV_V8HI_V8HI_V8HI_UV8HI) -OB_DEF_VAR (s390_vec_sel_s16_b, s390_vsel, 0, BT_OV_V8HI_V8HI_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_sel_u16_a, s390_vsel, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_sel_u16_b, s390_vsel, 0, BT_OV_UV8HI_UV8HI_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_sel_b32_a, s390_vsel, 0, BT_OV_BV4SI_BV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_sel_b32_b, s390_vsel, 0, BT_OV_BV4SI_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_sel_s32_a, s390_vsel, 0, BT_OV_V4SI_V4SI_V4SI_UV4SI) -OB_DEF_VAR (s390_vec_sel_s32_b, s390_vsel, 0, BT_OV_V4SI_V4SI_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_sel_u32_a, s390_vsel, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_sel_u32_b, s390_vsel, 0, BT_OV_UV4SI_UV4SI_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_sel_b64_a, s390_vsel, 0, BT_OV_BV2DI_BV2DI_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_sel_b64_b, s390_vsel, 0, BT_OV_BV2DI_BV2DI_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_sel_s64_a, s390_vsel, 0, BT_OV_V2DI_V2DI_V2DI_UV2DI) -OB_DEF_VAR (s390_vec_sel_s64_b, s390_vsel, 0, BT_OV_V2DI_V2DI_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_sel_u64_a, s390_vsel, 0, BT_OV_UV2DI_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_sel_u64_b, s390_vsel, 0, BT_OV_UV2DI_UV2DI_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_sel_dbl_a, s390_vsel, 0, BT_OV_V2DF_V2DF_V2DF_UV2DI) -OB_DEF_VAR (s390_vec_sel_dbl_b, s390_vsel, 0, BT_OV_V2DF_V2DF_V2DF_BV2DI) +OB_DEF_VAR (s390_vec_sel_b8_a, s390_vsel, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_sel_b8_b, s390_vsel, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_sel_s8_a, s390_vsel, 0, 0, BT_OV_V16QI_V16QI_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_sel_s8_b, s390_vsel, 0, 0, BT_OV_V16QI_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_sel_u8_a, s390_vsel, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_sel_u8_b, s390_vsel, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_sel_b16_a, s390_vsel, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_sel_b16_b, s390_vsel, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_sel_s16_a, s390_vsel, 0, 0, BT_OV_V8HI_V8HI_V8HI_UV8HI) +OB_DEF_VAR (s390_vec_sel_s16_b, s390_vsel, 0, 0, BT_OV_V8HI_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_sel_u16_a, s390_vsel, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_sel_u16_b, s390_vsel, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_sel_b32_a, s390_vsel, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_sel_b32_b, s390_vsel, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_sel_s32_a, s390_vsel, 0, 0, BT_OV_V4SI_V4SI_V4SI_UV4SI) +OB_DEF_VAR (s390_vec_sel_s32_b, s390_vsel, 0, 0, BT_OV_V4SI_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_sel_u32_a, s390_vsel, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_sel_u32_b, s390_vsel, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_sel_b64_a, s390_vsel, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_sel_b64_b, s390_vsel, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_sel_s64_a, s390_vsel, 0, 0, BT_OV_V2DI_V2DI_V2DI_UV2DI) +OB_DEF_VAR (s390_vec_sel_s64_b, s390_vsel, 0, 0, BT_OV_V2DI_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_sel_u64_a, s390_vsel, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_sel_u64_b, s390_vsel, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_sel_flt_a, s390_vsel, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF_UV4SI) +OB_DEF_VAR (s390_vec_sel_flt_b, s390_vsel, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF_BV4SI) +OB_DEF_VAR (s390_vec_sel_dbl_a, s390_vsel, 0, 0, BT_OV_V2DF_V2DF_V2DF_UV2DI) +OB_DEF_VAR (s390_vec_sel_dbl_b, s390_vsel, 0, 0, BT_OV_V2DF_V2DF_V2DF_BV2DI) B_DEF (s390_vsel, vec_selv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_extend_s64, s390_vec_extend_s64_s8,s390_vec_extend_s64_s32,B_VX, BT_FN_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_extend_s64_s8, s390_vsegb, 0, BT_OV_V2DI_V16QI) -OB_DEF_VAR (s390_vec_extend_s64_s16, s390_vsegh, 0, BT_OV_V2DI_V8HI) -OB_DEF_VAR (s390_vec_extend_s64_s32, s390_vsegf, 0, BT_OV_V2DI_V4SI) +OB_DEF_VAR (s390_vec_extend_s64_s8, s390_vsegb, 0, 0, BT_OV_V2DI_V16QI) +OB_DEF_VAR (s390_vec_extend_s64_s16, s390_vsegh, 0, 0, BT_OV_V2DI_V8HI) +OB_DEF_VAR (s390_vec_extend_s64_s32, s390_vsegf, 0, 0, BT_OV_V2DI_V4SI) B_DEF (s390_vsegb, vec_extendv16qi, 0, B_VX, 0, BT_FN_V2DI_V16QI) B_DEF (s390_vsegh, vec_extendv8hi, 0, B_VX, 0, BT_FN_V2DI_V8HI) B_DEF (s390_vsegf, vec_extendv4si, 0, B_VX, 0, BT_FN_V2DI_V4SI) -OB_DEF (s390_vec_xstd2, s390_vec_xstd2_s8, s390_vec_xstd2_dbl, B_VX, BT_FN_VOID_OV4SI_INT_VOIDPTR) -OB_DEF_VAR (s390_vec_xstd2_s8, MAX, O2_LIT, BT_OV_VOID_V16QI_LONG_SCHARPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstd2_u8, MAX, O2_LIT, BT_OV_VOID_UV16QI_LONG_UCHARPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstd2_s16, MAX, O2_LIT, BT_OV_VOID_V8HI_LONG_SHORTPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstd2_u16, MAX, O2_LIT, BT_OV_VOID_UV8HI_LONG_USHORTPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstd2_s32, MAX, O2_LIT, BT_OV_VOID_V4SI_LONG_INTPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstd2_u32, MAX, O2_LIT, BT_OV_VOID_UV4SI_LONG_UINTPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstd2_s64, MAX, O2_LIT, BT_OV_VOID_V2DI_LONG_LONGLONGPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstd2_u64, MAX, O2_LIT, BT_OV_VOID_UV2DI_LONG_ULONGLONGPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstd2_dbl, MAX, O2_LIT, BT_OV_VOID_V2DF_LONG_DBLPTR) /* vst */ - -OB_DEF (s390_vec_xstw4, s390_vec_xstw4_s8, s390_vec_xstw4_u32, B_VX, BT_FN_VOID_OV4SI_INT_VOIDPTR) -OB_DEF_VAR (s390_vec_xstw4_s8, MAX, O2_LIT, BT_OV_VOID_V16QI_LONG_SCHARPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstw4_u8, MAX, O2_LIT, BT_OV_VOID_UV16QI_LONG_UCHARPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstw4_s16, MAX, O2_LIT, BT_OV_VOID_V8HI_LONG_SHORTPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstw4_u16, MAX, O2_LIT, BT_OV_VOID_UV8HI_LONG_USHORTPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstw4_s32, MAX, O2_LIT, BT_OV_VOID_V4SI_LONG_INTPTR) /* vst */ -OB_DEF_VAR (s390_vec_xstw4_u32, MAX, O2_LIT, BT_OV_VOID_UV4SI_LONG_UINTPTR) /* vst */ +OB_DEF (s390_vec_xst, s390_vec_xst_s8, s390_vec_xst_dbl, B_VX, BT_FN_VOID_OV4SI_INT_VOIDPTR) +OB_DEF_VAR (s390_vec_xst_s8, MAX, 0, O2_LIT, BT_OV_VOID_V16QI_LONG_SCHARPTR) /* vst */ +OB_DEF_VAR (s390_vec_xst_u8, MAX, 0, O2_LIT, BT_OV_VOID_UV16QI_LONG_UCHARPTR) /* vst */ +OB_DEF_VAR (s390_vec_xst_s16, MAX, 0, O2_LIT, BT_OV_VOID_V8HI_LONG_SHORTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xst_u16, MAX, 0, O2_LIT, BT_OV_VOID_UV8HI_LONG_USHORTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xst_s32, MAX, 0, O2_LIT, BT_OV_VOID_V4SI_LONG_INTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xst_u32, MAX, 0, O2_LIT, BT_OV_VOID_UV4SI_LONG_UINTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xst_s64, MAX, 0, O2_LIT, BT_OV_VOID_V2DI_LONG_LONGLONGPTR) /* vst */ +OB_DEF_VAR (s390_vec_xst_u64, MAX, 0, O2_LIT, BT_OV_VOID_UV2DI_LONG_ULONGLONGPTR) /* vst */ +OB_DEF_VAR (s390_vec_xst_flt, MAX, 0, O2_LIT, BT_OV_VOID_V4SF_LONG_FLTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xst_dbl, MAX, 0, O2_LIT, BT_OV_VOID_V2DF_LONG_DBLPTR) /* vst */ + +OB_DEF (s390_vec_xstd2, s390_vec_xstd2_s8, s390_vec_xstd2_dbl, B_DEP | B_VX, BT_FN_VOID_OV4SI_INT_VOIDPTR) +OB_DEF_VAR (s390_vec_xstd2_s8, MAX, 0, O2_LIT, BT_OV_VOID_V16QI_LONG_SCHARPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstd2_u8, MAX, 0, O2_LIT, BT_OV_VOID_UV16QI_LONG_UCHARPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstd2_s16, MAX, 0, O2_LIT, BT_OV_VOID_V8HI_LONG_SHORTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstd2_u16, MAX, 0, O2_LIT, BT_OV_VOID_UV8HI_LONG_USHORTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstd2_s32, MAX, 0, O2_LIT, BT_OV_VOID_V4SI_LONG_INTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstd2_u32, MAX, 0, O2_LIT, BT_OV_VOID_UV4SI_LONG_UINTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstd2_s64, MAX, 0, O2_LIT, BT_OV_VOID_V2DI_LONG_LONGLONGPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstd2_u64, MAX, 0, O2_LIT, BT_OV_VOID_UV2DI_LONG_ULONGLONGPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstd2_dbl, MAX, 0, O2_LIT, BT_OV_VOID_V2DF_LONG_DBLPTR) /* vst */ + +OB_DEF (s390_vec_xstw4, s390_vec_xstw4_s8, s390_vec_xstw4_u32, B_DEP | B_VX, BT_FN_VOID_OV4SI_INT_VOIDPTR) +OB_DEF_VAR (s390_vec_xstw4_s8, MAX, 0, O2_LIT, BT_OV_VOID_V16QI_LONG_SCHARPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstw4_u8, MAX, 0, O2_LIT, BT_OV_VOID_UV16QI_LONG_UCHARPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstw4_s16, MAX, 0, O2_LIT, BT_OV_VOID_V8HI_LONG_SHORTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstw4_u16, MAX, 0, O2_LIT, BT_OV_VOID_UV8HI_LONG_USHORTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstw4_s32, MAX, 0, O2_LIT, BT_OV_VOID_V4SI_LONG_INTPTR) /* vst */ +OB_DEF_VAR (s390_vec_xstw4_u32, MAX, 0, O2_LIT, BT_OV_VOID_UV4SI_LONG_UINTPTR) /* vst */ OB_DEF (s390_vec_store_len, s390_vec_store_len_s8,s390_vec_store_len_dbl,B_VX, BT_FN_VOID_OV4SI_VOIDPTR_UINT) -OB_DEF_VAR (s390_vec_store_len_s8, s390_vstl, 0, BT_OV_VOID_V16QI_SCHARPTR_UINT) -OB_DEF_VAR (s390_vec_store_len_u8, s390_vstl, 0, BT_OV_VOID_UV16QI_UCHARPTR_UINT) -OB_DEF_VAR (s390_vec_store_len_s16, s390_vstl, 0, BT_OV_VOID_V8HI_SHORTPTR_UINT) -OB_DEF_VAR (s390_vec_store_len_u16, s390_vstl, 0, BT_OV_VOID_UV8HI_USHORTPTR_UINT) -OB_DEF_VAR (s390_vec_store_len_s32, s390_vstl, 0, BT_OV_VOID_V4SI_INTPTR_UINT) -OB_DEF_VAR (s390_vec_store_len_u32, s390_vstl, 0, BT_OV_VOID_UV4SI_UINTPTR_UINT) -OB_DEF_VAR (s390_vec_store_len_s64, s390_vstl, 0, BT_OV_VOID_V2DI_LONGLONGPTR_UINT) -OB_DEF_VAR (s390_vec_store_len_u64, s390_vstl, 0, BT_OV_VOID_UV2DI_ULONGLONGPTR_UINT) -OB_DEF_VAR (s390_vec_store_len_dbl, s390_vstl, 0, BT_OV_VOID_V2DF_DBLPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_s8, s390_vstl, 0, 0, BT_OV_VOID_V16QI_SCHARPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_u8, s390_vstl, 0, 0, BT_OV_VOID_UV16QI_UCHARPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_s16, s390_vstl, 0, 0, BT_OV_VOID_V8HI_SHORTPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_u16, s390_vstl, 0, 0, BT_OV_VOID_UV8HI_USHORTPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_s32, s390_vstl, 0, 0, BT_OV_VOID_V4SI_INTPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_u32, s390_vstl, 0, 0, BT_OV_VOID_UV4SI_UINTPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_s64, s390_vstl, 0, 0, BT_OV_VOID_V2DI_LONGLONGPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_u64, s390_vstl, 0, 0, BT_OV_VOID_UV2DI_ULONGLONGPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_flt, s390_vstl, B_VXE, 0, BT_OV_VOID_V4SF_FLTPTR_UINT) +OB_DEF_VAR (s390_vec_store_len_dbl, s390_vstl, 0, 0, BT_OV_VOID_V2DF_DBLPTR_UINT) B_DEF (s390_vstl, vstlv16qi, 0, B_VX, 0, BT_FN_VOID_V16QI_UINT_VOIDPTR) +B_DEF (s390_vstrlr, vstrlrv16qi, 0, B_VXE, 0, BT_FN_VOID_V16QI_UINT_VOIDPTR) + +B_DEF (s390_vec_bperm_u128, vbpermv16qi, 0, B_VXE, 0, BT_FN_UV2DI_UV16QI_UV16QI) /* vbperm */ +B_DEF (s390_vbperm, vbpermv16qi, 0, B_VXE, 0, BT_FN_UV2DI_UV16QI_UV16QI) OB_DEF (s390_vec_unpackh, s390_vec_unpackh_s8,s390_vec_unpackh_u32,B_VX, BT_FN_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_unpackh_s8, s390_vuphb, 0, BT_OV_V8HI_V16QI) -OB_DEF_VAR (s390_vec_unpackh_b8, s390_vuphb, 0, BT_OV_BV8HI_BV16QI) -OB_DEF_VAR (s390_vec_unpackh_u8, s390_vuplhb, 0, BT_OV_UV8HI_UV16QI) -OB_DEF_VAR (s390_vec_unpackh_s16, s390_vuphh, 0, BT_OV_V4SI_V8HI) -OB_DEF_VAR (s390_vec_unpackh_b16, s390_vuphh, 0, BT_OV_BV4SI_BV8HI) -OB_DEF_VAR (s390_vec_unpackh_u16, s390_vuplhh, 0, BT_OV_UV4SI_UV8HI) -OB_DEF_VAR (s390_vec_unpackh_s32, s390_vuphf, 0, BT_OV_V2DI_V4SI) -OB_DEF_VAR (s390_vec_unpackh_b32, s390_vuphf, 0, BT_OV_BV2DI_BV4SI) -OB_DEF_VAR (s390_vec_unpackh_u32, s390_vuplhf, 0, BT_OV_UV2DI_UV4SI) +OB_DEF_VAR (s390_vec_unpackh_s8, s390_vuphb, 0, 0, BT_OV_V8HI_V16QI) +OB_DEF_VAR (s390_vec_unpackh_b8, s390_vuphb, 0, 0, BT_OV_BV8HI_BV16QI) +OB_DEF_VAR (s390_vec_unpackh_u8, s390_vuplhb, 0, 0, BT_OV_UV8HI_UV16QI) +OB_DEF_VAR (s390_vec_unpackh_s16, s390_vuphh, 0, 0, BT_OV_V4SI_V8HI) +OB_DEF_VAR (s390_vec_unpackh_b16, s390_vuphh, 0, 0, BT_OV_BV4SI_BV8HI) +OB_DEF_VAR (s390_vec_unpackh_u16, s390_vuplhh, 0, 0, BT_OV_UV4SI_UV8HI) +OB_DEF_VAR (s390_vec_unpackh_s32, s390_vuphf, 0, 0, BT_OV_V2DI_V4SI) +OB_DEF_VAR (s390_vec_unpackh_b32, s390_vuphf, 0, 0, BT_OV_BV2DI_BV4SI) +OB_DEF_VAR (s390_vec_unpackh_u32, s390_vuplhf, 0, 0, BT_OV_UV2DI_UV4SI) B_DEF (s390_vuphb, vec_unpackhv16qi, 0, B_VX, 0, BT_FN_V8HI_V16QI) B_DEF (s390_vuplhb, vec_unpackh_lv16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI) @@ -726,15 +791,15 @@ B_DEF (s390_vuphf, vec_unpackhv4si, 0, B_DEF (s390_vuplhf, vec_unpackh_lv4si, 0, B_VX, 0, BT_FN_UV2DI_UV4SI) OB_DEF (s390_vec_unpackl, s390_vec_unpackl_s8,s390_vec_unpackl_u32,B_VX, BT_FN_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_unpackl_s8, s390_vuplb, 0, BT_OV_V8HI_V16QI) -OB_DEF_VAR (s390_vec_unpackl_b8, s390_vuplb, 0, BT_OV_BV8HI_BV16QI) -OB_DEF_VAR (s390_vec_unpackl_u8, s390_vupllb, 0, BT_OV_UV8HI_UV16QI) -OB_DEF_VAR (s390_vec_unpackl_s16, s390_vuplhw, 0, BT_OV_V4SI_V8HI) -OB_DEF_VAR (s390_vec_unpackl_b16, s390_vupllh, 0, BT_OV_BV4SI_BV8HI) -OB_DEF_VAR (s390_vec_unpackl_u16, s390_vupllh, 0, BT_OV_UV4SI_UV8HI) -OB_DEF_VAR (s390_vec_unpackl_s32, s390_vuplf, 0, BT_OV_V2DI_V4SI) -OB_DEF_VAR (s390_vec_unpackl_b32, s390_vuplf, 0, BT_OV_BV2DI_BV4SI) -OB_DEF_VAR (s390_vec_unpackl_u32, s390_vupllf, 0, BT_OV_UV2DI_UV4SI) +OB_DEF_VAR (s390_vec_unpackl_s8, s390_vuplb, 0, 0, BT_OV_V8HI_V16QI) +OB_DEF_VAR (s390_vec_unpackl_b8, s390_vuplb, 0, 0, BT_OV_BV8HI_BV16QI) +OB_DEF_VAR (s390_vec_unpackl_u8, s390_vupllb, 0, 0, BT_OV_UV8HI_UV16QI) +OB_DEF_VAR (s390_vec_unpackl_s16, s390_vuplhw, 0, 0, BT_OV_V4SI_V8HI) +OB_DEF_VAR (s390_vec_unpackl_b16, s390_vupllh, 0, 0, BT_OV_BV4SI_BV8HI) +OB_DEF_VAR (s390_vec_unpackl_u16, s390_vupllh, 0, 0, BT_OV_UV4SI_UV8HI) +OB_DEF_VAR (s390_vec_unpackl_s32, s390_vuplf, 0, 0, BT_OV_V2DI_V4SI) +OB_DEF_VAR (s390_vec_unpackl_b32, s390_vuplf, 0, 0, BT_OV_BV2DI_BV4SI) +OB_DEF_VAR (s390_vec_unpackl_u32, s390_vupllf, 0, 0, BT_OV_UV2DI_UV4SI) B_DEF (s390_vuplb, vec_unpacklv16qi, 0, B_VX, 0, BT_FN_V8HI_V16QI) B_DEF (s390_vupllb, vec_unpackl_lv16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI) @@ -744,10 +809,10 @@ B_DEF (s390_vuplf, vec_unpacklv4si, 0, B_DEF (s390_vupllf, vec_unpackl_lv4si, 0, B_VX, 0, BT_FN_UV2DI_UV4SI) OB_DEF (s390_vec_addc, s390_vec_addc_u8, s390_vec_addc_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_addc_u8, s390_vaccb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_addc_u16, s390_vacch, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_addc_u32, s390_vaccf, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_addc_u64, s390_vaccg, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_addc_u8, s390_vaccb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_addc_u16, s390_vacch, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_addc_u32, s390_vaccf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_addc_u64, s390_vaccg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) B_DEF (s390_vaccb, vaccb_v16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) B_DEF (s390_vacch, vacch_v8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI) @@ -765,84 +830,90 @@ B_DEF (s390_vacq, vacq, 0, B_DEF (s390_vacccq, vacccq, 0, B_VX, 0, BT_FN_INT128_INT128_INT128_INT128) OB_DEF (s390_vec_and, s390_vec_and_b8, s390_vec_and_dbl_c, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_and_b8, s390_vn, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_and_s8_a, s390_vn, 0, BT_OV_V16QI_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_and_s8_b, s390_vn, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_and_s8_c, s390_vn, 0, BT_OV_V16QI_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_and_u8_a, s390_vn, 0, BT_OV_UV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_and_u8_b, s390_vn, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_and_u8_c, s390_vn, 0, BT_OV_UV16QI_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_and_b16, s390_vn, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_and_s16_a, s390_vn, 0, BT_OV_V8HI_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_and_s16_b, s390_vn, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_and_s16_c, s390_vn, 0, BT_OV_V8HI_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_and_u16_a, s390_vn, 0, BT_OV_UV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_and_u16_b, s390_vn, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_and_u16_c, s390_vn, 0, BT_OV_UV8HI_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_and_b32, s390_vn, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_and_s32_a, s390_vn, 0, BT_OV_V4SI_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_and_s32_b, s390_vn, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_and_s32_c, s390_vn, 0, BT_OV_V4SI_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_and_u32_a, s390_vn, 0, BT_OV_UV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_and_u32_b, s390_vn, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_and_u32_c, s390_vn, 0, BT_OV_UV4SI_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_and_b64, s390_vn, 0, BT_OV_BV2DI_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_and_s64_a, s390_vn, 0, BT_OV_V2DI_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_and_s64_b, s390_vn, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_and_s64_c, s390_vn, 0, BT_OV_V2DI_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_and_u64_a, s390_vn, 0, BT_OV_UV2DI_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_and_u64_b, s390_vn, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_and_u64_c, s390_vn, 0, BT_OV_UV2DI_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_and_dbl_a, s390_vn, 0, BT_OV_V2DF_BV2DI_V2DF) -OB_DEF_VAR (s390_vec_and_dbl_b, s390_vn, 0, BT_OV_V2DF_V2DF_V2DF) -OB_DEF_VAR (s390_vec_and_dbl_c, s390_vn, 0, BT_OV_V2DF_V2DF_BV2DI) +OB_DEF_VAR (s390_vec_and_b8, s390_vn, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_and_s8_a, s390_vn, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_and_s8_b, s390_vn, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_and_s8_c, s390_vn, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_and_u8_a, s390_vn, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_and_u8_b, s390_vn, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_and_u8_c, s390_vn, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_and_b16, s390_vn, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_and_s16_a, s390_vn, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_and_s16_b, s390_vn, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_and_s16_c, s390_vn, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_and_u16_a, s390_vn, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_and_u16_b, s390_vn, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_and_u16_c, s390_vn, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_and_b32, s390_vn, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_and_s32_a, s390_vn, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_and_s32_b, s390_vn, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_and_s32_c, s390_vn, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_and_u32_a, s390_vn, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_and_u32_b, s390_vn, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_and_u32_c, s390_vn, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_and_b64, s390_vn, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_and_s64_a, s390_vn, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_and_s64_b, s390_vn, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_and_s64_c, s390_vn, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_and_u64_a, s390_vn, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_and_u64_b, s390_vn, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_and_u64_c, s390_vn, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_and_flt_a, s390_vn, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF) +OB_DEF_VAR (s390_vec_and_flt_b, s390_vn, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_and_flt_c, s390_vn, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI) +OB_DEF_VAR (s390_vec_and_dbl_a, s390_vn, B_DEP, 0, BT_OV_V2DF_BV2DI_V2DF) +OB_DEF_VAR (s390_vec_and_dbl_b, s390_vn, 0, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_and_dbl_c, s390_vn, B_DEP, 0, BT_OV_V2DF_V2DF_BV2DI) B_DEF (s390_vn, andv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_andc, s390_vec_andc_b8, s390_vec_andc_dbl_c,B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_andc_b8, s390_vnc, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_andc_s8_a, s390_vnc, 0, BT_OV_V16QI_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_andc_s8_b, s390_vnc, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_andc_s8_c, s390_vnc, 0, BT_OV_V16QI_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_andc_u8_a, s390_vnc, 0, BT_OV_UV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_andc_u8_b, s390_vnc, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_andc_u8_c, s390_vnc, 0, BT_OV_UV16QI_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_andc_b16, s390_vnc, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_andc_s16_a, s390_vnc, 0, BT_OV_V8HI_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_andc_s16_b, s390_vnc, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_andc_s16_c, s390_vnc, 0, BT_OV_V8HI_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_andc_u16_a, s390_vnc, 0, BT_OV_UV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_andc_u16_b, s390_vnc, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_andc_u16_c, s390_vnc, 0, BT_OV_UV8HI_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_andc_b32, s390_vnc, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_andc_s32_a, s390_vnc, 0, BT_OV_V4SI_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_andc_s32_b, s390_vnc, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_andc_s32_c, s390_vnc, 0, BT_OV_V4SI_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_andc_u32_a, s390_vnc, 0, BT_OV_UV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_andc_u32_b, s390_vnc, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_andc_u32_c, s390_vnc, 0, BT_OV_UV4SI_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_andc_b64, s390_vnc, 0, BT_OV_BV2DI_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_andc_s64_a, s390_vnc, 0, BT_OV_V2DI_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_andc_s64_b, s390_vnc, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_andc_s64_c, s390_vnc, 0, BT_OV_V2DI_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_andc_u64_a, s390_vnc, 0, BT_OV_UV2DI_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_andc_u64_b, s390_vnc, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_andc_u64_c, s390_vnc, 0, BT_OV_UV2DI_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_andc_dbl_a, s390_vnc, 0, BT_OV_V2DF_BV2DI_V2DF) -OB_DEF_VAR (s390_vec_andc_dbl_b, s390_vnc, 0, BT_OV_V2DF_V2DF_V2DF) -OB_DEF_VAR (s390_vec_andc_dbl_c, s390_vnc, 0, BT_OV_V2DF_V2DF_BV2DI) +OB_DEF_VAR (s390_vec_andc_b8, s390_vnc, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_andc_s8_a, s390_vnc, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_andc_s8_b, s390_vnc, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_andc_s8_c, s390_vnc, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_andc_u8_a, s390_vnc, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_andc_u8_b, s390_vnc, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_andc_u8_c, s390_vnc, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_andc_b16, s390_vnc, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_andc_s16_a, s390_vnc, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_andc_s16_b, s390_vnc, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_andc_s16_c, s390_vnc, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_andc_u16_a, s390_vnc, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_andc_u16_b, s390_vnc, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_andc_u16_c, s390_vnc, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_andc_b32, s390_vnc, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_andc_s32_a, s390_vnc, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_andc_s32_b, s390_vnc, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_andc_s32_c, s390_vnc, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_andc_u32_a, s390_vnc, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_andc_u32_b, s390_vnc, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_andc_u32_c, s390_vnc, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_andc_b64, s390_vnc, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_andc_s64_a, s390_vnc, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_andc_s64_b, s390_vnc, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_andc_s64_c, s390_vnc, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_andc_u64_a, s390_vnc, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_andc_u64_b, s390_vnc, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_andc_u64_c, s390_vnc, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_andc_flt_a, s390_vnc, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF) +OB_DEF_VAR (s390_vec_andc_flt_b, s390_vnc, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_andc_flt_c, s390_vnc, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI) +OB_DEF_VAR (s390_vec_andc_dbl_a, s390_vnc, B_DEP, 0, BT_OV_V2DF_BV2DI_V2DF) +OB_DEF_VAR (s390_vec_andc_dbl_b, s390_vnc, 0, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_andc_dbl_c, s390_vnc, B_DEP, 0, BT_OV_V2DF_V2DF_BV2DI) B_DEF (s390_vnc, vec_andcv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_avg, s390_vec_avg_s8, s390_vec_avg_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_avg_s8, s390_vavgb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_avg_u8, s390_vavglb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_avg_s16, s390_vavgh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_avg_u16, s390_vavglh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_avg_s32, s390_vavgf, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_avg_u32, s390_vavglf, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_avg_s64, s390_vavgg, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_avg_u64, s390_vavglg, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_avg_s8, s390_vavgb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_avg_u8, s390_vavglb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_avg_s16, s390_vavgh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_avg_u16, s390_vavglh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_avg_s32, s390_vavgf, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_avg_u32, s390_vavglf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_avg_s64, s390_vavgg, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_avg_u64, s390_vavglg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) B_DEF (s390_vavgb, vec_avgv16qi, 0, B_VX, 0, BT_FN_V16QI_V16QI_V16QI) B_DEF (s390_vavglb, vec_avguv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) @@ -852,12 +923,16 @@ B_DEF (s390_vavgf, vec_avgv4si, 0, B_DEF (s390_vavglf, vec_avguv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI) B_DEF (s390_vavgg, vec_avgv2di, 0, B_VX, 0, BT_FN_V2DI_V2DI_V2DI) B_DEF (s390_vavglg, vec_avguv2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI) + B_DEF (s390_vcksm, vec_checksum, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI) + B_DEF (s390_vceqbs, vec_cmpeqv16qi_cc, 0, B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI_INTPTR) B_DEF (s390_vceqhs, vec_cmpeqv8hi_cc, 0, B_VX, 0, BT_FN_V8HI_UV8HI_UV8HI_INTPTR) B_DEF (s390_vceqfs, vec_cmpeqv4si_cc, 0, B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI_INTPTR) B_DEF (s390_vceqgs, vec_cmpeqv2di_cc, 0, B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI_INTPTR) +B_DEF (s390_vfcesbs, vec_cmpeqv4sf_cc, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF_INTPTR) B_DEF (s390_vfcedbs, vec_cmpeqv2df_cc, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF_INTPTR) + B_DEF (s390_vchbs, vec_cmphv16qi_cc, 0, B_VX, 0, BT_FN_V16QI_V16QI_V16QI_INTPTR) B_DEF (s390_vchlbs, vec_cmphlv16qi_cc, 0, B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI_INTPTR) B_DEF (s390_vchhs, vec_cmphv8hi_cc, 0, B_VX, 0, BT_FN_V8HI_V8HI_V8HI_INTPTR) @@ -866,526 +941,569 @@ B_DEF (s390_vchfs, vec_cmphv4si_cc, 0, B_DEF (s390_vchlfs, vec_cmphlv4si_cc, 0, B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI_INTPTR) B_DEF (s390_vchgs, vec_cmphv2di_cc, 0, B_VX, 0, BT_FN_V2DI_V2DI_V2DI_INTPTR) B_DEF (s390_vchlgs, vec_cmphlv2di_cc, 0, B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI_INTPTR) +B_DEF (s390_vfchsbs, vec_cmphv4sf_cc, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF_INTPTR) B_DEF (s390_vfchdbs, vec_cmphv2df_cc, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF_INTPTR) + +B_DEF (s390_vfchesbs, vec_cmphev4sf_cc, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF_INTPTR) B_DEF (s390_vfchedbs, vec_cmphev2df_cc, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF_INTPTR) -B_DEF (vec_all_eqv16qi, vec_all_eqv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_all_eqv8hi, vec_all_eqv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_all_eqv4si, vec_all_eqv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_all_eqv2di, vec_all_eqv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_all_eqv2df, vec_all_eqv2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_all_nev16qi, vec_all_nev16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_all_nev8hi, vec_all_nev8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_all_nev4si, vec_all_nev4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_all_nev2di, vec_all_nev2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_all_nev2df, vec_all_nev2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_all_gev16qi, vec_all_gev16qi, 0, B_VX | B_INT, 0, BT_FN_INT_V16QI_V16QI) -B_DEF (vec_all_geuv16qi, vec_all_geuv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_all_gev8hi, vec_all_gev8hi, 0, B_VX | B_INT, 0, BT_FN_INT_V8HI_V8HI) -B_DEF (vec_all_geuv8hi, vec_all_geuv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_all_gev4si, vec_all_gev4si, 0, B_VX | B_INT, 0, BT_FN_INT_V4SI_V4SI) -B_DEF (vec_all_geuv4si, vec_all_geuv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_all_gev2di, vec_all_gev2di, 0, B_VX | B_INT, 0, BT_FN_INT_V2DI_V2DI) -B_DEF (vec_all_geuv2di, vec_all_geuv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_all_gev2df, vec_all_gev2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_all_gtv16qi, vec_all_gtv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_V16QI_V16QI) -B_DEF (vec_all_gtuv16qi, vec_all_gtuv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_all_gtv8hi, vec_all_gtv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_V8HI_V8HI) -B_DEF (vec_all_gtuv8hi, vec_all_gtuv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_all_gtv4si, vec_all_gtv4si, 0, B_VX | B_INT, 0, BT_FN_INT_V4SI_V4SI) -B_DEF (vec_all_gtuv4si, vec_all_gtuv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_all_gtv2di, vec_all_gtv2di, 0, B_VX | B_INT, 0, BT_FN_INT_V2DI_V2DI) -B_DEF (vec_all_gtuv2di, vec_all_gtuv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_all_gtv2df, vec_all_gtv2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_all_lev16qi, vec_all_lev16qi, 0, B_VX | B_INT, 0, BT_FN_INT_V16QI_V16QI) -B_DEF (vec_all_leuv16qi, vec_all_leuv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_all_lev8hi, vec_all_lev8hi, 0, B_VX | B_INT, 0, BT_FN_INT_V8HI_V8HI) -B_DEF (vec_all_leuv8hi, vec_all_leuv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_all_lev4si, vec_all_lev4si, 0, B_VX | B_INT, 0, BT_FN_INT_V4SI_V4SI) -B_DEF (vec_all_leuv4si, vec_all_leuv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_all_lev2di, vec_all_lev2di, 0, B_VX | B_INT, 0, BT_FN_INT_V2DI_V2DI) -B_DEF (vec_all_leuv2di, vec_all_leuv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_all_lev2df, vec_all_lev2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_all_ltv16qi, vec_all_ltv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_V16QI_V16QI) -B_DEF (vec_all_ltuv16qi, vec_all_ltuv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_all_ltv8hi, vec_all_ltv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_V8HI_V8HI) -B_DEF (vec_all_ltuv8hi, vec_all_ltuv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_all_ltv4si, vec_all_ltv4si, 0, B_VX | B_INT, 0, BT_FN_INT_V4SI_V4SI) -B_DEF (vec_all_ltuv4si, vec_all_ltuv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_all_ltv2di, vec_all_ltv2di, 0, B_VX | B_INT, 0, BT_FN_INT_V2DI_V2DI) -B_DEF (vec_all_ltuv2di, vec_all_ltuv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_all_ltv2df, vec_all_ltv2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_all_eqv16qi, vec_all_eqv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_all_eqv8hi, vec_all_eqv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_all_eqv4si, vec_all_eqv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_all_eqv2di, vec_all_eqv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_all_eqv4sf, vec_all_eqv4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_all_eqv2df, vec_all_eqv2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_all_nev16qi, vec_all_nev16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_all_nev8hi, vec_all_nev8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_all_nev4si, vec_all_nev4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_all_nev2di, vec_all_nev2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_all_nev4sf, vec_all_nev4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_all_nev2df, vec_all_nev2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_all_gev16qi, vec_all_gev16qi, 0, B_INT | B_VX, 0, BT_FN_INT_V16QI_V16QI) +B_DEF (vec_all_geuv16qi, vec_all_geuv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_all_gev8hi, vec_all_gev8hi, 0, B_INT | B_VX, 0, BT_FN_INT_V8HI_V8HI) +B_DEF (vec_all_geuv8hi, vec_all_geuv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_all_gev4si, vec_all_gev4si, 0, B_INT | B_VX, 0, BT_FN_INT_V4SI_V4SI) +B_DEF (vec_all_geuv4si, vec_all_geuv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_all_gev2di, vec_all_gev2di, 0, B_INT | B_VX, 0, BT_FN_INT_V2DI_V2DI) +B_DEF (vec_all_geuv2di, vec_all_geuv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_all_gev4sf, vec_all_gev4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_all_gev2df, vec_all_gev2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_all_gtv16qi, vec_all_gtv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_V16QI_V16QI) +B_DEF (vec_all_gtuv16qi, vec_all_gtuv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_all_gtv8hi, vec_all_gtv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_V8HI_V8HI) +B_DEF (vec_all_gtuv8hi, vec_all_gtuv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_all_gtv4si, vec_all_gtv4si, 0, B_INT | B_VX, 0, BT_FN_INT_V4SI_V4SI) +B_DEF (vec_all_gtuv4si, vec_all_gtuv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_all_gtv2di, vec_all_gtv2di, 0, B_INT | B_VX, 0, BT_FN_INT_V2DI_V2DI) +B_DEF (vec_all_gtuv2di, vec_all_gtuv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_all_gtv4sf, vec_all_gtv4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_all_gtv2df, vec_all_gtv2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_all_lev16qi, vec_all_lev16qi, 0, B_INT | B_VX, 0, BT_FN_INT_V16QI_V16QI) +B_DEF (vec_all_leuv16qi, vec_all_leuv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_all_lev8hi, vec_all_lev8hi, 0, B_INT | B_VX, 0, BT_FN_INT_V8HI_V8HI) +B_DEF (vec_all_leuv8hi, vec_all_leuv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_all_lev4si, vec_all_lev4si, 0, B_INT | B_VX, 0, BT_FN_INT_V4SI_V4SI) +B_DEF (vec_all_leuv4si, vec_all_leuv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_all_lev2di, vec_all_lev2di, 0, B_INT | B_VX, 0, BT_FN_INT_V2DI_V2DI) +B_DEF (vec_all_leuv2di, vec_all_leuv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_all_lev4sf, vec_all_lev4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_all_lev2df, vec_all_lev2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_all_ltv16qi, vec_all_ltv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_V16QI_V16QI) +B_DEF (vec_all_ltuv16qi, vec_all_ltuv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_all_ltv8hi, vec_all_ltv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_V8HI_V8HI) +B_DEF (vec_all_ltuv8hi, vec_all_ltuv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_all_ltv4si, vec_all_ltv4si, 0, B_INT | B_VX, 0, BT_FN_INT_V4SI_V4SI) +B_DEF (vec_all_ltuv4si, vec_all_ltuv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_all_ltv2di, vec_all_ltv2di, 0, B_INT | B_VX, 0, BT_FN_INT_V2DI_V2DI) +B_DEF (vec_all_ltuv2di, vec_all_ltuv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_all_ltv4sf, vec_all_ltv4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_all_ltv2df, vec_all_ltv2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) OB_DEF (s390_vec_all_eq, s390_vec_all_eq_s8_a,s390_vec_all_eq_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_all_eq_s8_a, vec_all_eqv16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_all_eq_s8_b, vec_all_eqv16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_eq_b8_a, vec_all_eqv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_eq_b8_b, vec_all_eqv16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_all_eq_b8_c, vec_all_eqv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_eq_u8_a, vec_all_eqv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_eq_u8_b, vec_all_eqv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_eq_s16_a, vec_all_eqv8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_all_eq_s16_b, vec_all_eqv8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_eq_b16_a, vec_all_eqv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_eq_b16_b, vec_all_eqv8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_all_eq_b16_c, vec_all_eqv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_eq_u16_a, vec_all_eqv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_eq_u16_b, vec_all_eqv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_eq_s32_a, vec_all_eqv4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_all_eq_s32_b, vec_all_eqv4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_eq_b32_a, vec_all_eqv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_eq_b32_b, vec_all_eqv4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_all_eq_b32_c, vec_all_eqv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_eq_u32_a, vec_all_eqv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_eq_u32_b, vec_all_eqv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_eq_s64_a, vec_all_eqv2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_all_eq_s64_b, vec_all_eqv2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_eq_b64_a, vec_all_eqv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_eq_b64_b, vec_all_eqv2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_all_eq_b64_c, vec_all_eqv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_eq_u64_a, vec_all_eqv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_eq_u64_b, vec_all_eqv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_eq_dbl, vec_all_eqv2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_all_eq_s8_a, vec_all_eqv16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_all_eq_s8_b, vec_all_eqv16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_eq_b8_a, vec_all_eqv16qi, 0, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_eq_b8_b, vec_all_eqv16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_all_eq_b8_c, vec_all_eqv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_eq_u8_a, vec_all_eqv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_eq_u8_b, vec_all_eqv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_eq_s16_a, vec_all_eqv8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_all_eq_s16_b, vec_all_eqv8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_eq_b16_a, vec_all_eqv8hi, 0, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_eq_b16_b, vec_all_eqv8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_all_eq_b16_c, vec_all_eqv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_eq_u16_a, vec_all_eqv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_eq_u16_b, vec_all_eqv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_eq_s32_a, vec_all_eqv4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_all_eq_s32_b, vec_all_eqv4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_eq_b32_a, vec_all_eqv4si, 0, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_eq_b32_b, vec_all_eqv4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_all_eq_b32_c, vec_all_eqv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_eq_u32_a, vec_all_eqv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_eq_u32_b, vec_all_eqv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_eq_s64_a, vec_all_eqv2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_all_eq_s64_b, vec_all_eqv2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_eq_b64_a, vec_all_eqv2di, 0, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_eq_b64_b, vec_all_eqv2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_all_eq_b64_c, vec_all_eqv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_eq_u64_a, vec_all_eqv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_eq_u64_b, vec_all_eqv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_eq_flt, vec_all_eqv4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_all_eq_dbl, vec_all_eqv2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_all_ne, s390_vec_all_ne_s8_a,s390_vec_all_ne_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_all_ne_s8_a, vec_all_nev16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_all_ne_s8_b, vec_all_nev16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_ne_b8_a, vec_all_nev16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_ne_b8_b, vec_all_nev16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_all_ne_b8_c, vec_all_nev16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_ne_u8_a, vec_all_nev16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_ne_u8_b, vec_all_nev16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_ne_s16_a, vec_all_nev8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_all_ne_s16_b, vec_all_nev8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_ne_b16_a, vec_all_nev8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_ne_b16_b, vec_all_nev8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_all_ne_b16_c, vec_all_nev8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_ne_u16_a, vec_all_nev8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_ne_u16_b, vec_all_nev8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_ne_s32_a, vec_all_nev4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_all_ne_s32_b, vec_all_nev4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_ne_b32_a, vec_all_nev4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_ne_b32_b, vec_all_nev4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_all_ne_b32_c, vec_all_nev4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_ne_u32_a, vec_all_nev4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_ne_u32_b, vec_all_nev4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_ne_s64_a, vec_all_nev2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_all_ne_s64_b, vec_all_nev2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_ne_b64_a, vec_all_nev2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_ne_b64_b, vec_all_nev2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_all_ne_b64_c, vec_all_nev2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_ne_u64_a, vec_all_nev2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_ne_u64_b, vec_all_nev2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_ne_dbl, vec_all_nev2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_all_ne_s8_a, vec_all_nev16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_all_ne_s8_b, vec_all_nev16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_ne_b8_a, vec_all_nev16qi, 0, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_ne_b8_b, vec_all_nev16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_all_ne_b8_c, vec_all_nev16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_ne_u8_a, vec_all_nev16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_ne_u8_b, vec_all_nev16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_ne_s16_a, vec_all_nev8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_all_ne_s16_b, vec_all_nev8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_ne_b16_a, vec_all_nev8hi, 0, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_ne_b16_b, vec_all_nev8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_all_ne_b16_c, vec_all_nev8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_ne_u16_a, vec_all_nev8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_ne_u16_b, vec_all_nev8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_ne_s32_a, vec_all_nev4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_all_ne_s32_b, vec_all_nev4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_ne_b32_a, vec_all_nev4si, 0, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_ne_b32_b, vec_all_nev4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_all_ne_b32_c, vec_all_nev4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_ne_u32_a, vec_all_nev4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_ne_u32_b, vec_all_nev4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_ne_s64_a, vec_all_nev2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_all_ne_s64_b, vec_all_nev2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_ne_b64_a, vec_all_nev2di, 0, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_ne_b64_b, vec_all_nev2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_all_ne_b64_c, vec_all_nev2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_ne_u64_a, vec_all_nev2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_ne_u64_b, vec_all_nev2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_ne_flt, vec_all_nev4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_all_ne_dbl, vec_all_nev2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_all_ge, s390_vec_all_ge_s8_a,s390_vec_all_ge_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_all_ge_s8_a, vec_all_gev16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_all_ge_s8_b, vec_all_gev16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_ge_b8_a, vec_all_geuv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_ge_b8_b, vec_all_gev16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_all_ge_b8_c, vec_all_geuv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_ge_u8_a, vec_all_geuv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_ge_u8_b, vec_all_geuv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_ge_s16_a, vec_all_gev8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_all_ge_s16_b, vec_all_gev8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_ge_b16_a, vec_all_geuv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_ge_b16_b, vec_all_gev8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_all_ge_b16_c, vec_all_geuv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_ge_u16_a, vec_all_geuv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_ge_u16_b, vec_all_geuv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_ge_s32_a, vec_all_gev4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_all_ge_s32_b, vec_all_gev4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_ge_b32_a, vec_all_geuv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_ge_b32_b, vec_all_gev4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_all_ge_b32_c, vec_all_geuv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_ge_u32_a, vec_all_geuv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_ge_u32_b, vec_all_geuv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_ge_s64_a, vec_all_gev2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_all_ge_s64_b, vec_all_gev2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_ge_b64_a, vec_all_geuv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_ge_b64_b, vec_all_gev2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_all_ge_b64_c, vec_all_geuv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_ge_u64_a, vec_all_geuv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_ge_u64_b, vec_all_geuv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_ge_dbl, vec_all_gev2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_all_ge_s8_a, vec_all_gev16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_all_ge_s8_b, vec_all_gev16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_ge_b8_a, vec_all_geuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_ge_b8_b, vec_all_gev16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_all_ge_b8_c, vec_all_geuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_ge_u8_a, vec_all_geuv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_ge_u8_b, vec_all_geuv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_ge_s16_a, vec_all_gev8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_all_ge_s16_b, vec_all_gev8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_ge_b16_a, vec_all_geuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_ge_b16_b, vec_all_gev8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_all_ge_b16_c, vec_all_geuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_ge_u16_a, vec_all_geuv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_ge_u16_b, vec_all_geuv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_ge_s32_a, vec_all_gev4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_all_ge_s32_b, vec_all_gev4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_ge_b32_a, vec_all_geuv4si, B_DEP, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_ge_b32_b, vec_all_gev4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_all_ge_b32_c, vec_all_geuv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_ge_u32_a, vec_all_geuv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_ge_u32_b, vec_all_geuv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_ge_s64_a, vec_all_gev2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_all_ge_s64_b, vec_all_gev2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_ge_b64_a, vec_all_geuv2di, B_DEP, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_ge_b64_b, vec_all_gev2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_all_ge_b64_c, vec_all_geuv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_ge_u64_a, vec_all_geuv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_ge_u64_b, vec_all_geuv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_ge_flt, vec_all_gev4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_all_ge_dbl, vec_all_gev2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_all_gt, s390_vec_all_gt_s8_a,s390_vec_all_gt_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_all_gt_s8_a, vec_all_gtv16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_all_gt_s8_b, vec_all_gtv16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_gt_b8_a, vec_all_gtuv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_gt_b8_b, vec_all_gtv16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_all_gt_b8_c, vec_all_gtuv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_gt_u8_a, vec_all_gtuv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_gt_u8_b, vec_all_gtuv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_gt_s16_a, vec_all_gtv8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_all_gt_s16_b, vec_all_gtv8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_gt_b16_a, vec_all_gtuv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_gt_b16_b, vec_all_gtv8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_all_gt_b16_c, vec_all_gtuv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_gt_u16_a, vec_all_gtuv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_gt_u16_b, vec_all_gtuv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_gt_s32_a, vec_all_gtv4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_all_gt_s32_b, vec_all_gtv4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_gt_b32_a, vec_all_gtuv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_gt_b32_b, vec_all_gtv4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_all_gt_b32_c, vec_all_gtuv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_gt_u32_a, vec_all_gtuv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_gt_u32_b, vec_all_gtuv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_gt_s64_a, vec_all_gtv2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_all_gt_s64_b, vec_all_gtv2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_gt_b64_a, vec_all_gtuv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_gt_b64_b, vec_all_gtv2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_all_gt_b64_c, vec_all_gtuv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_gt_u64_a, vec_all_gtuv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_gt_u64_b, vec_all_gtuv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_gt_dbl, vec_all_gtv2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_all_gt_s8_a, vec_all_gtv16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_all_gt_s8_b, vec_all_gtv16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_gt_b8_a, vec_all_gtuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_gt_b8_b, vec_all_gtv16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_all_gt_b8_c, vec_all_gtuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_gt_u8_a, vec_all_gtuv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_gt_u8_b, vec_all_gtuv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_gt_s16_a, vec_all_gtv8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_all_gt_s16_b, vec_all_gtv8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_gt_b16_a, vec_all_gtuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_gt_b16_b, vec_all_gtv8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_all_gt_b16_c, vec_all_gtuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_gt_u16_a, vec_all_gtuv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_gt_u16_b, vec_all_gtuv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_gt_s32_a, vec_all_gtv4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_all_gt_s32_b, vec_all_gtv4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_gt_b32_a, vec_all_gtuv4si, B_DEP, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_gt_b32_b, vec_all_gtv4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_all_gt_b32_c, vec_all_gtuv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_gt_u32_a, vec_all_gtuv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_gt_u32_b, vec_all_gtuv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_gt_s64_a, vec_all_gtv2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_all_gt_s64_b, vec_all_gtv2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_gt_b64_a, vec_all_gtuv2di, B_DEP, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_gt_b64_b, vec_all_gtv2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_all_gt_b64_c, vec_all_gtuv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_gt_u64_a, vec_all_gtuv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_gt_u64_b, vec_all_gtuv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_gt_flt, vec_all_gtv4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_all_gt_dbl, vec_all_gtv2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_all_le, s390_vec_all_le_s8_a,s390_vec_all_le_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_all_le_s8_a, vec_all_lev16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_all_le_s8_b, vec_all_lev16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_le_b8_a, vec_all_leuv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_le_b8_b, vec_all_lev16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_all_le_b8_c, vec_all_leuv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_le_u8_a, vec_all_leuv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_le_u8_b, vec_all_leuv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_le_s16_a, vec_all_lev8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_all_le_s16_b, vec_all_lev8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_le_b16_a, vec_all_leuv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_le_b16_b, vec_all_lev8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_all_le_b16_c, vec_all_leuv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_le_u16_a, vec_all_leuv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_le_u16_b, vec_all_leuv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_le_s32_a, vec_all_lev4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_all_le_s32_b, vec_all_lev4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_le_b32_a, vec_all_leuv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_le_b32_b, vec_all_lev4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_all_le_b32_c, vec_all_leuv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_le_u32_a, vec_all_leuv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_le_u32_b, vec_all_leuv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_le_s64_a, vec_all_lev2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_all_le_s64_b, vec_all_lev2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_le_b64_a, vec_all_leuv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_le_b64_b, vec_all_lev2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_all_le_b64_c, vec_all_leuv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_le_u64_a, vec_all_leuv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_le_u64_b, vec_all_leuv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_le_dbl, vec_all_lev2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_all_le_s8_a, vec_all_lev16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_all_le_s8_b, vec_all_lev16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_le_b8_a, vec_all_leuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_le_b8_b, vec_all_lev16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_all_le_b8_c, vec_all_leuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_le_u8_a, vec_all_leuv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_le_u8_b, vec_all_leuv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_le_s16_a, vec_all_lev8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_all_le_s16_b, vec_all_lev8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_le_b16_a, vec_all_leuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_le_b16_b, vec_all_lev8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_all_le_b16_c, vec_all_leuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_le_u16_a, vec_all_leuv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_le_u16_b, vec_all_leuv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_le_s32_a, vec_all_lev4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_all_le_s32_b, vec_all_lev4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_le_b32_a, vec_all_leuv4si, B_DEP, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_le_b32_b, vec_all_lev4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_all_le_b32_c, vec_all_leuv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_le_u32_a, vec_all_leuv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_le_u32_b, vec_all_leuv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_le_s64_a, vec_all_lev2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_all_le_s64_b, vec_all_lev2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_le_b64_a, vec_all_leuv2di, B_DEP, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_le_b64_b, vec_all_lev2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_all_le_b64_c, vec_all_leuv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_le_u64_a, vec_all_leuv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_le_u64_b, vec_all_leuv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_le_flt, vec_all_lev4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_all_le_dbl, vec_all_lev2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_all_lt, s390_vec_all_lt_s8_a,s390_vec_all_lt_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_all_lt_s8_a, vec_all_ltv16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_all_lt_s8_b, vec_all_ltv16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_lt_b8_a, vec_all_ltuv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_lt_b8_b, vec_all_ltv16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_all_lt_b8_c, vec_all_ltuv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_lt_u8_a, vec_all_ltuv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_all_lt_u8_b, vec_all_ltuv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_all_lt_s16_a, vec_all_ltv8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_all_lt_s16_b, vec_all_ltv8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_lt_b16_a, vec_all_ltuv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_lt_b16_b, vec_all_ltv8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_all_lt_b16_c, vec_all_ltuv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_lt_u16_a, vec_all_ltuv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_all_lt_u16_b, vec_all_ltuv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_all_lt_s32_a, vec_all_ltv4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_all_lt_s32_b, vec_all_ltv4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_lt_b32_a, vec_all_ltuv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_lt_b32_b, vec_all_ltv4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_all_lt_b32_c, vec_all_ltuv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_lt_u32_a, vec_all_ltuv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_all_lt_u32_b, vec_all_ltuv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_all_lt_s64_a, vec_all_ltv2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_all_lt_s64_b, vec_all_ltv2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_lt_b64_a, vec_all_ltuv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_lt_b64_b, vec_all_ltv2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_all_lt_b64_c, vec_all_ltuv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_lt_u64_a, vec_all_ltuv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_all_lt_u64_b, vec_all_ltuv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_all_lt_dbl, vec_all_ltv2df, 0, BT_OV_INT_V2DF_V2DF) - -B_DEF (vec_any_eqv16qi, vec_any_eqv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_any_eqv8hi, vec_any_eqv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_any_eqv4si, vec_any_eqv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_any_eqv2di, vec_any_eqv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_any_eqv2df, vec_any_eqv2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_any_nev16qi, vec_any_nev16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_any_nev8hi, vec_any_nev8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_any_nev4si, vec_any_nev4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_any_nev2di, vec_any_nev2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_any_nev2df, vec_any_nev2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_any_gev16qi, vec_any_gev16qi, 0, B_VX | B_INT, 0, BT_FN_INT_V16QI_V16QI) -B_DEF (vec_any_geuv16qi, vec_any_geuv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_any_gev8hi, vec_any_gev8hi, 0, B_VX | B_INT, 0, BT_FN_INT_V8HI_V8HI) -B_DEF (vec_any_geuv8hi, vec_any_geuv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_any_gev4si, vec_any_gev4si, 0, B_VX | B_INT, 0, BT_FN_INT_V4SI_V4SI) -B_DEF (vec_any_geuv4si, vec_any_geuv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_any_gev2di, vec_any_gev2di, 0, B_VX | B_INT, 0, BT_FN_INT_V2DI_V2DI) -B_DEF (vec_any_geuv2di, vec_any_geuv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_any_gev2df, vec_any_gev2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_any_gtv16qi, vec_any_gtv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_V16QI_V16QI) -B_DEF (vec_any_gtuv16qi, vec_any_gtuv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_any_gtv8hi, vec_any_gtv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_V8HI_V8HI) -B_DEF (vec_any_gtuv8hi, vec_any_gtuv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_any_gtv4si, vec_any_gtv4si, 0, B_VX | B_INT, 0, BT_FN_INT_V4SI_V4SI) -B_DEF (vec_any_gtuv4si, vec_any_gtuv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_any_gtv2di, vec_any_gtv2di, 0, B_VX | B_INT, 0, BT_FN_INT_V2DI_V2DI) -B_DEF (vec_any_gtuv2di, vec_any_gtuv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_any_gtv2df, vec_any_gtv2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_any_lev16qi, vec_any_lev16qi, 0, B_VX | B_INT, 0, BT_FN_INT_V16QI_V16QI) -B_DEF (vec_any_leuv16qi, vec_any_leuv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_any_lev8hi, vec_any_lev8hi, 0, B_VX | B_INT, 0, BT_FN_INT_V8HI_V8HI) -B_DEF (vec_any_leuv8hi, vec_any_leuv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_any_lev4si, vec_any_lev4si, 0, B_VX | B_INT, 0, BT_FN_INT_V4SI_V4SI) -B_DEF (vec_any_leuv4si, vec_any_leuv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_any_lev2di, vec_any_lev2di, 0, B_VX | B_INT, 0, BT_FN_INT_V2DI_V2DI) -B_DEF (vec_any_leuv2di, vec_any_leuv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_any_lev2df, vec_any_lev2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (vec_any_ltv16qi, vec_any_ltv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_V16QI_V16QI) -B_DEF (vec_any_ltuv16qi, vec_any_ltuv16qi, 0, B_VX | B_INT, 0, BT_FN_INT_UV16QI_UV16QI) -B_DEF (vec_any_ltv8hi, vec_any_ltv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_V8HI_V8HI) -B_DEF (vec_any_ltuv8hi, vec_any_ltuv8hi, 0, B_VX | B_INT, 0, BT_FN_INT_UV8HI_UV8HI) -B_DEF (vec_any_ltv4si, vec_any_ltv4si, 0, B_VX | B_INT, 0, BT_FN_INT_V4SI_V4SI) -B_DEF (vec_any_ltuv4si, vec_any_ltuv4si, 0, B_VX | B_INT, 0, BT_FN_INT_UV4SI_UV4SI) -B_DEF (vec_any_ltv2di, vec_any_ltv2di, 0, B_VX | B_INT, 0, BT_FN_INT_V2DI_V2DI) -B_DEF (vec_any_ltuv2di, vec_any_ltuv2di, 0, B_VX | B_INT, 0, BT_FN_INT_UV2DI_UV2DI) -B_DEF (vec_any_ltv2df, vec_any_ltv2df, 0, B_VX | B_INT, 0, BT_FN_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_all_lt_s8_a, vec_all_ltv16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_all_lt_s8_b, vec_all_ltv16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_lt_b8_a, vec_all_ltuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_lt_b8_b, vec_all_ltv16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_all_lt_b8_c, vec_all_ltuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_lt_u8_a, vec_all_ltuv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_all_lt_u8_b, vec_all_ltuv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_all_lt_s16_a, vec_all_ltv8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_all_lt_s16_b, vec_all_ltv8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_lt_b16_a, vec_all_ltuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_lt_b16_b, vec_all_ltv8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_all_lt_b16_c, vec_all_ltuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_lt_u16_a, vec_all_ltuv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_all_lt_u16_b, vec_all_ltuv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_all_lt_s32_a, vec_all_ltv4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_all_lt_s32_b, vec_all_ltv4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_lt_b32_a, vec_all_ltuv4si, B_DEP, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_lt_b32_b, vec_all_ltv4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_all_lt_b32_c, vec_all_ltuv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_lt_u32_a, vec_all_ltuv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_all_lt_u32_b, vec_all_ltuv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_all_lt_s64_a, vec_all_ltv2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_all_lt_s64_b, vec_all_ltv2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_lt_b64_a, vec_all_ltuv2di, B_DEP, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_lt_b64_b, vec_all_ltv2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_all_lt_b64_c, vec_all_ltuv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_lt_u64_a, vec_all_ltuv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_all_lt_u64_b, vec_all_ltuv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_all_lt_flt, vec_all_ltv4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_all_lt_dbl, vec_all_ltv2df, 0, 0, BT_OV_INT_V2DF_V2DF) + +B_DEF (vec_any_eqv16qi, vec_any_eqv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_any_eqv8hi, vec_any_eqv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_any_eqv4si, vec_any_eqv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_any_eqv2di, vec_any_eqv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_any_eqv4sf, vec_any_eqv4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_any_eqv2df, vec_any_eqv2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_any_nev16qi, vec_any_nev16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_any_nev8hi, vec_any_nev8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_any_nev4si, vec_any_nev4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_any_nev2di, vec_any_nev2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_any_nev4sf, vec_any_nev4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_any_nev2df, vec_any_nev2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_any_gev16qi, vec_any_gev16qi, 0, B_INT | B_VX, 0, BT_FN_INT_V16QI_V16QI) +B_DEF (vec_any_geuv16qi, vec_any_geuv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_any_gev8hi, vec_any_gev8hi, 0, B_INT | B_VX, 0, BT_FN_INT_V8HI_V8HI) +B_DEF (vec_any_geuv8hi, vec_any_geuv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_any_gev4si, vec_any_gev4si, 0, B_INT | B_VX, 0, BT_FN_INT_V4SI_V4SI) +B_DEF (vec_any_geuv4si, vec_any_geuv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_any_gev2di, vec_any_gev2di, 0, B_INT | B_VX, 0, BT_FN_INT_V2DI_V2DI) +B_DEF (vec_any_geuv2di, vec_any_geuv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_any_gev4sf, vec_any_gev4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_any_gev2df, vec_any_gev2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_any_gtv16qi, vec_any_gtv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_V16QI_V16QI) +B_DEF (vec_any_gtuv16qi, vec_any_gtuv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_any_gtv8hi, vec_any_gtv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_V8HI_V8HI) +B_DEF (vec_any_gtuv8hi, vec_any_gtuv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_any_gtv4si, vec_any_gtv4si, 0, B_INT | B_VX, 0, BT_FN_INT_V4SI_V4SI) +B_DEF (vec_any_gtuv4si, vec_any_gtuv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_any_gtv2di, vec_any_gtv2di, 0, B_INT | B_VX, 0, BT_FN_INT_V2DI_V2DI) +B_DEF (vec_any_gtuv2di, vec_any_gtuv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_any_gtv4sf, vec_any_gtv4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_any_gtv2df, vec_any_gtv2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_any_lev16qi, vec_any_lev16qi, 0, B_INT | B_VX, 0, BT_FN_INT_V16QI_V16QI) +B_DEF (vec_any_leuv16qi, vec_any_leuv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_any_lev8hi, vec_any_lev8hi, 0, B_INT | B_VX, 0, BT_FN_INT_V8HI_V8HI) +B_DEF (vec_any_leuv8hi, vec_any_leuv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_any_lev4si, vec_any_lev4si, 0, B_INT | B_VX, 0, BT_FN_INT_V4SI_V4SI) +B_DEF (vec_any_leuv4si, vec_any_leuv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_any_lev2di, vec_any_lev2di, 0, B_INT | B_VX, 0, BT_FN_INT_V2DI_V2DI) +B_DEF (vec_any_leuv2di, vec_any_leuv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_any_lev4sf, vec_any_lev4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_any_lev2df, vec_any_lev2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_any_ltv16qi, vec_any_ltv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_V16QI_V16QI) +B_DEF (vec_any_ltuv16qi, vec_any_ltuv16qi, 0, B_INT | B_VX, 0, BT_FN_INT_UV16QI_UV16QI) +B_DEF (vec_any_ltv8hi, vec_any_ltv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_V8HI_V8HI) +B_DEF (vec_any_ltuv8hi, vec_any_ltuv8hi, 0, B_INT | B_VX, 0, BT_FN_INT_UV8HI_UV8HI) +B_DEF (vec_any_ltv4si, vec_any_ltv4si, 0, B_INT | B_VX, 0, BT_FN_INT_V4SI_V4SI) +B_DEF (vec_any_ltuv4si, vec_any_ltuv4si, 0, B_INT | B_VX, 0, BT_FN_INT_UV4SI_UV4SI) +B_DEF (vec_any_ltv2di, vec_any_ltv2di, 0, B_INT | B_VX, 0, BT_FN_INT_V2DI_V2DI) +B_DEF (vec_any_ltuv2di, vec_any_ltuv2di, 0, B_INT | B_VX, 0, BT_FN_INT_UV2DI_UV2DI) +B_DEF (vec_any_ltv4sf, vec_any_ltv4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_any_ltv2df, vec_any_ltv2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) OB_DEF (s390_vec_any_eq, s390_vec_any_eq_s8_a,s390_vec_any_eq_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_any_eq_s8_a, vec_any_eqv16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_any_eq_s8_b, vec_any_eqv16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_eq_b8_a, vec_any_eqv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_eq_b8_b, vec_any_eqv16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_any_eq_b8_c, vec_any_eqv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_eq_u8_a, vec_any_eqv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_eq_u8_b, vec_any_eqv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_eq_s16_a, vec_any_eqv8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_any_eq_s16_b, vec_any_eqv8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_eq_b16_a, vec_any_eqv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_eq_b16_b, vec_any_eqv8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_any_eq_b16_c, vec_any_eqv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_eq_u16_a, vec_any_eqv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_eq_u16_b, vec_any_eqv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_eq_s32_a, vec_any_eqv4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_any_eq_s32_b, vec_any_eqv4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_eq_b32_a, vec_any_eqv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_eq_b32_b, vec_any_eqv4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_any_eq_b32_c, vec_any_eqv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_eq_u32_a, vec_any_eqv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_eq_u32_b, vec_any_eqv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_eq_s64_a, vec_any_eqv2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_any_eq_s64_b, vec_any_eqv2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_eq_b64_a, vec_any_eqv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_eq_b64_b, vec_any_eqv2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_any_eq_b64_c, vec_any_eqv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_eq_u64_a, vec_any_eqv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_eq_u64_b, vec_any_eqv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_eq_dbl, vec_any_eqv2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_any_eq_s8_a, vec_any_eqv16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_any_eq_s8_b, vec_any_eqv16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_eq_b8_a, vec_any_eqv16qi, 0, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_eq_b8_b, vec_any_eqv16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_any_eq_b8_c, vec_any_eqv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_eq_u8_a, vec_any_eqv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_eq_u8_b, vec_any_eqv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_eq_s16_a, vec_any_eqv8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_any_eq_s16_b, vec_any_eqv8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_eq_b16_a, vec_any_eqv8hi, 0, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_eq_b16_b, vec_any_eqv8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_any_eq_b16_c, vec_any_eqv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_eq_u16_a, vec_any_eqv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_eq_u16_b, vec_any_eqv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_eq_s32_a, vec_any_eqv4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_any_eq_s32_b, vec_any_eqv4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_eq_b32_a, vec_any_eqv4si, 0, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_eq_b32_b, vec_any_eqv4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_any_eq_b32_c, vec_any_eqv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_eq_u32_a, vec_any_eqv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_eq_u32_b, vec_any_eqv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_eq_s64_a, vec_any_eqv2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_any_eq_s64_b, vec_any_eqv2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_eq_b64_a, vec_any_eqv2di, 0, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_eq_b64_b, vec_any_eqv2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_any_eq_b64_c, vec_any_eqv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_eq_u64_a, vec_any_eqv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_eq_u64_b, vec_any_eqv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_eq_flt, vec_any_eqv4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_any_eq_dbl, vec_any_eqv2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_any_ne, s390_vec_any_ne_s8_a,s390_vec_any_ne_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_any_ne_s8_a, vec_any_nev16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_any_ne_s8_b, vec_any_nev16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_ne_b8_a, vec_any_nev16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_ne_b8_b, vec_any_nev16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_any_ne_b8_c, vec_any_nev16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_ne_u8_a, vec_any_nev16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_ne_u8_b, vec_any_nev16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_ne_s16_a, vec_any_nev8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_any_ne_s16_b, vec_any_nev8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_ne_b16_a, vec_any_nev8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_ne_b16_b, vec_any_nev8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_any_ne_b16_c, vec_any_nev8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_ne_u16_a, vec_any_nev8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_ne_u16_b, vec_any_nev8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_ne_s32_a, vec_any_nev4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_any_ne_s32_b, vec_any_nev4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_ne_b32_a, vec_any_nev4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_ne_b32_b, vec_any_nev4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_any_ne_b32_c, vec_any_nev4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_ne_u32_a, vec_any_nev4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_ne_u32_b, vec_any_nev4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_ne_s64_a, vec_any_nev2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_any_ne_s64_b, vec_any_nev2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_ne_b64_a, vec_any_nev2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_ne_b64_b, vec_any_nev2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_any_ne_b64_c, vec_any_nev2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_ne_u64_a, vec_any_nev2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_ne_u64_b, vec_any_nev2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_ne_dbl, vec_any_nev2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_any_ne_s8_a, vec_any_nev16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_any_ne_s8_b, vec_any_nev16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_ne_b8_a, vec_any_nev16qi, 0, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_ne_b8_b, vec_any_nev16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_any_ne_b8_c, vec_any_nev16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_ne_u8_a, vec_any_nev16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_ne_u8_b, vec_any_nev16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_ne_s16_a, vec_any_nev8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_any_ne_s16_b, vec_any_nev8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_ne_b16_a, vec_any_nev8hi, 0, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_ne_b16_b, vec_any_nev8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_any_ne_b16_c, vec_any_nev8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_ne_u16_a, vec_any_nev8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_ne_u16_b, vec_any_nev8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_ne_s32_a, vec_any_nev4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_any_ne_s32_b, vec_any_nev4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_ne_b32_a, vec_any_nev4si, 0, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_ne_b32_b, vec_any_nev4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_any_ne_b32_c, vec_any_nev4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_ne_u32_a, vec_any_nev4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_ne_u32_b, vec_any_nev4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_ne_s64_a, vec_any_nev2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_any_ne_s64_b, vec_any_nev2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_ne_b64_a, vec_any_nev2di, 0, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_ne_b64_b, vec_any_nev2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_any_ne_b64_c, vec_any_nev2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_ne_u64_a, vec_any_nev2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_ne_u64_b, vec_any_nev2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_ne_flt, vec_any_nev4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_any_ne_dbl, vec_any_nev2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_any_ge, s390_vec_any_ge_s8_a,s390_vec_any_ge_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_any_ge_s8_a, vec_any_gev16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_any_ge_s8_b, vec_any_gev16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_ge_b8_a, vec_any_geuv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_ge_b8_b, vec_any_gev16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_any_ge_b8_c, vec_any_geuv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_ge_u8_a, vec_any_geuv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_ge_u8_b, vec_any_geuv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_ge_s16_a, vec_any_gev8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_any_ge_s16_b, vec_any_gev8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_ge_b16_a, vec_any_geuv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_ge_b16_b, vec_any_gev8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_any_ge_b16_c, vec_any_geuv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_ge_u16_a, vec_any_geuv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_ge_u16_b, vec_any_geuv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_ge_s32_a, vec_any_gev4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_any_ge_s32_b, vec_any_gev4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_ge_b32_a, vec_any_geuv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_ge_b32_b, vec_any_gev4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_any_ge_b32_c, vec_any_geuv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_ge_u32_a, vec_any_geuv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_ge_u32_b, vec_any_geuv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_ge_s64_a, vec_any_gev2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_any_ge_s64_b, vec_any_gev2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_ge_b64_a, vec_any_geuv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_ge_b64_b, vec_any_gev2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_any_ge_b64_c, vec_any_geuv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_ge_u64_a, vec_any_geuv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_ge_u64_b, vec_any_geuv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_ge_dbl, vec_any_gev2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_any_ge_s8_a, vec_any_gev16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_any_ge_s8_b, vec_any_gev16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_ge_b8_a, vec_any_geuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_ge_b8_b, vec_any_gev16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_any_ge_b8_c, vec_any_geuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_ge_u8_a, vec_any_geuv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_ge_u8_b, vec_any_geuv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_ge_s16_a, vec_any_gev8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_any_ge_s16_b, vec_any_gev8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_ge_b16_a, vec_any_geuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_ge_b16_b, vec_any_gev8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_any_ge_b16_c, vec_any_geuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_ge_u16_a, vec_any_geuv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_ge_u16_b, vec_any_geuv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_ge_s32_a, vec_any_gev4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_any_ge_s32_b, vec_any_gev4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_ge_b32_a, vec_any_geuv4si, B_DEP, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_ge_b32_b, vec_any_gev4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_any_ge_b32_c, vec_any_geuv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_ge_u32_a, vec_any_geuv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_ge_u32_b, vec_any_geuv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_ge_s64_a, vec_any_gev2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_any_ge_s64_b, vec_any_gev2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_ge_b64_a, vec_any_geuv2di, B_DEP, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_ge_b64_b, vec_any_gev2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_any_ge_b64_c, vec_any_geuv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_ge_u64_a, vec_any_geuv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_ge_u64_b, vec_any_geuv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_ge_flt, vec_any_gev4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_any_ge_dbl, vec_any_gev2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_any_gt, s390_vec_any_gt_s8_a,s390_vec_any_gt_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_any_gt_s8_a, vec_any_gtv16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_any_gt_s8_b, vec_any_gtv16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_gt_b8_a, vec_any_gtuv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_gt_b8_b, vec_any_gtv16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_any_gt_b8_c, vec_any_gtuv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_gt_u8_a, vec_any_gtuv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_gt_u8_b, vec_any_gtuv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_gt_s16_a, vec_any_gtv8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_any_gt_s16_b, vec_any_gtv8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_gt_b16_a, vec_any_gtuv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_gt_b16_b, vec_any_gtv8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_any_gt_b16_c, vec_any_gtuv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_gt_u16_a, vec_any_gtuv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_gt_u16_b, vec_any_gtuv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_gt_s32_a, vec_any_gtv4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_any_gt_s32_b, vec_any_gtv4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_gt_b32_a, vec_any_gtuv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_gt_b32_b, vec_any_gtv4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_any_gt_b32_c, vec_any_gtuv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_gt_u32_a, vec_any_gtuv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_gt_u32_b, vec_any_gtuv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_gt_s64_a, vec_any_gtv2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_any_gt_s64_b, vec_any_gtv2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_gt_b64_a, vec_any_gtuv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_gt_b64_b, vec_any_gtv2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_any_gt_b64_c, vec_any_gtuv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_gt_u64_a, vec_any_gtuv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_gt_u64_b, vec_any_gtuv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_gt_dbl, vec_any_gtv2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_any_gt_s8_a, vec_any_gtv16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_any_gt_s8_b, vec_any_gtv16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_gt_b8_a, vec_any_gtuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_gt_b8_b, vec_any_gtv16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_any_gt_b8_c, vec_any_gtuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_gt_u8_a, vec_any_gtuv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_gt_u8_b, vec_any_gtuv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_gt_s16_a, vec_any_gtv8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_any_gt_s16_b, vec_any_gtv8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_gt_b16_a, vec_any_gtuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_gt_b16_b, vec_any_gtv8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_any_gt_b16_c, vec_any_gtuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_gt_u16_a, vec_any_gtuv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_gt_u16_b, vec_any_gtuv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_gt_s32_a, vec_any_gtv4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_any_gt_s32_b, vec_any_gtv4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_gt_b32_a, vec_any_gtuv4si, B_DEP, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_gt_b32_b, vec_any_gtv4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_any_gt_b32_c, vec_any_gtuv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_gt_u32_a, vec_any_gtuv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_gt_u32_b, vec_any_gtuv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_gt_s64_a, vec_any_gtv2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_any_gt_s64_b, vec_any_gtv2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_gt_b64_a, vec_any_gtuv2di, B_DEP, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_gt_b64_b, vec_any_gtv2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_any_gt_b64_c, vec_any_gtuv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_gt_u64_a, vec_any_gtuv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_gt_u64_b, vec_any_gtuv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_gt_flt, vec_any_gtv4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_any_gt_dbl, vec_any_gtv2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_any_le, s390_vec_any_le_s8_a,s390_vec_any_le_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_any_le_s8_a, vec_any_lev16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_any_le_s8_b, vec_any_lev16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_le_b8_a, vec_any_leuv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_le_b8_b, vec_any_lev16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_any_le_b8_c, vec_any_leuv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_le_u8_a, vec_any_leuv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_le_u8_b, vec_any_leuv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_le_s16_a, vec_any_lev8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_any_le_s16_b, vec_any_lev8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_le_b16_a, vec_any_leuv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_le_b16_b, vec_any_lev8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_any_le_b16_c, vec_any_leuv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_le_u16_a, vec_any_leuv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_le_u16_b, vec_any_leuv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_le_s32_a, vec_any_lev4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_any_le_s32_b, vec_any_lev4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_le_b32_a, vec_any_leuv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_le_b32_b, vec_any_lev4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_any_le_b32_c, vec_any_leuv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_le_u32_a, vec_any_leuv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_le_u32_b, vec_any_leuv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_le_s64_a, vec_any_lev2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_any_le_s64_b, vec_any_lev2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_le_b64_a, vec_any_leuv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_le_b64_b, vec_any_lev2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_any_le_b64_c, vec_any_leuv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_le_u64_a, vec_any_leuv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_le_u64_b, vec_any_leuv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_le_dbl, vec_any_lev2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_any_le_s8_a, vec_any_lev16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_any_le_s8_b, vec_any_lev16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_le_b8_a, vec_any_leuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_le_b8_b, vec_any_lev16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_any_le_b8_c, vec_any_leuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_le_u8_a, vec_any_leuv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_le_u8_b, vec_any_leuv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_le_s16_a, vec_any_lev8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_any_le_s16_b, vec_any_lev8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_le_b16_a, vec_any_leuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_le_b16_b, vec_any_lev8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_any_le_b16_c, vec_any_leuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_le_u16_a, vec_any_leuv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_le_u16_b, vec_any_leuv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_le_s32_a, vec_any_lev4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_any_le_s32_b, vec_any_lev4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_le_b32_a, vec_any_leuv4si, B_DEP, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_le_b32_b, vec_any_lev4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_any_le_b32_c, vec_any_leuv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_le_u32_a, vec_any_leuv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_le_u32_b, vec_any_leuv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_le_s64_a, vec_any_lev2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_any_le_s64_b, vec_any_lev2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_le_b64_a, vec_any_leuv2di, B_DEP, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_le_b64_b, vec_any_lev2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_any_le_b64_c, vec_any_leuv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_le_u64_a, vec_any_leuv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_le_u64_b, vec_any_leuv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_le_flt, vec_any_lev4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_any_le_dbl, vec_any_lev2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_any_lt, s390_vec_any_lt_s8_a,s390_vec_any_lt_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_any_lt_s8_a, vec_any_ltv16qi, 0, BT_OV_INT_V16QI_V16QI) -OB_DEF_VAR (s390_vec_any_lt_s8_b, vec_any_ltv16qi, 0, BT_OV_INT_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_lt_b8_a, vec_any_ltuv16qi, 0, BT_OV_INT_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_lt_b8_b, vec_any_ltv16qi, 0, BT_OV_INT_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_any_lt_b8_c, vec_any_ltuv16qi, 0, BT_OV_INT_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_lt_u8_a, vec_any_ltuv16qi, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_any_lt_u8_b, vec_any_ltuv16qi, 0, BT_OV_INT_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_any_lt_s16_a, vec_any_ltv8hi, 0, BT_OV_INT_V8HI_V8HI) -OB_DEF_VAR (s390_vec_any_lt_s16_b, vec_any_ltv8hi, 0, BT_OV_INT_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_lt_b16_a, vec_any_ltuv8hi, 0, BT_OV_INT_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_lt_b16_b, vec_any_ltv8hi, 0, BT_OV_INT_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_any_lt_b16_c, vec_any_ltuv8hi, 0, BT_OV_INT_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_lt_u16_a, vec_any_ltuv8hi, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_any_lt_u16_b, vec_any_ltuv8hi, 0, BT_OV_INT_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_any_lt_s32_a, vec_any_ltv4si, 0, BT_OV_INT_V4SI_V4SI) -OB_DEF_VAR (s390_vec_any_lt_s32_b, vec_any_ltv4si, 0, BT_OV_INT_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_lt_b32_a, vec_any_ltuv4si, 0, BT_OV_INT_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_lt_b32_b, vec_any_ltv4si, 0, BT_OV_INT_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_any_lt_b32_c, vec_any_ltuv4si, 0, BT_OV_INT_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_lt_u32_a, vec_any_ltuv4si, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_any_lt_u32_b, vec_any_ltuv4si, 0, BT_OV_INT_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_any_lt_s64_a, vec_any_ltv2di, 0, BT_OV_INT_V2DI_V2DI) -OB_DEF_VAR (s390_vec_any_lt_s64_b, vec_any_ltv2di, 0, BT_OV_INT_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_lt_b64_a, vec_any_ltuv2di, 0, BT_OV_INT_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_lt_b64_b, vec_any_ltv2di, 0, BT_OV_INT_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_any_lt_b64_c, vec_any_ltuv2di, 0, BT_OV_INT_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_lt_u64_a, vec_any_ltuv2di, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_any_lt_u64_b, vec_any_ltuv2di, 0, BT_OV_INT_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_any_lt_dbl, vec_any_ltv2df, 0, BT_OV_INT_V2DF_V2DF) +OB_DEF_VAR (s390_vec_any_lt_s8_a, vec_any_ltv16qi, 0, 0, BT_OV_INT_V16QI_V16QI) +OB_DEF_VAR (s390_vec_any_lt_s8_b, vec_any_ltv16qi, B_DEP, 0, BT_OV_INT_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_lt_b8_a, vec_any_ltuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_lt_b8_b, vec_any_ltv16qi, B_DEP, 0, BT_OV_INT_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_any_lt_b8_c, vec_any_ltuv16qi, B_DEP, 0, BT_OV_INT_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_lt_u8_a, vec_any_ltuv16qi, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_any_lt_u8_b, vec_any_ltuv16qi, B_DEP, 0, BT_OV_INT_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_any_lt_s16_a, vec_any_ltv8hi, 0, 0, BT_OV_INT_V8HI_V8HI) +OB_DEF_VAR (s390_vec_any_lt_s16_b, vec_any_ltv8hi, B_DEP, 0, BT_OV_INT_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_lt_b16_a, vec_any_ltuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_lt_b16_b, vec_any_ltv8hi, B_DEP, 0, BT_OV_INT_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_any_lt_b16_c, vec_any_ltuv8hi, B_DEP, 0, BT_OV_INT_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_lt_u16_a, vec_any_ltuv8hi, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_any_lt_u16_b, vec_any_ltuv8hi, B_DEP, 0, BT_OV_INT_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_any_lt_s32_a, vec_any_ltv4si, 0, 0, BT_OV_INT_V4SI_V4SI) +OB_DEF_VAR (s390_vec_any_lt_s32_b, vec_any_ltv4si, B_DEP, 0, BT_OV_INT_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_lt_b32_a, vec_any_ltuv4si, B_DEP, 0, BT_OV_INT_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_lt_b32_b, vec_any_ltv4si, B_DEP, 0, BT_OV_INT_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_any_lt_b32_c, vec_any_ltuv4si, B_DEP, 0, BT_OV_INT_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_lt_u32_a, vec_any_ltuv4si, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_any_lt_u32_b, vec_any_ltuv4si, B_DEP, 0, BT_OV_INT_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_any_lt_s64_a, vec_any_ltv2di, 0, 0, BT_OV_INT_V2DI_V2DI) +OB_DEF_VAR (s390_vec_any_lt_s64_b, vec_any_ltv2di, B_DEP, 0, BT_OV_INT_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_lt_b64_a, vec_any_ltuv2di, B_DEP, 0, BT_OV_INT_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_lt_b64_b, vec_any_ltv2di, B_DEP, 0, BT_OV_INT_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_any_lt_b64_c, vec_any_ltuv2di, B_DEP, 0, BT_OV_INT_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_lt_u64_a, vec_any_ltuv2di, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_any_lt_u64_b, vec_any_ltuv2di, B_DEP, 0, BT_OV_INT_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_any_lt_flt, vec_any_ltv4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_any_lt_dbl, vec_any_ltv2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_cmpeq, s390_vec_cmpeq_s8, s390_vec_cmpeq_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_cmpeq_s8, s390_vceqb, 0, BT_OV_BV16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_cmpeq_u8, s390_vceqb, 0, BT_OV_BV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_cmpeq_b8, s390_vceqb, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_cmpeq_s16, s390_vceqh, 0, BT_OV_BV8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_cmpeq_u16, s390_vceqh, 0, BT_OV_BV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_cmpeq_b16, s390_vceqh, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_cmpeq_s32, s390_vceqf, 0, BT_OV_BV4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_cmpeq_u32, s390_vceqf, 0, BT_OV_BV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_cmpeq_b32, s390_vceqf, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_cmpeq_s64, s390_vceqg, 0, BT_OV_BV2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_cmpeq_u64, s390_vceqg, 0, BT_OV_BV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_cmpeq_b64, s390_vceqg, 0, BT_OV_BV2DI_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_cmpeq_dbl, s390_vfcedb, 0, BT_OV_BV2DI_V2DF_V2DF) +OB_DEF_VAR (s390_vec_cmpeq_s8, s390_vceqb, 0, 0, BT_OV_BV16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_cmpeq_u8, s390_vceqb, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_cmpeq_b8, s390_vceqb, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_cmpeq_s16, s390_vceqh, 0, 0, BT_OV_BV8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_cmpeq_u16, s390_vceqh, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_cmpeq_b16, s390_vceqh, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_cmpeq_s32, s390_vceqf, 0, 0, BT_OV_BV4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_cmpeq_u32, s390_vceqf, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_cmpeq_b32, s390_vceqf, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_cmpeq_s64, s390_vceqg, 0, 0, BT_OV_BV2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_cmpeq_u64, s390_vceqg, 0, 0, BT_OV_BV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_cmpeq_b64, s390_vceqg, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_cmpeq_flt, s390_vfcesb, B_VXE, 0, BT_OV_BV4SI_V4SF_V4SF) +OB_DEF_VAR (s390_vec_cmpeq_dbl, s390_vfcedb, 0, 0, BT_OV_BV2DI_V2DF_V2DF) B_DEF (s390_vceqb, vec_cmpeqv16qi, 0, B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI) B_DEF (s390_vceqh, vec_cmpeqv8hi, 0, B_VX, 0, BT_FN_V8HI_UV8HI_UV8HI) B_DEF (s390_vceqf, vec_cmpeqv4si, 0, B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (s390_vceqg, vec_cmpeqv2di, 0, B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) +B_DEF (s390_vfcesb, vec_cmpeqv4sf, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) B_DEF (s390_vfcedb, vec_cmpeqv2df, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmpge, s390_vec_cmpge_s8, s390_vec_cmpge_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_cmpge_s8, vec_cmpgev16qi, 0, BT_OV_BV16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_cmpge_u8, vec_cmpgeuv16qi, 0, BT_OV_BV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_cmpge_s16, vec_cmpgev8hi, 0, BT_OV_BV8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_cmpge_u16, vec_cmpgeuv8hi, 0, BT_OV_BV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_cmpge_s32, vec_cmpgev4si, 0, BT_OV_BV4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_cmpge_u32, vec_cmpgeuv4si, 0, BT_OV_BV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_cmpge_s64, vec_cmpgev2di, 0, BT_OV_BV2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_cmpge_u64, vec_cmpgeuv2di, 0, BT_OV_BV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_cmpge_dbl, s390_vfchedb, 0, BT_OV_BV2DI_V2DF_V2DF) - -B_DEF (vec_cmpgev16qi, vec_cmpgev16qi, 0, B_VX | B_INT, 0, BT_FN_V16QI_UV16QI_UV16QI) -B_DEF (vec_cmpgeuv16qi, vec_cmpgeuv16qi, 0, B_VX | B_INT, 0, BT_FN_V16QI_UV16QI_UV16QI) -B_DEF (vec_cmpgev8hi, vec_cmpgev8hi, 0, B_VX | B_INT, 0, BT_FN_V8HI_UV8HI_UV8HI) -B_DEF (vec_cmpgeuv8hi, vec_cmpgeuv8hi, 0, B_VX | B_INT, 0, BT_FN_V8HI_UV8HI_UV8HI) -B_DEF (vec_cmpgev4si, vec_cmpgev4si, 0, B_VX | B_INT, 0, BT_FN_V4SI_UV4SI_UV4SI) -B_DEF (vec_cmpgeuv4si, vec_cmpgeuv4si, 0, B_VX | B_INT, 0, BT_FN_V4SI_UV4SI_UV4SI) -B_DEF (vec_cmpgev2di, vec_cmpgev2di, 0, B_VX | B_INT, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (vec_cmpgeuv2di, vec_cmpgeuv2di, 0, B_VX | B_INT, 0, BT_FN_V2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_cmpge_s8, vec_cmpgev16qi, 0, 0, BT_OV_BV16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_cmpge_u8, vec_cmpgeuv16qi, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_cmpge_s16, vec_cmpgev8hi, 0, 0, BT_OV_BV8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_cmpge_u16, vec_cmpgeuv8hi, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_cmpge_s32, vec_cmpgev4si, 0, 0, BT_OV_BV4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_cmpge_u32, vec_cmpgeuv4si, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_cmpge_s64, vec_cmpgev2di, 0, 0, BT_OV_BV2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_cmpge_u64, vec_cmpgeuv2di, 0, 0, BT_OV_BV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_cmpge_flt, s390_vfchesb, B_VXE, 0, BT_OV_BV4SI_V4SF_V4SF) +OB_DEF_VAR (s390_vec_cmpge_dbl, s390_vfchedb, 0, 0, BT_OV_BV2DI_V2DF_V2DF) + +B_DEF (vec_cmpgev16qi, vec_cmpgev16qi, 0, B_INT | B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI) +B_DEF (vec_cmpgeuv16qi, vec_cmpgeuv16qi, 0, B_INT | B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI) +B_DEF (vec_cmpgev8hi, vec_cmpgev8hi, 0, B_INT | B_VX, 0, BT_FN_V8HI_UV8HI_UV8HI) +B_DEF (vec_cmpgeuv8hi, vec_cmpgeuv8hi, 0, B_INT | B_VX, 0, BT_FN_V8HI_UV8HI_UV8HI) +B_DEF (vec_cmpgev4si, vec_cmpgev4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) +B_DEF (vec_cmpgeuv4si, vec_cmpgeuv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) +B_DEF (vec_cmpgev2di, vec_cmpgev2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) +B_DEF (vec_cmpgeuv2di, vec_cmpgeuv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) +B_DEF (s390_vfchesb, vec_cmpgev4sf, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) B_DEF (s390_vfchedb, vec_cmpgev2df, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmpgt, s390_vec_cmpgt_s8, s390_vec_cmpgt_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_cmpgt_s8, s390_vchb, 0, BT_OV_BV16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_cmpgt_u8, s390_vchlb, 0, BT_OV_BV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_cmpgt_s16, s390_vchh, 0, BT_OV_BV8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_cmpgt_u16, s390_vchlh, 0, BT_OV_BV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_cmpgt_s32, s390_vchf, 0, BT_OV_BV4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_cmpgt_u32, s390_vchlf, 0, BT_OV_BV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_cmpgt_s64, s390_vchg, 0, BT_OV_BV2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_cmpgt_u64, s390_vchlg, 0, BT_OV_BV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_cmpgt_dbl, s390_vfchdb, 0, BT_OV_BV2DI_V2DF_V2DF) +OB_DEF_VAR (s390_vec_cmpgt_s8, s390_vchb, 0, 0, BT_OV_BV16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_cmpgt_u8, s390_vchlb, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_cmpgt_s16, s390_vchh, 0, 0, BT_OV_BV8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_cmpgt_u16, s390_vchlh, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_cmpgt_s32, s390_vchf, 0, 0, BT_OV_BV4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_cmpgt_u32, s390_vchlf, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_cmpgt_s64, s390_vchg, 0, 0, BT_OV_BV2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_cmpgt_u64, s390_vchlg, 0, 0, BT_OV_BV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_cmpgt_flt, s390_vfchsb, B_VXE, 0, BT_OV_BV4SI_V4SF_V4SF) +OB_DEF_VAR (s390_vec_cmpgt_dbl, s390_vfchdb, 0, 0, BT_OV_BV2DI_V2DF_V2DF) B_DEF (s390_vchb, vec_cmpgtv16qi, 0, B_VX, 0, BT_FN_V16QI_V16QI_V16QI) B_DEF (s390_vchlb, vec_cmpgtuv16qi, 0, B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI) @@ -1395,59 +1513,64 @@ B_DEF (s390_vchf, vec_cmpgtv4si, 0, B_DEF (s390_vchlf, vec_cmpgtuv4si, 0, B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (s390_vchg, vec_cmpgtv2di, 0, B_VX, 0, BT_FN_V2DI_V2DI_V2DI) B_DEF (s390_vchlg, vec_cmpgtuv2di, 0, B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) +B_DEF (s390_vfchsb, vec_cmpgtv4sf, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) B_DEF (s390_vfchdb, vec_cmpgtv2df, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmple, s390_vec_cmple_s8, s390_vec_cmple_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_cmple_s8, vec_cmplev16qi, 0, BT_OV_BV16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_cmple_u8, vec_cmpleuv16qi, 0, BT_OV_BV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_cmple_s16, vec_cmplev8hi, 0, BT_OV_BV8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_cmple_u16, vec_cmpleuv8hi, 0, BT_OV_BV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_cmple_s32, vec_cmplev4si, 0, BT_OV_BV4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_cmple_u32, vec_cmpleuv4si, 0, BT_OV_BV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_cmple_s64, vec_cmplev2di, 0, BT_OV_BV2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_cmple_u64, vec_cmpleuv2di, 0, BT_OV_BV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_cmple_dbl, vec_cmplev2df, 0, BT_OV_BV2DI_V2DF_V2DF) - -B_DEF (vec_cmplev16qi, vec_cmplev16qi, 0, B_VX | B_INT, 0, BT_FN_V16QI_UV16QI_UV16QI) -B_DEF (vec_cmpleuv16qi, vec_cmpleuv16qi, 0, B_VX | B_INT, 0, BT_FN_V16QI_UV16QI_UV16QI) -B_DEF (vec_cmplev8hi, vec_cmplev8hi, 0, B_VX | B_INT, 0, BT_FN_V8HI_UV8HI_UV8HI) -B_DEF (vec_cmpleuv8hi, vec_cmpleuv8hi, 0, B_VX | B_INT, 0, BT_FN_V8HI_UV8HI_UV8HI) -B_DEF (vec_cmplev4si, vec_cmplev4si, 0, B_VX | B_INT, 0, BT_FN_V4SI_UV4SI_UV4SI) -B_DEF (vec_cmpleuv4si, vec_cmpleuv4si, 0, B_VX | B_INT, 0, BT_FN_V4SI_UV4SI_UV4SI) -B_DEF (vec_cmplev2di, vec_cmplev2di, 0, B_VX | B_INT, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (vec_cmpleuv2di, vec_cmpleuv2di, 0, B_VX | B_INT, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (vec_cmplev2df, vec_cmplev2df, 0, B_VX | B_INT, 0, BT_FN_V2DI_V2DF_V2DF) +OB_DEF_VAR (s390_vec_cmple_s8, vec_cmplev16qi, 0, 0, BT_OV_BV16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_cmple_u8, vec_cmpleuv16qi, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_cmple_s16, vec_cmplev8hi, 0, 0, BT_OV_BV8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_cmple_u16, vec_cmpleuv8hi, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_cmple_s32, vec_cmplev4si, 0, 0, BT_OV_BV4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_cmple_u32, vec_cmpleuv4si, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_cmple_s64, vec_cmplev2di, 0, 0, BT_OV_BV2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_cmple_u64, vec_cmpleuv2di, 0, 0, BT_OV_BV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_cmple_flt, vec_cmplev4sf, B_VXE, 0, BT_OV_BV4SI_V4SF_V4SF) +OB_DEF_VAR (s390_vec_cmple_dbl, vec_cmplev2df, 0, 0, BT_OV_BV2DI_V2DF_V2DF) + +B_DEF (vec_cmplev16qi, vec_cmplev16qi, 0, B_INT | B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI) +B_DEF (vec_cmpleuv16qi, vec_cmpleuv16qi, 0, B_INT | B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI) +B_DEF (vec_cmplev8hi, vec_cmplev8hi, 0, B_INT | B_VX, 0, BT_FN_V8HI_UV8HI_UV8HI) +B_DEF (vec_cmpleuv8hi, vec_cmpleuv8hi, 0, B_INT | B_VX, 0, BT_FN_V8HI_UV8HI_UV8HI) +B_DEF (vec_cmplev4si, vec_cmplev4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) +B_DEF (vec_cmpleuv4si, vec_cmpleuv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) +B_DEF (vec_cmplev2di, vec_cmplev2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) +B_DEF (vec_cmpleuv2di, vec_cmpleuv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) +B_DEF (vec_cmplev4sf, vec_cmplev4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (vec_cmplev2df, vec_cmplev2df, 0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmplt, s390_vec_cmplt_s8, s390_vec_cmplt_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_cmplt_s8, vec_cmpltv16qi, 0, BT_OV_BV16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_cmplt_u8, vec_cmpltuv16qi, 0, BT_OV_BV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_cmplt_s16, vec_cmpltv8hi, 0, BT_OV_BV8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_cmplt_u16, vec_cmpltuv8hi, 0, BT_OV_BV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_cmplt_s32, vec_cmpltv4si, 0, BT_OV_BV4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_cmplt_u32, vec_cmpltuv4si, 0, BT_OV_BV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_cmplt_s64, vec_cmpltv2di, 0, BT_OV_BV2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_cmplt_u64, vec_cmpltuv2di, 0, BT_OV_BV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_cmplt_dbl, vec_cmpltv2df, 0, BT_OV_BV2DI_V2DF_V2DF) - -B_DEF (vec_cmpltv16qi, vec_cmpltv16qi, 0, B_VX | B_INT, 0, BT_FN_V16QI_UV16QI_UV16QI) -B_DEF (vec_cmpltuv16qi, vec_cmpltuv16qi, 0, B_VX | B_INT, 0, BT_FN_V16QI_UV16QI_UV16QI) -B_DEF (vec_cmpltv8hi, vec_cmpltv8hi, 0, B_VX | B_INT, 0, BT_FN_V8HI_UV8HI_UV8HI) -B_DEF (vec_cmpltuv8hi, vec_cmpltuv8hi, 0, B_VX | B_INT, 0, BT_FN_V8HI_UV8HI_UV8HI) -B_DEF (vec_cmpltv4si, vec_cmpltv4si, 0, B_VX | B_INT, 0, BT_FN_V4SI_UV4SI_UV4SI) -B_DEF (vec_cmpltuv4si, vec_cmpltuv4si, 0, B_VX | B_INT, 0, BT_FN_V4SI_UV4SI_UV4SI) -B_DEF (vec_cmpltv2di, vec_cmpltv2di, 0, B_VX | B_INT, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (vec_cmpltuv2di, vec_cmpltuv2di, 0, B_VX | B_INT, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (vec_cmpltv2df, vec_cmpltv2df, 0, B_VX | B_INT, 0, BT_FN_V2DI_V2DF_V2DF) +OB_DEF_VAR (s390_vec_cmplt_s8, vec_cmpltv16qi, 0, 0, BT_OV_BV16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_cmplt_u8, vec_cmpltuv16qi, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_cmplt_s16, vec_cmpltv8hi, 0, 0, BT_OV_BV8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_cmplt_u16, vec_cmpltuv8hi, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_cmplt_s32, vec_cmpltv4si, 0, 0, BT_OV_BV4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_cmplt_u32, vec_cmpltuv4si, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_cmplt_s64, vec_cmpltv2di, 0, 0, BT_OV_BV2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_cmplt_u64, vec_cmpltuv2di, 0, 0, BT_OV_BV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_cmplt_flt, vec_cmpltv4sf, B_VXE, 0, BT_OV_BV4SI_V4SF_V4SF) +OB_DEF_VAR (s390_vec_cmplt_dbl, vec_cmpltv2df, 0, 0, BT_OV_BV2DI_V2DF_V2DF) + +B_DEF (vec_cmpltv16qi, vec_cmpltv16qi, 0, B_INT | B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI) +B_DEF (vec_cmpltuv16qi, vec_cmpltuv16qi, 0, B_INT | B_VX, 0, BT_FN_V16QI_UV16QI_UV16QI) +B_DEF (vec_cmpltv8hi, vec_cmpltv8hi, 0, B_INT | B_VX, 0, BT_FN_V8HI_UV8HI_UV8HI) +B_DEF (vec_cmpltuv8hi, vec_cmpltuv8hi, 0, B_INT | B_VX, 0, BT_FN_V8HI_UV8HI_UV8HI) +B_DEF (vec_cmpltv4si, vec_cmpltv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) +B_DEF (vec_cmpltuv4si, vec_cmpltuv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) +B_DEF (vec_cmpltv2di, vec_cmpltv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) +B_DEF (vec_cmpltuv2di, vec_cmpltuv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) +B_DEF (vec_cmpltv4sf, vec_cmpltv4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (vec_cmpltv2df, vec_cmpltv2df, 0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cntlz, s390_vec_cntlz_s8, s390_vec_cntlz_u64, B_VX, BT_FN_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_cntlz_s8, s390_vclzb, 0, BT_OV_UV16QI_V16QI) -OB_DEF_VAR (s390_vec_cntlz_u8, s390_vclzb, 0, BT_OV_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_cntlz_s16, s390_vclzh, 0, BT_OV_UV8HI_V8HI) -OB_DEF_VAR (s390_vec_cntlz_u16, s390_vclzh, 0, BT_OV_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_cntlz_s32, s390_vclzf, 0, BT_OV_UV4SI_V4SI) -OB_DEF_VAR (s390_vec_cntlz_u32, s390_vclzf, 0, BT_OV_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_cntlz_s64, s390_vclzg, 0, BT_OV_UV2DI_V2DI) -OB_DEF_VAR (s390_vec_cntlz_u64, s390_vclzg, 0, BT_OV_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_cntlz_s8, s390_vclzb, 0, 0, BT_OV_UV16QI_V16QI) +OB_DEF_VAR (s390_vec_cntlz_u8, s390_vclzb, 0, 0, BT_OV_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_cntlz_s16, s390_vclzh, 0, 0, BT_OV_UV8HI_V8HI) +OB_DEF_VAR (s390_vec_cntlz_u16, s390_vclzh, 0, 0, BT_OV_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_cntlz_s32, s390_vclzf, 0, 0, BT_OV_UV4SI_V4SI) +OB_DEF_VAR (s390_vec_cntlz_u32, s390_vclzf, 0, 0, BT_OV_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_cntlz_s64, s390_vclzg, 0, 0, BT_OV_UV2DI_V2DI) +OB_DEF_VAR (s390_vec_cntlz_u64, s390_vclzg, 0, 0, BT_OV_UV2DI_UV2DI) B_DEF (s390_vclzb, clzv16qi2, 0, B_VX, 0, BT_FN_UV16QI_UV16QI) B_DEF (s390_vclzh, clzv8hi2, 0, B_VX, 0, BT_FN_UV8HI_UV8HI) @@ -1455,14 +1578,14 @@ B_DEF (s390_vclzf, clzv4si2, 0, B_DEF (s390_vclzg, clzv2di2, 0, B_VX, 0, BT_FN_UV2DI_UV2DI) OB_DEF (s390_vec_cnttz, s390_vec_cnttz_s8, s390_vec_cnttz_u64, B_VX, BT_FN_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_cnttz_s8, s390_vctzb, 0, BT_OV_UV16QI_V16QI) -OB_DEF_VAR (s390_vec_cnttz_u8, s390_vctzb, 0, BT_OV_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_cnttz_s16, s390_vctzh, 0, BT_OV_UV8HI_V8HI) -OB_DEF_VAR (s390_vec_cnttz_u16, s390_vctzh, 0, BT_OV_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_cnttz_s32, s390_vctzf, 0, BT_OV_UV4SI_V4SI) -OB_DEF_VAR (s390_vec_cnttz_u32, s390_vctzf, 0, BT_OV_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_cnttz_s64, s390_vctzg, 0, BT_OV_UV2DI_V2DI) -OB_DEF_VAR (s390_vec_cnttz_u64, s390_vctzg, 0, BT_OV_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_cnttz_s8, s390_vctzb, 0, 0, BT_OV_UV16QI_V16QI) +OB_DEF_VAR (s390_vec_cnttz_u8, s390_vctzb, 0, 0, BT_OV_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_cnttz_s16, s390_vctzh, 0, 0, BT_OV_UV8HI_V8HI) +OB_DEF_VAR (s390_vec_cnttz_u16, s390_vctzh, 0, 0, BT_OV_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_cnttz_s32, s390_vctzf, 0, 0, BT_OV_UV4SI_V4SI) +OB_DEF_VAR (s390_vec_cnttz_u32, s390_vctzf, 0, 0, BT_OV_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_cnttz_s64, s390_vctzg, 0, 0, BT_OV_UV2DI_V2DI) +OB_DEF_VAR (s390_vec_cnttz_u64, s390_vctzg, 0, 0, BT_OV_UV2DI_UV2DI) B_DEF (s390_vctzb, ctzv16qi2, 0, B_VX, 0, BT_FN_UV16QI_UV16QI) B_DEF (s390_vctzh, ctzv8hi2, 0, B_VX, 0, BT_FN_UV8HI_UV8HI) @@ -1470,44 +1593,44 @@ B_DEF (s390_vctzf, ctzv4si2, 0, B_DEF (s390_vctzg, ctzv2di2, 0, B_VX, 0, BT_FN_UV2DI_UV2DI) OB_DEF (s390_vec_xor, s390_vec_xor_b8, s390_vec_xor_dbl_c, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_xor_b8, s390_vx, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_xor_s8_a, s390_vx, 0, BT_OV_V16QI_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_xor_s8_b, s390_vx, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_xor_s8_c, s390_vx, 0, BT_OV_V16QI_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_xor_u8_a, s390_vx, 0, BT_OV_UV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_xor_u8_b, s390_vx, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_xor_u8_c, s390_vx, 0, BT_OV_UV16QI_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_xor_b16, s390_vx, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_xor_s16_a, s390_vx, 0, BT_OV_V8HI_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_xor_s16_b, s390_vx, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_xor_s16_c, s390_vx, 0, BT_OV_V8HI_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_xor_u16_a, s390_vx, 0, BT_OV_UV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_xor_u16_b, s390_vx, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_xor_u16_c, s390_vx, 0, BT_OV_UV8HI_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_xor_b32, s390_vx, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_xor_s32_a, s390_vx, 0, BT_OV_V4SI_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_xor_s32_b, s390_vx, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_xor_s32_c, s390_vx, 0, BT_OV_V4SI_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_xor_u32_a, s390_vx, 0, BT_OV_UV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_xor_u32_b, s390_vx, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_xor_u32_c, s390_vx, 0, BT_OV_UV4SI_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_xor_b64, s390_vx, 0, BT_OV_BV2DI_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_xor_s64_a, s390_vx, 0, BT_OV_V2DI_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_xor_s64_b, s390_vx, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_xor_s64_c, s390_vx, 0, BT_OV_V2DI_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_xor_u64_a, s390_vx, 0, BT_OV_UV2DI_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_xor_u64_b, s390_vx, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_xor_u64_c, s390_vx, 0, BT_OV_UV2DI_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_xor_dbl_a, s390_vx, 0, BT_OV_V2DF_BV2DI_V2DF) -OB_DEF_VAR (s390_vec_xor_dbl_b, s390_vx, 0, BT_OV_V2DF_V2DF_V2DF) -OB_DEF_VAR (s390_vec_xor_dbl_c, s390_vx, 0, BT_OV_V2DF_V2DF_BV2DI) +OB_DEF_VAR (s390_vec_xor_b8, s390_vx, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_xor_s8_a, s390_vx, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_xor_s8_b, s390_vx, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_xor_s8_c, s390_vx, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_xor_u8_a, s390_vx, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_xor_u8_b, s390_vx, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_xor_u8_c, s390_vx, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_xor_b16, s390_vx, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_xor_s16_a, s390_vx, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_xor_s16_b, s390_vx, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_xor_s16_c, s390_vx, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_xor_u16_a, s390_vx, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_xor_u16_b, s390_vx, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_xor_u16_c, s390_vx, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_xor_b32, s390_vx, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_xor_s32_a, s390_vx, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_xor_s32_b, s390_vx, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_xor_s32_c, s390_vx, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_xor_u32_a, s390_vx, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_xor_u32_b, s390_vx, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_xor_u32_c, s390_vx, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_xor_b64, s390_vx, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_xor_s64_a, s390_vx, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_xor_s64_b, s390_vx, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_xor_s64_c, s390_vx, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_xor_u64_a, s390_vx, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_xor_u64_b, s390_vx, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_xor_u64_c, s390_vx, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_xor_dbl_a, s390_vx, B_DEP, 0, BT_OV_V2DF_BV2DI_V2DF) +OB_DEF_VAR (s390_vec_xor_dbl_b, s390_vx, 0, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_xor_dbl_c, s390_vx, B_DEP, 0, BT_OV_V2DF_V2DF_BV2DI) B_DEF (s390_vx, xorv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_gfmsum, s390_vec_gfmsum_u8, s390_vec_gfmsum_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_gfmsum_u8, s390_vgfmb, 0, BT_OV_UV8HI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_gfmsum_u16, s390_vgfmh, 0, BT_OV_UV4SI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_gfmsum_u32, s390_vgfmf, 0, BT_OV_UV2DI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_gfmsum_u8, s390_vgfmb, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_gfmsum_u16, s390_vgfmh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_gfmsum_u32, s390_vgfmf, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI) B_DEF (s390_vgfmb, vec_gfmsumv16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI) B_DEF (s390_vgfmh, vec_gfmsumv8hi, 0, B_VX, 0, BT_FN_UV4SI_UV8HI_UV8HI) @@ -1515,9 +1638,9 @@ B_DEF (s390_vgfmf, vec_gfmsumv4si, 0, B_DEF (s390_vgfmg, vec_gfmsum_128, 0, B_VX, 0, BT_FN_UV16QI_UV2DI_UV2DI) OB_DEF (s390_vec_gfmsum_accum, s390_vec_gfmsum_accum_u8,s390_vec_gfmsum_accum_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_gfmsum_accum_u8, s390_vgfmab, 0, BT_OV_UV8HI_UV16QI_UV16QI_UV8HI) -OB_DEF_VAR (s390_vec_gfmsum_accum_u16, s390_vgfmah, 0, BT_OV_UV4SI_UV8HI_UV8HI_UV4SI) -OB_DEF_VAR (s390_vec_gfmsum_accum_u32, s390_vgfmaf, 0, BT_OV_UV2DI_UV4SI_UV4SI_UV2DI) +OB_DEF_VAR (s390_vec_gfmsum_accum_u8, s390_vgfmab, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI_UV8HI) +OB_DEF_VAR (s390_vec_gfmsum_accum_u16, s390_vgfmah, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI_UV4SI) +OB_DEF_VAR (s390_vec_gfmsum_accum_u32, s390_vgfmaf, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI_UV2DI) B_DEF (s390_vgfmab, vec_gfmsum_accumv16qi,0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI_UV8HI) B_DEF (s390_vgfmah, vec_gfmsum_accumv8hi,0, B_VX, 0, BT_FN_UV4SI_UV8HI_UV8HI_UV4SI) @@ -1525,44 +1648,47 @@ B_DEF (s390_vgfmaf, vec_gfmsum_accumv4si,0, B_DEF (s390_vgfmag, vec_gfmsum_accum_128,0, B_VX, 0, BT_FN_UV16QI_UV2DI_UV2DI_UV16QI) OB_DEF (s390_vec_abs, s390_vec_abs_s8, s390_vec_abs_dbl, B_VX, BT_FN_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_abs_s8, s390_vlpb, 0, BT_OV_V16QI_V16QI) -OB_DEF_VAR (s390_vec_abs_s16, s390_vlph, 0, BT_OV_V8HI_V8HI) -OB_DEF_VAR (s390_vec_abs_s32, s390_vlpf, 0, BT_OV_V4SI_V4SI) -OB_DEF_VAR (s390_vec_abs_s64, s390_vlpg, 0, BT_OV_V2DI_V2DI) -OB_DEF_VAR (s390_vec_abs_dbl, s390_vflpdb, 0, BT_OV_V2DF_V2DF) +OB_DEF_VAR (s390_vec_abs_s8, s390_vlpb, 0, 0, BT_OV_V16QI_V16QI) +OB_DEF_VAR (s390_vec_abs_s16, s390_vlph, 0, 0, BT_OV_V8HI_V8HI) +OB_DEF_VAR (s390_vec_abs_s32, s390_vlpf, 0, 0, BT_OV_V4SI_V4SI) +OB_DEF_VAR (s390_vec_abs_s64, s390_vlpg, 0, 0, BT_OV_V2DI_V2DI) +OB_DEF_VAR (s390_vec_abs_flt, s390_vflpsb, B_VXE, 0, BT_OV_V4SF_V4SF) +OB_DEF_VAR (s390_vec_abs_dbl, s390_vflpdb, 0, 0, BT_OV_V2DF_V2DF) B_DEF (s390_vlpb, absv16qi2, 0, B_VX, 0, BT_FN_V16QI_V16QI) B_DEF (s390_vlph, absv8hi2, 0, B_VX, 0, BT_FN_V8HI_V8HI) B_DEF (s390_vlpf, absv4si2, 0, B_VX, 0, BT_FN_V4SI_V4SI) B_DEF (s390_vlpg, absv2di2, 0, B_VX, 0, BT_FN_V2DI_V2DI) +B_DEF (s390_vflpsb, absv4sf2, 0, B_VXE, 0, BT_FN_V4SF_V4SF) B_DEF (s390_vflpdb, absv2df2, 0, B_VX, 0, BT_FN_V2DF_V2DF) OB_DEF (s390_vec_max, s390_vec_max_s8_a, s390_vec_max_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_max_s8_a, s390_vmxb, 0, BT_OV_V16QI_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_max_s8_b, s390_vmxb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_max_s8_c, s390_vmxb, 0, BT_OV_V16QI_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_max_u8_a, s390_vmxlb, 0, BT_OV_UV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_max_u8_b, s390_vmxlb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_max_u8_c, s390_vmxlb, 0, BT_OV_UV16QI_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_max_s16_a, s390_vmxh, 0, BT_OV_V8HI_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_max_s16_b, s390_vmxh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_max_s16_c, s390_vmxh, 0, BT_OV_V8HI_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_max_u16_a, s390_vmxlh, 0, BT_OV_UV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_max_u16_b, s390_vmxlh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_max_u16_c, s390_vmxlh, 0, BT_OV_UV8HI_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_max_s32_a, s390_vmxf, 0, BT_OV_V4SI_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_max_s32_b, s390_vmxf, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_max_s32_c, s390_vmxf, 0, BT_OV_V4SI_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_max_u32_a, s390_vmxlf, 0, BT_OV_UV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_max_u32_b, s390_vmxlf, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_max_u32_c, s390_vmxlf, 0, BT_OV_UV4SI_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_max_s64_a, s390_vmxg, 0, BT_OV_V2DI_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_max_s64_b, s390_vmxg, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_max_s64_c, s390_vmxg, 0, BT_OV_V2DI_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_max_u64_a, s390_vmxlg, 0, BT_OV_UV2DI_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_max_u64_b, s390_vmxlg, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_max_u64_c, s390_vmxlg, 0, BT_OV_UV2DI_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_max_dbl, s390_vec_max_dbl, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_max_s8_a, s390_vmxb, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_max_s8_b, s390_vmxb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_max_s8_c, s390_vmxb, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_max_u8_a, s390_vmxlb, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_max_u8_b, s390_vmxlb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_max_u8_c, s390_vmxlb, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_max_s16_a, s390_vmxh, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_max_s16_b, s390_vmxh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_max_s16_c, s390_vmxh, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_max_u16_a, s390_vmxlh, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_max_u16_b, s390_vmxlh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_max_u16_c, s390_vmxlh, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_max_s32_a, s390_vmxf, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_max_s32_b, s390_vmxf, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_max_s32_c, s390_vmxf, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_max_u32_a, s390_vmxlf, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_max_u32_b, s390_vmxlf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_max_u32_c, s390_vmxlf, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_max_s64_a, s390_vmxg, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_max_s64_b, s390_vmxg, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_max_s64_c, s390_vmxg, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_max_u64_a, s390_vmxlg, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_max_u64_b, s390_vmxlg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_max_u64_c, s390_vmxlg, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_max_flt, s390_vfmaxsb_4, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_max_dbl, s390_vfmaxdb_4, 0, 0, BT_OV_V2DF_V2DF_V2DF) B_DEF (s390_vmxb, smaxv16qi3, 0, B_VX, 0, BT_FN_V16QI_BV16QI_V16QI) B_DEF (s390_vmxlb, umaxv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) @@ -1572,34 +1698,38 @@ B_DEF (s390_vmxf, smaxv4si3, 0, B_DEF (s390_vmxlf, umaxv4si3, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI) B_DEF (s390_vmxg, smaxv2di3, 0, B_VX, 0, BT_FN_V2DI_BV2DI_V2DI) B_DEF (s390_vmxlg, umaxv2di3, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI) -B_DEF (s390_vec_max_dbl, smaxv2df3, 0, B_VX | B_INT, 0, BT_FN_V2DF_V2DF_V2DF) +B_DEF (s390_vfmaxsb, vfmaxv4sf, 0, B_VXE, O3_U4, BT_FN_V4SF_V4SF_V4SF_INT) +B_DEF (s390_vfmaxdb, vfmaxv2df, 0, B_VXE, O3_U4, BT_FN_V2DF_V2DF_V2DF_INT) +B_DEF (s390_vfmaxsb_4, smaxv4sf3, 0, B_INT | B_VXE, 0, BT_FN_V4SF_V4SF_V4SF) +B_DEF (s390_vfmaxdb_4, smaxv2df3, 0, B_INT | B_VXE, 0, BT_FN_V2DF_V2DF_V2DF) OB_DEF (s390_vec_min, s390_vec_min_s8_a, s390_vec_min_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_min_s8_a, s390_vmnb, 0, BT_OV_V16QI_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_min_s8_b, s390_vmnb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_min_s8_c, s390_vmnb, 0, BT_OV_V16QI_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_min_u8_a, s390_vmnlb, 0, BT_OV_UV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_min_u8_b, s390_vmnlb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_min_u8_c, s390_vmnlb, 0, BT_OV_UV16QI_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_min_s16_a, s390_vmnh, 0, BT_OV_V8HI_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_min_s16_b, s390_vmnh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_min_s16_c, s390_vmnh, 0, BT_OV_V8HI_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_min_u16_a, s390_vmnlh, 0, BT_OV_UV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_min_u16_b, s390_vmnlh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_min_u16_c, s390_vmnlh, 0, BT_OV_UV8HI_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_min_s32_a, s390_vmnf, 0, BT_OV_V4SI_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_min_s32_b, s390_vmnf, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_min_s32_c, s390_vmnf, 0, BT_OV_V4SI_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_min_u32_a, s390_vmnlf, 0, BT_OV_UV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_min_u32_b, s390_vmnlf, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_min_u32_c, s390_vmnlf, 0, BT_OV_UV4SI_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_min_s64_a, s390_vmng, 0, BT_OV_V2DI_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_min_s64_b, s390_vmng, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_min_s64_c, s390_vmng, 0, BT_OV_V2DI_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_min_u64_a, s390_vmnlg, 0, BT_OV_UV2DI_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_min_u64_b, s390_vmnlg, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_min_u64_c, s390_vmnlg, 0, BT_OV_UV2DI_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_min_dbl, s390_vec_min_dbl, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_min_s8_a, s390_vmnb, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_min_s8_b, s390_vmnb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_min_s8_c, s390_vmnb, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_min_u8_a, s390_vmnlb, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_min_u8_b, s390_vmnlb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_min_u8_c, s390_vmnlb, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_min_s16_a, s390_vmnh, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_min_s16_b, s390_vmnh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_min_s16_c, s390_vmnh, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_min_u16_a, s390_vmnlh, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_min_u16_b, s390_vmnlh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_min_u16_c, s390_vmnlh, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_min_s32_a, s390_vmnf, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_min_s32_b, s390_vmnf, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_min_s32_c, s390_vmnf, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_min_u32_a, s390_vmnlf, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_min_u32_b, s390_vmnlf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_min_u32_c, s390_vmnlf, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_min_s64_a, s390_vmng, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_min_s64_b, s390_vmng, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_min_s64_c, s390_vmng, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_min_u64_a, s390_vmnlg, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_min_u64_b, s390_vmnlg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_min_u64_c, s390_vmnlg, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_min_flt, s390_vfminsb_4, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_min_dbl, s390_vfmindb_4, B_VXE, 0, BT_OV_V2DF_V2DF_V2DF) B_DEF (s390_vmnb, sminv16qi3, 0, B_VX, 0, BT_FN_V16QI_BV16QI_V16QI) B_DEF (s390_vmnlb, uminv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) @@ -1609,33 +1739,36 @@ B_DEF (s390_vmnf, sminv4si3, 0, B_DEF (s390_vmnlf, uminv4si3, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI) B_DEF (s390_vmng, sminv2di3, 0, B_VX, 0, BT_FN_V2DI_BV2DI_V2DI) B_DEF (s390_vmnlg, uminv2di3, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI) -B_DEF (s390_vec_min_dbl, sminv2df3, 0, B_VX | B_INT, 0, BT_FN_V2DF_V2DF_V2DF) +B_DEF (s390_vfminsb, vfminv4sf, 0, B_VXE, O3_U4, BT_FN_V4SF_V4SF_V4SF_INT) +B_DEF (s390_vfmindb, vfminv2df, 0, B_VXE, O3_U4, BT_FN_V2DF_V2DF_V2DF_INT) +B_DEF (s390_vfminsb_4, sminv4sf3, 0, B_INT | B_VXE, 0, BT_FN_V4SF_V4SF_V4SF) /* vfminsb */ +B_DEF (s390_vfmindb_4, sminv2df3, 0, B_INT | B_VXE, 0, BT_FN_V2DF_V2DF_V2DF) /* vfmindb */ OB_DEF (s390_vec_mladd, s390_vec_mladd_u8, s390_vec_mladd_s32_c,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_mladd_u8, s390_vmalb, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_mladd_s8_a, s390_vmalb, 0, BT_OV_V16QI_UV16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_mladd_s8_b, s390_vmalb, 0, BT_OV_V16QI_V16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_mladd_s8_c, s390_vmalb, 0, BT_OV_V16QI_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_mladd_u16, s390_vmalhw, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_mladd_s16_a, s390_vmalhw, 0, BT_OV_V8HI_UV8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_mladd_s16_b, s390_vmalhw, 0, BT_OV_V8HI_V8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_mladd_s16_c, s390_vmalhw, 0, BT_OV_V8HI_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_mladd_u32, s390_vmalf, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_mladd_s32_a, s390_vmalf, 0, BT_OV_V4SI_UV4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_mladd_s32_b, s390_vmalf, 0, BT_OV_V4SI_V4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_mladd_s32_c, s390_vmalf, 0, BT_OV_V4SI_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_mladd_u8, s390_vmalb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_mladd_s8_a, s390_vmalb, 0, 0, BT_OV_V16QI_UV16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_mladd_s8_b, s390_vmalb, 0, 0, BT_OV_V16QI_V16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_mladd_s8_c, s390_vmalb, 0, 0, BT_OV_V16QI_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_mladd_u16, s390_vmalhw, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_mladd_s16_a, s390_vmalhw, 0, 0, BT_OV_V8HI_UV8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_mladd_s16_b, s390_vmalhw, 0, 0, BT_OV_V8HI_V8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_mladd_s16_c, s390_vmalhw, 0, 0, BT_OV_V8HI_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_mladd_u32, s390_vmalf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_mladd_s32_a, s390_vmalf, 0, 0, BT_OV_V4SI_UV4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_mladd_s32_b, s390_vmalf, 0, 0, BT_OV_V4SI_V4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_mladd_s32_c, s390_vmalf, 0, 0, BT_OV_V4SI_V4SI_V4SI_V4SI) B_DEF (s390_vmalb, vec_vmalv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI) B_DEF (s390_vmalhw, vec_vmalv8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI_UV8HI) B_DEF (s390_vmalf, vec_vmalv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_mhadd, s390_vec_mhadd_u8, s390_vec_mhadd_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_mhadd_u8, s390_vmalhb, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_mhadd_s8, s390_vmahb, 0, BT_OV_V16QI_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_mhadd_u16, s390_vmalhh, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_mhadd_s16, s390_vmahh, 0, BT_OV_V8HI_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_mhadd_u32, s390_vmalhf, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_mhadd_s32, s390_vmahf, 0, BT_OV_V4SI_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_mhadd_u8, s390_vmalhb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_mhadd_s8, s390_vmahb, 0, 0, BT_OV_V16QI_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_mhadd_u16, s390_vmalhh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_mhadd_s16, s390_vmahh, 0, 0, BT_OV_V8HI_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_mhadd_u32, s390_vmalhf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_mhadd_s32, s390_vmahf, 0, 0, BT_OV_V4SI_V4SI_V4SI_V4SI) B_DEF (s390_vmalhb, vec_vmalhv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI) B_DEF (s390_vmahb, vec_vmahv16qi, 0, B_VX, 0, BT_FN_V16QI_V16QI_V16QI_V16QI) @@ -1645,12 +1778,12 @@ B_DEF (s390_vmalhf, vec_vmalhv4si, 0, B_DEF (s390_vmahf, vec_vmahv4si, 0, B_VX, 0, BT_FN_V4SI_V4SI_V4SI_V4SI) OB_DEF (s390_vec_meadd, s390_vec_meadd_u8, s390_vec_meadd_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_meadd_u8, s390_vmaleb, 0, BT_OV_UV8HI_UV16QI_UV16QI_UV8HI) -OB_DEF_VAR (s390_vec_meadd_s8, s390_vmaeb, 0, BT_OV_V8HI_V16QI_V16QI_V8HI) -OB_DEF_VAR (s390_vec_meadd_u16, s390_vmaleh, 0, BT_OV_UV4SI_UV8HI_UV8HI_UV4SI) -OB_DEF_VAR (s390_vec_meadd_s16, s390_vmaeh, 0, BT_OV_V4SI_V8HI_V8HI_V4SI) -OB_DEF_VAR (s390_vec_meadd_u32, s390_vmalef, 0, BT_OV_UV2DI_UV4SI_UV4SI_UV2DI) -OB_DEF_VAR (s390_vec_meadd_s32, s390_vmaef, 0, BT_OV_V2DI_V4SI_V4SI_V2DI) +OB_DEF_VAR (s390_vec_meadd_u8, s390_vmaleb, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI_UV8HI) +OB_DEF_VAR (s390_vec_meadd_s8, s390_vmaeb, 0, 0, BT_OV_V8HI_V16QI_V16QI_V8HI) +OB_DEF_VAR (s390_vec_meadd_u16, s390_vmaleh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI_UV4SI) +OB_DEF_VAR (s390_vec_meadd_s16, s390_vmaeh, 0, 0, BT_OV_V4SI_V8HI_V8HI_V4SI) +OB_DEF_VAR (s390_vec_meadd_u32, s390_vmalef, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI_UV2DI) +OB_DEF_VAR (s390_vec_meadd_s32, s390_vmaef, 0, 0, BT_OV_V2DI_V4SI_V4SI_V2DI) B_DEF (s390_vmaleb, vec_vmalev16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI_UV8HI) B_DEF (s390_vmaeb, vec_vmaev16qi, 0, B_VX, 0, BT_FN_V8HI_V16QI_V16QI_V8HI) @@ -1660,12 +1793,12 @@ B_DEF (s390_vmalef, vec_vmalev4si, 0, B_DEF (s390_vmaef, vec_vmaev4si, 0, B_VX, 0, BT_FN_V2DI_V4SI_V4SI_V2DI) OB_DEF (s390_vec_moadd, s390_vec_moadd_u8, s390_vec_moadd_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_moadd_u8, s390_vmalob, 0, BT_OV_UV8HI_UV16QI_UV16QI_UV8HI) -OB_DEF_VAR (s390_vec_moadd_s8, s390_vmaob, 0, BT_OV_V8HI_V16QI_V16QI_V8HI) -OB_DEF_VAR (s390_vec_moadd_u16, s390_vmaloh, 0, BT_OV_UV4SI_UV8HI_UV8HI_UV4SI) -OB_DEF_VAR (s390_vec_moadd_s16, s390_vmaoh, 0, BT_OV_V4SI_V8HI_V8HI_V4SI) -OB_DEF_VAR (s390_vec_moadd_u32, s390_vmalof, 0, BT_OV_UV2DI_UV4SI_UV4SI_UV2DI) -OB_DEF_VAR (s390_vec_moadd_s32, s390_vmaof, 0, BT_OV_V2DI_V4SI_V4SI_V2DI) +OB_DEF_VAR (s390_vec_moadd_u8, s390_vmalob, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI_UV8HI) +OB_DEF_VAR (s390_vec_moadd_s8, s390_vmaob, 0, 0, BT_OV_V8HI_V16QI_V16QI_V8HI) +OB_DEF_VAR (s390_vec_moadd_u16, s390_vmaloh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI_UV4SI) +OB_DEF_VAR (s390_vec_moadd_s16, s390_vmaoh, 0, 0, BT_OV_V4SI_V8HI_V8HI_V4SI) +OB_DEF_VAR (s390_vec_moadd_u32, s390_vmalof, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI_UV2DI) +OB_DEF_VAR (s390_vec_moadd_s32, s390_vmaof, 0, 0, BT_OV_V2DI_V4SI_V4SI_V2DI) B_DEF (s390_vmalob, vec_vmalov16qi, 0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI_UV8HI) B_DEF (s390_vmaob, vec_vmaov16qi, 0, B_VX, 0, BT_FN_V8HI_V16QI_V16QI_V8HI) @@ -1675,12 +1808,12 @@ B_DEF (s390_vmalof, vec_vmalov4si, 0, B_DEF (s390_vmaof, vec_vmaov4si, 0, B_VX, 0, BT_FN_V2DI_V4SI_V4SI_V2DI) OB_DEF (s390_vec_mulh, s390_vec_mulh_u8, s390_vec_mulh_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_mulh_u8, s390_vmlhb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_mulh_s8, s390_vmhb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_mulh_u16, s390_vmlhh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_mulh_s16, s390_vmhh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_mulh_u32, s390_vmlhf, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_mulh_s32, s390_vmhf, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_mulh_u8, s390_vmlhb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_mulh_s8, s390_vmhb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_mulh_u16, s390_vmlhh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_mulh_s16, s390_vmhh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_mulh_u32, s390_vmlhf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_mulh_s32, s390_vmhf, 0, 0, BT_OV_V4SI_V4SI_V4SI) B_DEF (s390_vmlhb, vec_umulhv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) B_DEF (s390_vmhb, vec_smulhv16qi, 0, B_VX, 0, BT_FN_V16QI_V16QI_V16QI) @@ -1690,12 +1823,12 @@ B_DEF (s390_vmlhf, vec_umulhv4si, 0, B_DEF (s390_vmhf, vec_smulhv4si, 0, B_VX, 0, BT_FN_V4SI_V4SI_V4SI) OB_DEF (s390_vec_mule, s390_vec_mule_u8, s390_vec_mule_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_mule_u8, s390_vmleb, 0, BT_OV_UV8HI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_mule_s8, s390_vmeb, 0, BT_OV_V8HI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_mule_u16, s390_vmleh, 0, BT_OV_UV4SI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_mule_s15, s390_vmeh, 0, BT_OV_V4SI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_mule_u32, s390_vmlef, 0, BT_OV_UV2DI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_mule_s32, s390_vmef, 0, BT_OV_V2DI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_mule_u8, s390_vmleb, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_mule_s8, s390_vmeb, 0, 0, BT_OV_V8HI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_mule_u16, s390_vmleh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_mule_s15, s390_vmeh, 0, 0, BT_OV_V4SI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_mule_u32, s390_vmlef, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_mule_s32, s390_vmef, 0, 0, BT_OV_V2DI_V4SI_V4SI) B_DEF (s390_vmleb, vec_widen_umult_even_v16qi,0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI) B_DEF (s390_vmeb, vec_widen_smult_even_v16qi,0, B_VX, 0, BT_FN_V8HI_V16QI_V16QI) @@ -1705,12 +1838,12 @@ B_DEF (s390_vmlef, vec_widen_umult_even_v4si,0, B_DEF (s390_vmef, vec_widen_smult_even_v4si,0, B_VX, 0, BT_FN_V2DI_V4SI_V4SI) OB_DEF (s390_vec_mulo, s390_vec_mulo_u8, s390_vec_mulo_s32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_mulo_u8, s390_vmlob, 0, BT_OV_UV8HI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_mulo_s8, s390_vmob, 0, BT_OV_V8HI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_mulo_u16, s390_vmloh, 0, BT_OV_UV4SI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_mulo_s16, s390_vmoh, 0, BT_OV_V4SI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_mulo_u32, s390_vmlof, 0, BT_OV_UV2DI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_mulo_s32, s390_vmof, 0, BT_OV_V2DI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_mulo_u8, s390_vmlob, 0, 0, BT_OV_UV8HI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_mulo_s8, s390_vmob, 0, 0, BT_OV_V8HI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_mulo_u16, s390_vmloh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_mulo_s16, s390_vmoh, 0, 0, BT_OV_V4SI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_mulo_u32, s390_vmlof, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_mulo_s32, s390_vmof, 0, 0, BT_OV_V2DI_V4SI_V4SI) B_DEF (s390_vmlob, vec_widen_umult_odd_v16qi,0, B_VX, 0, BT_FN_UV8HI_UV16QI_UV16QI) B_DEF (s390_vmob, vec_widen_smult_odd_v16qi,0, B_VX, 0, BT_FN_V8HI_V16QI_V16QI) @@ -1720,99 +1853,105 @@ B_DEF (s390_vmlof, vec_widen_umult_odd_v4si,0, B_DEF (s390_vmof, vec_widen_smult_odd_v4si,0, B_VX, 0, BT_FN_V2DI_V4SI_V4SI) OB_DEF (s390_vec_nor, s390_vec_nor_b8, s390_vec_nor_dbl_c, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_nor_b8, s390_vno, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_nor_s8_a, s390_vno, 0, BT_OV_V16QI_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_nor_s8_b, s390_vno, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_nor_s8_c, s390_vno, 0, BT_OV_V16QI_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_nor_u8_a, s390_vno, 0, BT_OV_UV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_nor_u8_b, s390_vno, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_nor_u8_c, s390_vno, 0, BT_OV_UV16QI_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_nor_b16, s390_vno, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_nor_s16_a, s390_vno, 0, BT_OV_V8HI_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_nor_s16_b, s390_vno, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_nor_s16_c, s390_vno, 0, BT_OV_V8HI_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_nor_u16_a, s390_vno, 0, BT_OV_UV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_nor_u16_b, s390_vno, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_nor_u16_c, s390_vno, 0, BT_OV_UV8HI_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_nor_b32, s390_vno, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_nor_s32_a, s390_vno, 0, BT_OV_V4SI_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_nor_s32_b, s390_vno, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_nor_s32_c, s390_vno, 0, BT_OV_V4SI_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_nor_u32_a, s390_vno, 0, BT_OV_UV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_nor_u32_b, s390_vno, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_nor_u32_c, s390_vno, 0, BT_OV_UV4SI_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_nor_b64, s390_vno, 0, BT_OV_BV2DI_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_nor_s64_a, s390_vno, 0, BT_OV_V2DI_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_nor_s64_b, s390_vno, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_nor_s64_c, s390_vno, 0, BT_OV_V2DI_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_nor_u64_a, s390_vno, 0, BT_OV_UV2DI_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_nor_u64_b, s390_vno, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_nor_u64_c, s390_vno, 0, BT_OV_UV2DI_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_nor_dbl_a, s390_vno, 0, BT_OV_V2DF_BV2DI_V2DF) -OB_DEF_VAR (s390_vec_nor_dbl_b, s390_vno, 0, BT_OV_V2DF_V2DF_V2DF) -OB_DEF_VAR (s390_vec_nor_dbl_c, s390_vno, 0, BT_OV_V2DF_V2DF_BV2DI) +OB_DEF_VAR (s390_vec_nor_b8, s390_vno, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_nor_s8_a, s390_vno, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_nor_s8_b, s390_vno, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_nor_s8_c, s390_vno, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_nor_u8_a, s390_vno, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_nor_u8_b, s390_vno, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_nor_u8_c, s390_vno, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_nor_b16, s390_vno, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_nor_s16_a, s390_vno, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_nor_s16_b, s390_vno, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_nor_s16_c, s390_vno, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_nor_u16_a, s390_vno, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_nor_u16_b, s390_vno, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_nor_u16_c, s390_vno, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_nor_b32, s390_vno, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_nor_s32_a, s390_vno, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_nor_s32_b, s390_vno, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_nor_s32_c, s390_vno, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_nor_u32_a, s390_vno, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_nor_u32_b, s390_vno, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_nor_u32_c, s390_vno, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_nor_b64, s390_vno, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_nor_s64_a, s390_vno, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_nor_s64_b, s390_vno, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_nor_s64_c, s390_vno, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_nor_u64_a, s390_vno, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_nor_u64_b, s390_vno, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_nor_u64_c, s390_vno, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_nor_flt_a, s390_vno, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF) +OB_DEF_VAR (s390_vec_nor_flt_b, s390_vno, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_nor_flt_c, s390_vno, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI) +OB_DEF_VAR (s390_vec_nor_dbl_a, s390_vno, B_DEP, 0, BT_OV_V2DF_BV2DI_V2DF) +OB_DEF_VAR (s390_vec_nor_dbl_b, s390_vno, 0, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_nor_dbl_c, s390_vno, B_DEP, 0, BT_OV_V2DF_V2DF_BV2DI) B_DEF (s390_vno, vec_norv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_or, s390_vec_or_b8, s390_vec_or_dbl_c, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_or_b8, s390_vo, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vec_or_s8_a, s390_vo, 0, BT_OV_V16QI_BV16QI_V16QI) -OB_DEF_VAR (s390_vec_or_s8_b, s390_vo, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_or_s8_c, s390_vo, 0, BT_OV_V16QI_V16QI_BV16QI) -OB_DEF_VAR (s390_vec_or_u8_a, s390_vo, 0, BT_OV_UV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_or_u8_b, s390_vo, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_or_u8_c, s390_vo, 0, BT_OV_UV16QI_UV16QI_BV16QI) -OB_DEF_VAR (s390_vec_or_b16, s390_vo, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vec_or_s16_a, s390_vo, 0, BT_OV_V8HI_BV8HI_V8HI) -OB_DEF_VAR (s390_vec_or_s16_b, s390_vo, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_or_s16_c, s390_vo, 0, BT_OV_V8HI_V8HI_BV8HI) -OB_DEF_VAR (s390_vec_or_u16_a, s390_vo, 0, BT_OV_UV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_or_u16_b, s390_vo, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_or_u16_c, s390_vo, 0, BT_OV_UV8HI_UV8HI_BV8HI) -OB_DEF_VAR (s390_vec_or_b32, s390_vo, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vec_or_s32_a, s390_vo, 0, BT_OV_V4SI_BV4SI_V4SI) -OB_DEF_VAR (s390_vec_or_s32_b, s390_vo, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_or_s32_c, s390_vo, 0, BT_OV_V4SI_V4SI_BV4SI) -OB_DEF_VAR (s390_vec_or_u32_a, s390_vo, 0, BT_OV_UV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_or_u32_b, s390_vo, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_or_u32_c, s390_vo, 0, BT_OV_UV4SI_UV4SI_BV4SI) -OB_DEF_VAR (s390_vec_or_b64, s390_vo, 0, BT_OV_BV2DI_BV2DI_BV2DI) -OB_DEF_VAR (s390_vec_or_s64_a, s390_vo, 0, BT_OV_V2DI_BV2DI_V2DI) -OB_DEF_VAR (s390_vec_or_s64_b, s390_vo, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_or_s64_c, s390_vo, 0, BT_OV_V2DI_V2DI_BV2DI) -OB_DEF_VAR (s390_vec_or_u64_a, s390_vo, 0, BT_OV_UV2DI_BV2DI_UV2DI) -OB_DEF_VAR (s390_vec_or_u64_b, s390_vo, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_or_u64_c, s390_vo, 0, BT_OV_UV2DI_UV2DI_BV2DI) -OB_DEF_VAR (s390_vec_or_dbl_a, s390_vo, 0, BT_OV_V2DF_BV2DI_V2DF) -OB_DEF_VAR (s390_vec_or_dbl_b, s390_vo, 0, BT_OV_V2DF_V2DF_V2DF) -OB_DEF_VAR (s390_vec_or_dbl_c, s390_vo, 0, BT_OV_V2DF_V2DF_BV2DI) +OB_DEF_VAR (s390_vec_or_b8, s390_vo, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_or_s8_a, s390_vo, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_or_s8_b, s390_vo, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_or_s8_c, s390_vo, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_or_u8_a, s390_vo, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_or_u8_b, s390_vo, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_or_u8_c, s390_vo, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_or_b16, s390_vo, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_or_s16_a, s390_vo, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_or_s16_b, s390_vo, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_or_s16_c, s390_vo, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_or_u16_a, s390_vo, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_or_u16_b, s390_vo, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_or_u16_c, s390_vo, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_or_b32, s390_vo, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_or_s32_a, s390_vo, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_or_s32_b, s390_vo, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_or_s32_c, s390_vo, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_or_u32_a, s390_vo, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_or_u32_b, s390_vo, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_or_u32_c, s390_vo, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_or_b64, s390_vo, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_or_s64_a, s390_vo, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_or_s64_b, s390_vo, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_or_s64_c, s390_vo, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_or_u64_a, s390_vo, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_or_u64_b, s390_vo, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_or_u64_c, s390_vo, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_or_flt_a, s390_vo, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF) +OB_DEF_VAR (s390_vec_or_flt_b, s390_vo, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_or_flt_c, s390_vo, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI) +OB_DEF_VAR (s390_vec_or_dbl_a, s390_vo, B_DEP, 0, BT_OV_V2DF_BV2DI_V2DF) +OB_DEF_VAR (s390_vec_or_dbl_b, s390_vo, 0, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_or_dbl_c, s390_vo, B_DEP, 0, BT_OV_V2DF_V2DF_BV2DI) B_DEF (s390_vo, iorv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_popcnt, s390_vec_popcnt_s8, s390_vec_popcnt_u64,B_VX, BT_FN_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_popcnt_s8, s390_vpopctb, 0, BT_OV_UV16QI_V16QI) /* vpopct */ -OB_DEF_VAR (s390_vec_popcnt_u8, s390_vpopctb, 0, BT_OV_UV16QI_UV16QI) /* vpopct */ -OB_DEF_VAR (s390_vec_popcnt_s16, s390_vpopcth, 0, BT_OV_UV8HI_V8HI) /* vpopct */ -OB_DEF_VAR (s390_vec_popcnt_u16, s390_vpopcth, 0, BT_OV_UV8HI_UV8HI) /* vpopct */ -OB_DEF_VAR (s390_vec_popcnt_s32, s390_vpopctf, 0, BT_OV_UV4SI_V4SI) /* vpopct vsumb */ -OB_DEF_VAR (s390_vec_popcnt_u32, s390_vpopctf, 0, BT_OV_UV4SI_UV4SI) /* vpopct vsumb */ -OB_DEF_VAR (s390_vec_popcnt_s64, s390_vpopctg, 0, BT_OV_UV2DI_V2DI) /* vpopct vsumb vsumgf */ -OB_DEF_VAR (s390_vec_popcnt_u64, s390_vpopctg, 0, BT_OV_UV2DI_UV2DI) /* vpopct vsumb vsumgf */ - -B_DEF (s390_vpopctb, popcountv16qi2, 0, B_VX, 0, BT_FN_UV16QI_UV16QI) /* vpopct */ -B_DEF (s390_vpopcth, popcountv8hi2, 0, B_VX, 0, BT_FN_UV8HI_UV8HI) /* vpopct */ -B_DEF (s390_vpopctf, popcountv4si2, 0, B_VX, 0, BT_FN_UV4SI_UV4SI) /* vpopct vsumb */ -B_DEF (s390_vpopctg, popcountv2di2, 0, B_VX, 0, BT_FN_UV2DI_UV2DI) /* vpopct vsumb vsumgf */ +OB_DEF_VAR (s390_vec_popcnt_s8, s390_vpopctb, 0, 0, BT_OV_UV16QI_V16QI) +OB_DEF_VAR (s390_vec_popcnt_u8, s390_vpopctb, 0, 0, BT_OV_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_popcnt_s16, s390_vpopcth, 0, 0, BT_OV_UV8HI_V8HI) +OB_DEF_VAR (s390_vec_popcnt_u16, s390_vpopcth, 0, 0, BT_OV_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_popcnt_s32, s390_vpopctf, 0, 0, BT_OV_UV4SI_V4SI) +OB_DEF_VAR (s390_vec_popcnt_u32, s390_vpopctf, 0, 0, BT_OV_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_popcnt_s64, s390_vpopctg, 0, 0, BT_OV_UV2DI_V2DI) +OB_DEF_VAR (s390_vec_popcnt_u64, s390_vpopctg, 0, 0, BT_OV_UV2DI_UV2DI) + +B_DEF (s390_vpopctb, popcountv16qi2, 0, B_VX, 0, BT_FN_UV16QI_UV16QI) +B_DEF (s390_vpopcth, popcountv8hi2, 0, B_VX, 0, BT_FN_UV8HI_UV8HI) +B_DEF (s390_vpopctf, popcountv4si2, 0, B_VX, 0, BT_FN_UV4SI_UV4SI) +B_DEF (s390_vpopctg, popcountv2di2, 0, B_VX, 0, BT_FN_UV2DI_UV2DI) OB_DEF (s390_vec_rl, s390_vec_rl_u8, s390_vec_rl_s64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_rl_u8, s390_verllvb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_rl_s8, s390_verllvb, 0, BT_OV_V16QI_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_rl_u16, s390_verllvh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_rl_s16, s390_verllvh, 0, BT_OV_V8HI_V8HI_UV8HI) -OB_DEF_VAR (s390_vec_rl_u32, s390_verllvf, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_rl_s32, s390_verllvf, 0, BT_OV_V4SI_V4SI_UV4SI) -OB_DEF_VAR (s390_vec_rl_u64, s390_verllvg, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_rl_s64, s390_verllvg, 0, BT_OV_V2DI_V2DI_UV2DI) +OB_DEF_VAR (s390_vec_rl_u8, s390_verllvb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_rl_s8, s390_verllvb, 0, 0, BT_OV_V16QI_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_rl_u16, s390_verllvh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_rl_s16, s390_verllvh, 0, 0, BT_OV_V8HI_V8HI_UV8HI) +OB_DEF_VAR (s390_vec_rl_u32, s390_verllvf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_rl_s32, s390_verllvf, 0, 0, BT_OV_V4SI_V4SI_UV4SI) +OB_DEF_VAR (s390_vec_rl_u64, s390_verllvg, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_rl_s64, s390_verllvg, 0, 0, BT_OV_V2DI_V2DI_UV2DI) B_DEF (s390_verllvb, vrotlv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) B_DEF (s390_verllvh, vrotlv8hi3, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI) @@ -1820,14 +1959,14 @@ B_DEF (s390_verllvf, vrotlv4si3, 0, B_DEF (s390_verllvg, vrotlv2di3, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI) OB_DEF (s390_vec_rli, s390_vec_rli_u8, s390_vec_rli_s64, B_VX, BT_FN_OV4SI_OV4SI_ULONG) -OB_DEF_VAR (s390_vec_rli_u8, s390_verllb, 0, BT_OV_UV16QI_UV16QI_ULONG) -OB_DEF_VAR (s390_vec_rli_s8, s390_verllb, 0, BT_OV_V16QI_V16QI_ULONG) -OB_DEF_VAR (s390_vec_rli_u16, s390_verllh, 0, BT_OV_UV8HI_UV8HI_ULONG) -OB_DEF_VAR (s390_vec_rli_s16, s390_verllh, 0, BT_OV_V8HI_V8HI_ULONG) -OB_DEF_VAR (s390_vec_rli_u32, s390_verllf, 0, BT_OV_UV4SI_UV4SI_ULONG) -OB_DEF_VAR (s390_vec_rli_s32, s390_verllf, 0, BT_OV_V4SI_V4SI_ULONG) -OB_DEF_VAR (s390_vec_rli_u64, s390_verllg, 0, BT_OV_UV2DI_UV2DI_ULONG) -OB_DEF_VAR (s390_vec_rli_s64, s390_verllg, 0, BT_OV_V2DI_V2DI_ULONG) +OB_DEF_VAR (s390_vec_rli_u8, s390_verllb, 0, 0, BT_OV_UV16QI_UV16QI_ULONG) +OB_DEF_VAR (s390_vec_rli_s8, s390_verllb, 0, 0, BT_OV_V16QI_V16QI_ULONG) +OB_DEF_VAR (s390_vec_rli_u16, s390_verllh, 0, 0, BT_OV_UV8HI_UV8HI_ULONG) +OB_DEF_VAR (s390_vec_rli_s16, s390_verllh, 0, 0, BT_OV_V8HI_V8HI_ULONG) +OB_DEF_VAR (s390_vec_rli_u32, s390_verllf, 0, 0, BT_OV_UV4SI_UV4SI_ULONG) +OB_DEF_VAR (s390_vec_rli_s32, s390_verllf, 0, 0, BT_OV_V4SI_V4SI_ULONG) +OB_DEF_VAR (s390_vec_rli_u64, s390_verllg, 0, 0, BT_OV_UV2DI_UV2DI_ULONG) +OB_DEF_VAR (s390_vec_rli_s64, s390_verllg, 0, 0, BT_OV_V2DI_V2DI_ULONG) B_DEF (s390_verllb, rotlv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UINT) B_DEF (s390_verllh, rotlv8hi3, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UINT) @@ -1835,14 +1974,14 @@ B_DEF (s390_verllf, rotlv4si3, 0, B_DEF (s390_verllg, rotlv2di3, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UINT) OB_DEF (s390_vec_rl_mask, s390_vec_rl_mask_s8,s390_vec_rl_mask_u64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_UCHAR) -OB_DEF_VAR (s390_vec_rl_mask_s8, s390_verimb, O3_U8, BT_OV_V16QI_V16QI_UV16QI_UCHAR) -OB_DEF_VAR (s390_vec_rl_mask_u8, s390_verimb, O3_U8, BT_OV_UV16QI_UV16QI_UV16QI_UCHAR) -OB_DEF_VAR (s390_vec_rl_mask_s16, s390_verimh, O3_U8, BT_OV_V8HI_V8HI_UV8HI_UCHAR) -OB_DEF_VAR (s390_vec_rl_mask_u16, s390_verimh, O3_U8, BT_OV_UV8HI_UV8HI_UV8HI_UCHAR) -OB_DEF_VAR (s390_vec_rl_mask_s32, s390_verimf, O3_U8, BT_OV_V4SI_V4SI_UV4SI_UCHAR) -OB_DEF_VAR (s390_vec_rl_mask_u32, s390_verimf, O3_U8, BT_OV_UV4SI_UV4SI_UV4SI_UCHAR) -OB_DEF_VAR (s390_vec_rl_mask_s64, s390_verimg, O3_U8, BT_OV_V2DI_V2DI_UV2DI_UCHAR) -OB_DEF_VAR (s390_vec_rl_mask_u64, s390_verimg, O3_U8, BT_OV_UV2DI_UV2DI_UV2DI_UCHAR) +OB_DEF_VAR (s390_vec_rl_mask_s8, s390_verimb, 0, O3_U8, BT_OV_V16QI_V16QI_UV16QI_UCHAR) +OB_DEF_VAR (s390_vec_rl_mask_u8, s390_verimb, 0, O3_U8, BT_OV_UV16QI_UV16QI_UV16QI_UCHAR) +OB_DEF_VAR (s390_vec_rl_mask_s16, s390_verimh, 0, O3_U8, BT_OV_V8HI_V8HI_UV8HI_UCHAR) +OB_DEF_VAR (s390_vec_rl_mask_u16, s390_verimh, 0, O3_U8, BT_OV_UV8HI_UV8HI_UV8HI_UCHAR) +OB_DEF_VAR (s390_vec_rl_mask_s32, s390_verimf, 0, O3_U8, BT_OV_V4SI_V4SI_UV4SI_UCHAR) +OB_DEF_VAR (s390_vec_rl_mask_u32, s390_verimf, 0, O3_U8, BT_OV_UV4SI_UV4SI_UV4SI_UCHAR) +OB_DEF_VAR (s390_vec_rl_mask_s64, s390_verimg, 0, O3_U8, BT_OV_V2DI_V2DI_UV2DI_UCHAR) +OB_DEF_VAR (s390_vec_rl_mask_u64, s390_verimg, 0, O3_U8, BT_OV_UV2DI_UV2DI_UV2DI_UCHAR) B_DEF (s390_verimb, verimv16qi, 0, B_VX, O4_U8, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI_INT) B_DEF (s390_verimh, verimv8hi, 0, B_VX, O4_U8, BT_FN_UV8HI_UV8HI_UV8HI_UV8HI_INT) @@ -1850,220 +1989,231 @@ B_DEF (s390_verimf, verimv4si, 0, B_DEF (s390_verimg, verimv2di, 0, B_VX, O4_U8, BT_FN_UV2DI_UV2DI_UV2DI_UV2DI_INT) OB_DEF (s390_vec_sll, s390_vec_sll_u8q, s390_vec_sll_b64s, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_sll_u8q, s390_vsl, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_sll_u8h, s390_vsl, 0, BT_OV_UV16QI_UV16QI_UV8HI) -OB_DEF_VAR (s390_vec_sll_u8s, s390_vsl, 0, BT_OV_UV16QI_UV16QI_UV4SI) -OB_DEF_VAR (s390_vec_sll_s8q, s390_vsl, 0, BT_OV_V16QI_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_sll_s8h, s390_vsl, 0, BT_OV_V16QI_V16QI_UV8HI) -OB_DEF_VAR (s390_vec_sll_s8s, s390_vsl, 0, BT_OV_V16QI_V16QI_UV4SI) -OB_DEF_VAR (s390_vec_sll_b8q, s390_vsl, 0, BT_OV_BV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_sll_b8h, s390_vsl, 0, BT_OV_BV16QI_BV16QI_UV8HI) -OB_DEF_VAR (s390_vec_sll_b8s, s390_vsl, 0, BT_OV_BV16QI_BV16QI_UV4SI) -OB_DEF_VAR (s390_vec_sll_u16q, s390_vsl, 0, BT_OV_UV8HI_UV8HI_UV16QI) -OB_DEF_VAR (s390_vec_sll_u16h, s390_vsl, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_sll_u16s, s390_vsl, 0, BT_OV_UV8HI_UV8HI_UV4SI) -OB_DEF_VAR (s390_vec_sll_s16q, s390_vsl, 0, BT_OV_V8HI_V8HI_UV16QI) -OB_DEF_VAR (s390_vec_sll_s16h, s390_vsl, 0, BT_OV_V8HI_V8HI_UV8HI) -OB_DEF_VAR (s390_vec_sll_s16s, s390_vsl, 0, BT_OV_V8HI_V8HI_UV4SI) -OB_DEF_VAR (s390_vec_sll_b16q, s390_vsl, 0, BT_OV_BV8HI_BV8HI_UV16QI) -OB_DEF_VAR (s390_vec_sll_b16h, s390_vsl, 0, BT_OV_BV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_sll_b16s, s390_vsl, 0, BT_OV_BV8HI_BV8HI_UV4SI) -OB_DEF_VAR (s390_vec_sll_u32q, s390_vsl, 0, BT_OV_UV4SI_UV4SI_UV16QI) -OB_DEF_VAR (s390_vec_sll_u32h, s390_vsl, 0, BT_OV_UV4SI_UV4SI_UV8HI) -OB_DEF_VAR (s390_vec_sll_u32s, s390_vsl, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_sll_s32q, s390_vsl, 0, BT_OV_V4SI_V4SI_UV16QI) -OB_DEF_VAR (s390_vec_sll_s32h, s390_vsl, 0, BT_OV_V4SI_V4SI_UV8HI) -OB_DEF_VAR (s390_vec_sll_s32s, s390_vsl, 0, BT_OV_V4SI_V4SI_UV4SI) -OB_DEF_VAR (s390_vec_sll_b32q, s390_vsl, 0, BT_OV_BV4SI_BV4SI_UV16QI) -OB_DEF_VAR (s390_vec_sll_b32h, s390_vsl, 0, BT_OV_BV4SI_BV4SI_UV8HI) -OB_DEF_VAR (s390_vec_sll_b32s, s390_vsl, 0, BT_OV_BV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_sll_u64q, s390_vsl, 0, BT_OV_UV2DI_UV2DI_UV16QI) -OB_DEF_VAR (s390_vec_sll_u64h, s390_vsl, 0, BT_OV_UV2DI_UV2DI_UV8HI) -OB_DEF_VAR (s390_vec_sll_u64s, s390_vsl, 0, BT_OV_UV2DI_UV2DI_UV4SI) -OB_DEF_VAR (s390_vec_sll_s64q, s390_vsl, 0, BT_OV_V2DI_V2DI_UV16QI) -OB_DEF_VAR (s390_vec_sll_s64h, s390_vsl, 0, BT_OV_V2DI_V2DI_UV8HI) -OB_DEF_VAR (s390_vec_sll_s64s, s390_vsl, 0, BT_OV_V2DI_V2DI_UV4SI) -OB_DEF_VAR (s390_vec_sll_b64q, s390_vsl, 0, BT_OV_BV2DI_BV2DI_UV16QI) -OB_DEF_VAR (s390_vec_sll_b64h, s390_vsl, 0, BT_OV_BV2DI_BV2DI_UV8HI) -OB_DEF_VAR (s390_vec_sll_b64s, s390_vsl, 0, BT_OV_BV2DI_BV2DI_UV4SI) +OB_DEF_VAR (s390_vec_sll_u8q, s390_vsl, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_sll_u8h, s390_vsl, B_DEP, 0, BT_OV_UV16QI_UV16QI_UV8HI) +OB_DEF_VAR (s390_vec_sll_u8s, s390_vsl, B_DEP, 0, BT_OV_UV16QI_UV16QI_UV4SI) +OB_DEF_VAR (s390_vec_sll_s8q, s390_vsl, 0, 0, BT_OV_V16QI_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_sll_s8h, s390_vsl, B_DEP, 0, BT_OV_V16QI_V16QI_UV8HI) +OB_DEF_VAR (s390_vec_sll_s8s, s390_vsl, B_DEP, 0, BT_OV_V16QI_V16QI_UV4SI) +OB_DEF_VAR (s390_vec_sll_b8q, s390_vsl, B_DEP, 0, BT_OV_BV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_sll_b8h, s390_vsl, B_DEP, 0, BT_OV_BV16QI_BV16QI_UV8HI) +OB_DEF_VAR (s390_vec_sll_b8s, s390_vsl, B_DEP, 0, BT_OV_BV16QI_BV16QI_UV4SI) +OB_DEF_VAR (s390_vec_sll_u16q, s390_vsl, 0, 0, BT_OV_UV8HI_UV8HI_UV16QI) +OB_DEF_VAR (s390_vec_sll_u16h, s390_vsl, B_DEP, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_sll_u16s, s390_vsl, B_DEP, 0, BT_OV_UV8HI_UV8HI_UV4SI) +OB_DEF_VAR (s390_vec_sll_s16q, s390_vsl, 0, 0, BT_OV_V8HI_V8HI_UV16QI) +OB_DEF_VAR (s390_vec_sll_s16h, s390_vsl, B_DEP, 0, BT_OV_V8HI_V8HI_UV8HI) +OB_DEF_VAR (s390_vec_sll_s16s, s390_vsl, B_DEP, 0, BT_OV_V8HI_V8HI_UV4SI) +OB_DEF_VAR (s390_vec_sll_b16q, s390_vsl, B_DEP, 0, BT_OV_BV8HI_BV8HI_UV16QI) +OB_DEF_VAR (s390_vec_sll_b16h, s390_vsl, B_DEP, 0, BT_OV_BV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_sll_b16s, s390_vsl, B_DEP, 0, BT_OV_BV8HI_BV8HI_UV4SI) +OB_DEF_VAR (s390_vec_sll_u32q, s390_vsl, 0, 0, BT_OV_UV4SI_UV4SI_UV16QI) +OB_DEF_VAR (s390_vec_sll_u32h, s390_vsl, B_DEP, 0, BT_OV_UV4SI_UV4SI_UV8HI) +OB_DEF_VAR (s390_vec_sll_u32s, s390_vsl, B_DEP, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_sll_s32q, s390_vsl, 0, 0, BT_OV_V4SI_V4SI_UV16QI) +OB_DEF_VAR (s390_vec_sll_s32h, s390_vsl, B_DEP, 0, BT_OV_V4SI_V4SI_UV8HI) +OB_DEF_VAR (s390_vec_sll_s32s, s390_vsl, B_DEP, 0, BT_OV_V4SI_V4SI_UV4SI) +OB_DEF_VAR (s390_vec_sll_b32q, s390_vsl, B_DEP, 0, BT_OV_BV4SI_BV4SI_UV16QI) +OB_DEF_VAR (s390_vec_sll_b32h, s390_vsl, B_DEP, 0, BT_OV_BV4SI_BV4SI_UV8HI) +OB_DEF_VAR (s390_vec_sll_b32s, s390_vsl, B_DEP, 0, BT_OV_BV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_sll_u64q, s390_vsl, 0, 0, BT_OV_UV2DI_UV2DI_UV16QI) +OB_DEF_VAR (s390_vec_sll_u64h, s390_vsl, B_DEP, 0, BT_OV_UV2DI_UV2DI_UV8HI) +OB_DEF_VAR (s390_vec_sll_u64s, s390_vsl, B_DEP, 0, BT_OV_UV2DI_UV2DI_UV4SI) +OB_DEF_VAR (s390_vec_sll_s64q, s390_vsl, 0, 0, BT_OV_V2DI_V2DI_UV16QI) +OB_DEF_VAR (s390_vec_sll_s64h, s390_vsl, B_DEP, 0, BT_OV_V2DI_V2DI_UV8HI) +OB_DEF_VAR (s390_vec_sll_s64s, s390_vsl, B_DEP, 0, BT_OV_V2DI_V2DI_UV4SI) +OB_DEF_VAR (s390_vec_sll_b64q, s390_vsl, B_DEP, 0, BT_OV_BV2DI_BV2DI_UV16QI) +OB_DEF_VAR (s390_vec_sll_b64h, s390_vsl, B_DEP, 0, BT_OV_BV2DI_BV2DI_UV8HI) +OB_DEF_VAR (s390_vec_sll_b64s, s390_vsl, B_DEP, 0, BT_OV_BV2DI_BV2DI_UV4SI) B_DEF (s390_vsl, vec_sllv16qiv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_slb, s390_vec_slb_u8_u8, s390_vec_slb_dbl_s64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_slb_u8_u8, s390_vslb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_slb_u8_s8, s390_vslb, 0, BT_OV_UV16QI_UV16QI_V16QI) -OB_DEF_VAR (s390_vec_slb_s8_u8, s390_vslb, 0, BT_OV_V16QI_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_slb_s8_s8, s390_vslb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_slb_u16_u16, s390_vslb, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_slb_u16_s16, s390_vslb, 0, BT_OV_UV8HI_UV8HI_V8HI) -OB_DEF_VAR (s390_vec_slb_s16_u16, s390_vslb, 0, BT_OV_V8HI_V8HI_UV8HI) -OB_DEF_VAR (s390_vec_slb_s16_s16, s390_vslb, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_slb_u32_u32, s390_vslb, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_slb_u32_s32, s390_vslb, 0, BT_OV_UV4SI_UV4SI_V4SI) -OB_DEF_VAR (s390_vec_slb_s32_u32, s390_vslb, 0, BT_OV_V4SI_V4SI_UV4SI) -OB_DEF_VAR (s390_vec_slb_s32_s32, s390_vslb, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_slb_u64_u64, s390_vslb, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_slb_u64_s64, s390_vslb, 0, BT_OV_UV2DI_UV2DI_V2DI) -OB_DEF_VAR (s390_vec_slb_s64_u64, s390_vslb, 0, BT_OV_V2DI_V2DI_UV2DI) -OB_DEF_VAR (s390_vec_slb_s64_s64, s390_vslb, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_slb_dbl_u64, s390_vslb, 0, BT_OV_V2DF_V2DF_UV2DI) -OB_DEF_VAR (s390_vec_slb_dbl_s64, s390_vslb, 0, BT_OV_V2DF_V2DF_V2DI) +OB_DEF_VAR (s390_vec_slb_u8_u8, s390_vslb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_slb_u8_s8, s390_vslb, 0, 0, BT_OV_UV16QI_UV16QI_V16QI) +OB_DEF_VAR (s390_vec_slb_s8_u8, s390_vslb, 0, 0, BT_OV_V16QI_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_slb_s8_s8, s390_vslb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_slb_u16_u16, s390_vslb, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_slb_u16_s16, s390_vslb, 0, 0, BT_OV_UV8HI_UV8HI_V8HI) +OB_DEF_VAR (s390_vec_slb_s16_u16, s390_vslb, 0, 0, BT_OV_V8HI_V8HI_UV8HI) +OB_DEF_VAR (s390_vec_slb_s16_s16, s390_vslb, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_slb_u32_u32, s390_vslb, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_slb_u32_s32, s390_vslb, 0, 0, BT_OV_UV4SI_UV4SI_V4SI) +OB_DEF_VAR (s390_vec_slb_s32_u32, s390_vslb, 0, 0, BT_OV_V4SI_V4SI_UV4SI) +OB_DEF_VAR (s390_vec_slb_s32_s32, s390_vslb, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_slb_u64_u64, s390_vslb, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_slb_u64_s64, s390_vslb, 0, 0, BT_OV_UV2DI_UV2DI_V2DI) +OB_DEF_VAR (s390_vec_slb_s64_u64, s390_vslb, 0, 0, BT_OV_V2DI_V2DI_UV2DI) +OB_DEF_VAR (s390_vec_slb_s64_s64, s390_vslb, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_slb_flt_u64, s390_vslb, B_VXE, 0, BT_OV_V4SF_V4SF_UV4SI) +OB_DEF_VAR (s390_vec_slb_dbl_u64, s390_vslb, 0, 0, BT_OV_V2DF_V2DF_UV2DI) +OB_DEF_VAR (s390_vec_slb_flt_s64, s390_vslb, B_VXE, 0, BT_OV_V4SF_V4SF_V4SI) +OB_DEF_VAR (s390_vec_slb_dbl_s64, s390_vslb, 0, 0, BT_OV_V2DF_V2DF_V2DI) B_DEF (s390_vslb, vec_slbv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) -OB_DEF (s390_vec_sld, s390_vec_sld_s8, s390_vec_sld_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_ULONGLONG) -OB_DEF_VAR (s390_vec_sld_s8, s390_vsldb, O3_U4, BT_OV_V16QI_V16QI_V16QI_ULONGLONG) -OB_DEF_VAR (s390_vec_sld_u8, s390_vsldb, O3_U4, BT_OV_UV16QI_UV16QI_UV16QI_ULONGLONG) -OB_DEF_VAR (s390_vec_sld_s16, s390_vsldb, O3_U4, BT_OV_V8HI_V8HI_V8HI_ULONGLONG) -OB_DEF_VAR (s390_vec_sld_u16, s390_vsldb, O3_U4, BT_OV_UV8HI_UV8HI_UV8HI_ULONGLONG) -OB_DEF_VAR (s390_vec_sld_s32, s390_vsldb, O3_U4, BT_OV_V4SI_V4SI_V4SI_ULONGLONG) -OB_DEF_VAR (s390_vec_sld_u32, s390_vsldb, O3_U4, BT_OV_UV4SI_UV4SI_UV4SI_ULONGLONG) -OB_DEF_VAR (s390_vec_sld_s64, s390_vsldb, O3_U4, BT_OV_V2DI_V2DI_V2DI_ULONGLONG) -OB_DEF_VAR (s390_vec_sld_u64, s390_vsldb, O3_U4, BT_OV_UV2DI_UV2DI_UV2DI_ULONGLONG) -OB_DEF_VAR (s390_vec_sld_dbl, s390_vsldb, O3_U4, BT_OV_V2DF_V2DF_V2DF_ULONGLONG) +OB_DEF (s390_vec_sld, s390_vec_sld_b8, s390_vec_sld_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_b8, s390_vsldb, 0, O3_U4, BT_OV_BV16QI_BV16QI_BV16QI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_s8, s390_vsldb, 0, O3_U4, BT_OV_V16QI_V16QI_V16QI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_u8, s390_vsldb, 0, O3_U4, BT_OV_UV16QI_UV16QI_UV16QI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_b16, s390_vsldb, 0, O3_U4, BT_OV_BV8HI_BV8HI_BV8HI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_s16, s390_vsldb, 0, O3_U4, BT_OV_V8HI_V8HI_V8HI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_u16, s390_vsldb, 0, O3_U4, BT_OV_UV8HI_UV8HI_UV8HI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_b32, s390_vsldb, 0, O3_U4, BT_OV_BV4SI_BV4SI_BV4SI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_s32, s390_vsldb, 0, O3_U4, BT_OV_V4SI_V4SI_V4SI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_u32, s390_vsldb, 0, O3_U4, BT_OV_UV4SI_UV4SI_UV4SI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_b64, s390_vsldb, 0, O3_U4, BT_OV_BV2DI_BV2DI_BV2DI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_s64, s390_vsldb, 0, O3_U4, BT_OV_V2DI_V2DI_V2DI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_u64, s390_vsldb, 0, O3_U4, BT_OV_UV2DI_UV2DI_UV2DI_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_flt, s390_vsldb, B_VXE, O3_U4, BT_OV_V4SF_V4SF_V4SF_ULONGLONG) +OB_DEF_VAR (s390_vec_sld_dbl, s390_vsldb, 0, O3_U4, BT_OV_V2DF_V2DF_V2DF_ULONGLONG) B_DEF (s390_vsldb, vec_sldv16qi, 0, B_VX, O3_U4, BT_FN_UV16QI_UV16QI_UV16QI_INT) OB_DEF (s390_vec_sldw, s390_vec_sldw_s8, s390_vec_sldw_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_INT) -OB_DEF_VAR (s390_vec_sldw_s8, s390_vsldb, O3_U4, BT_OV_V16QI_V16QI_V16QI_INT) -OB_DEF_VAR (s390_vec_sldw_u8, s390_vsldb, O3_U4, BT_OV_UV16QI_UV16QI_UV16QI_INT) -OB_DEF_VAR (s390_vec_sldw_s16, s390_vsldb, O3_U4, BT_OV_V8HI_V8HI_V8HI_INT) -OB_DEF_VAR (s390_vec_sldw_u16, s390_vsldb, O3_U4, BT_OV_UV8HI_UV8HI_UV8HI_INT) -OB_DEF_VAR (s390_vec_sldw_s32, s390_vsldb, O3_U4, BT_OV_V4SI_V4SI_V4SI_INT) -OB_DEF_VAR (s390_vec_sldw_u32, s390_vsldb, O3_U4, BT_OV_UV4SI_UV4SI_UV4SI_INT) -OB_DEF_VAR (s390_vec_sldw_s64, s390_vsldb, O3_U4, BT_OV_V2DI_V2DI_V2DI_INT) -OB_DEF_VAR (s390_vec_sldw_u64, s390_vsldb, O3_U4, BT_OV_UV2DI_UV2DI_UV2DI_INT) -OB_DEF_VAR (s390_vec_sldw_dbl, s390_vsldb, O3_U4, BT_OV_V2DF_V2DF_V2DF_INT) +OB_DEF_VAR (s390_vec_sldw_s8, s390_vsldb, 0, O3_U4, BT_OV_V16QI_V16QI_V16QI_INT) +OB_DEF_VAR (s390_vec_sldw_u8, s390_vsldb, 0, O3_U4, BT_OV_UV16QI_UV16QI_UV16QI_INT) +OB_DEF_VAR (s390_vec_sldw_s16, s390_vsldb, 0, O3_U4, BT_OV_V8HI_V8HI_V8HI_INT) +OB_DEF_VAR (s390_vec_sldw_u16, s390_vsldb, 0, O3_U4, BT_OV_UV8HI_UV8HI_UV8HI_INT) +OB_DEF_VAR (s390_vec_sldw_s32, s390_vsldb, 0, O3_U4, BT_OV_V4SI_V4SI_V4SI_INT) +OB_DEF_VAR (s390_vec_sldw_u32, s390_vsldb, 0, O3_U4, BT_OV_UV4SI_UV4SI_UV4SI_INT) +OB_DEF_VAR (s390_vec_sldw_s64, s390_vsldb, 0, O3_U4, BT_OV_V2DI_V2DI_V2DI_INT) +OB_DEF_VAR (s390_vec_sldw_u64, s390_vsldb, 0, O3_U4, BT_OV_UV2DI_UV2DI_UV2DI_INT) +OB_DEF_VAR (s390_vec_sldw_dbl, s390_vsldb, B_DEP, O3_U4, BT_OV_V2DF_V2DF_V2DF_INT) OB_DEF (s390_vec_sral, s390_vec_sral_u8q, s390_vec_sral_b64s, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_sral_u8q, s390_vsra, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_sral_u8h, s390_vsra, 0, BT_OV_UV16QI_UV16QI_UV8HI) -OB_DEF_VAR (s390_vec_sral_u8s, s390_vsra, 0, BT_OV_UV16QI_UV16QI_UV4SI) -OB_DEF_VAR (s390_vec_sral_s8q, s390_vsra, 0, BT_OV_V16QI_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_sral_s8h, s390_vsra, 0, BT_OV_V16QI_V16QI_UV8HI) -OB_DEF_VAR (s390_vec_sral_s8s, s390_vsra, 0, BT_OV_V16QI_V16QI_UV4SI) -OB_DEF_VAR (s390_vec_sral_b8q, s390_vsra, 0, BT_OV_BV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_sral_b8h, s390_vsra, 0, BT_OV_BV16QI_BV16QI_UV8HI) -OB_DEF_VAR (s390_vec_sral_b8s, s390_vsra, 0, BT_OV_BV16QI_BV16QI_UV4SI) -OB_DEF_VAR (s390_vec_sral_u16q, s390_vsra, 0, BT_OV_UV8HI_UV8HI_UV16QI) -OB_DEF_VAR (s390_vec_sral_u16h, s390_vsra, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_sral_u16s, s390_vsra, 0, BT_OV_UV8HI_UV8HI_UV4SI) -OB_DEF_VAR (s390_vec_sral_s16q, s390_vsra, 0, BT_OV_V8HI_V8HI_UV16QI) -OB_DEF_VAR (s390_vec_sral_s16h, s390_vsra, 0, BT_OV_V8HI_V8HI_UV8HI) -OB_DEF_VAR (s390_vec_sral_s16s, s390_vsra, 0, BT_OV_V8HI_V8HI_UV4SI) -OB_DEF_VAR (s390_vec_sral_b16q, s390_vsra, 0, BT_OV_BV8HI_BV8HI_UV16QI) -OB_DEF_VAR (s390_vec_sral_b16h, s390_vsra, 0, BT_OV_BV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_sral_b16s, s390_vsra, 0, BT_OV_BV8HI_BV8HI_UV4SI) -OB_DEF_VAR (s390_vec_sral_u32q, s390_vsra, 0, BT_OV_UV4SI_UV4SI_UV16QI) -OB_DEF_VAR (s390_vec_sral_u32h, s390_vsra, 0, BT_OV_UV4SI_UV4SI_UV8HI) -OB_DEF_VAR (s390_vec_sral_u32s, s390_vsra, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_sral_s32q, s390_vsra, 0, BT_OV_V4SI_V4SI_UV16QI) -OB_DEF_VAR (s390_vec_sral_s32h, s390_vsra, 0, BT_OV_V4SI_V4SI_UV8HI) -OB_DEF_VAR (s390_vec_sral_s32s, s390_vsra, 0, BT_OV_V4SI_V4SI_UV4SI) -OB_DEF_VAR (s390_vec_sral_b32q, s390_vsra, 0, BT_OV_BV4SI_BV4SI_UV16QI) -OB_DEF_VAR (s390_vec_sral_b32h, s390_vsra, 0, BT_OV_BV4SI_BV4SI_UV8HI) -OB_DEF_VAR (s390_vec_sral_b32s, s390_vsra, 0, BT_OV_BV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_sral_u64q, s390_vsra, 0, BT_OV_UV2DI_UV2DI_UV16QI) -OB_DEF_VAR (s390_vec_sral_u64h, s390_vsra, 0, BT_OV_UV2DI_UV2DI_UV8HI) -OB_DEF_VAR (s390_vec_sral_u64s, s390_vsra, 0, BT_OV_UV2DI_UV2DI_UV4SI) -OB_DEF_VAR (s390_vec_sral_s64q, s390_vsra, 0, BT_OV_V2DI_V2DI_UV16QI) -OB_DEF_VAR (s390_vec_sral_s64h, s390_vsra, 0, BT_OV_V2DI_V2DI_UV8HI) -OB_DEF_VAR (s390_vec_sral_s64s, s390_vsra, 0, BT_OV_V2DI_V2DI_UV4SI) -OB_DEF_VAR (s390_vec_sral_b64q, s390_vsra, 0, BT_OV_BV2DI_BV2DI_UV16QI) -OB_DEF_VAR (s390_vec_sral_b64h, s390_vsra, 0, BT_OV_BV2DI_BV2DI_UV8HI) -OB_DEF_VAR (s390_vec_sral_b64s, s390_vsra, 0, BT_OV_BV2DI_BV2DI_UV4SI) +OB_DEF_VAR (s390_vec_sral_u8q, s390_vsra, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_sral_u8h, s390_vsra, B_DEP, 0, BT_OV_UV16QI_UV16QI_UV8HI) +OB_DEF_VAR (s390_vec_sral_u8s, s390_vsra, B_DEP, 0, BT_OV_UV16QI_UV16QI_UV4SI) +OB_DEF_VAR (s390_vec_sral_s8q, s390_vsra, 0, 0, BT_OV_V16QI_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_sral_s8h, s390_vsra, B_DEP, 0, BT_OV_V16QI_V16QI_UV8HI) +OB_DEF_VAR (s390_vec_sral_s8s, s390_vsra, B_DEP, 0, BT_OV_V16QI_V16QI_UV4SI) +OB_DEF_VAR (s390_vec_sral_b8q, s390_vsra, B_DEP, 0, BT_OV_BV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_sral_b8h, s390_vsra, B_DEP, 0, BT_OV_BV16QI_BV16QI_UV8HI) +OB_DEF_VAR (s390_vec_sral_b8s, s390_vsra, B_DEP, 0, BT_OV_BV16QI_BV16QI_UV4SI) +OB_DEF_VAR (s390_vec_sral_u16q, s390_vsra, 0, 0, BT_OV_UV8HI_UV8HI_UV16QI) +OB_DEF_VAR (s390_vec_sral_u16h, s390_vsra, B_DEP, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_sral_u16s, s390_vsra, B_DEP, 0, BT_OV_UV8HI_UV8HI_UV4SI) +OB_DEF_VAR (s390_vec_sral_s16q, s390_vsra, 0, 0, BT_OV_V8HI_V8HI_UV16QI) +OB_DEF_VAR (s390_vec_sral_s16h, s390_vsra, B_DEP, 0, BT_OV_V8HI_V8HI_UV8HI) +OB_DEF_VAR (s390_vec_sral_s16s, s390_vsra, B_DEP, 0, BT_OV_V8HI_V8HI_UV4SI) +OB_DEF_VAR (s390_vec_sral_b16q, s390_vsra, B_DEP, 0, BT_OV_BV8HI_BV8HI_UV16QI) +OB_DEF_VAR (s390_vec_sral_b16h, s390_vsra, B_DEP, 0, BT_OV_BV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_sral_b16s, s390_vsra, B_DEP, 0, BT_OV_BV8HI_BV8HI_UV4SI) +OB_DEF_VAR (s390_vec_sral_u32q, s390_vsra, 0, 0, BT_OV_UV4SI_UV4SI_UV16QI) +OB_DEF_VAR (s390_vec_sral_u32h, s390_vsra, B_DEP, 0, BT_OV_UV4SI_UV4SI_UV8HI) +OB_DEF_VAR (s390_vec_sral_u32s, s390_vsra, B_DEP, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_sral_s32q, s390_vsra, 0, 0, BT_OV_V4SI_V4SI_UV16QI) +OB_DEF_VAR (s390_vec_sral_s32h, s390_vsra, B_DEP, 0, BT_OV_V4SI_V4SI_UV8HI) +OB_DEF_VAR (s390_vec_sral_s32s, s390_vsra, B_DEP, 0, BT_OV_V4SI_V4SI_UV4SI) +OB_DEF_VAR (s390_vec_sral_b32q, s390_vsra, B_DEP, 0, BT_OV_BV4SI_BV4SI_UV16QI) +OB_DEF_VAR (s390_vec_sral_b32h, s390_vsra, B_DEP, 0, BT_OV_BV4SI_BV4SI_UV8HI) +OB_DEF_VAR (s390_vec_sral_b32s, s390_vsra, B_DEP, 0, BT_OV_BV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_sral_u64q, s390_vsra, 0, 0, BT_OV_UV2DI_UV2DI_UV16QI) +OB_DEF_VAR (s390_vec_sral_u64h, s390_vsra, B_DEP, 0, BT_OV_UV2DI_UV2DI_UV8HI) +OB_DEF_VAR (s390_vec_sral_u64s, s390_vsra, B_DEP, 0, BT_OV_UV2DI_UV2DI_UV4SI) +OB_DEF_VAR (s390_vec_sral_s64q, s390_vsra, 0, 0, BT_OV_V2DI_V2DI_UV16QI) +OB_DEF_VAR (s390_vec_sral_s64h, s390_vsra, B_DEP, 0, BT_OV_V2DI_V2DI_UV8HI) +OB_DEF_VAR (s390_vec_sral_s64s, s390_vsra, B_DEP, 0, BT_OV_V2DI_V2DI_UV4SI) +OB_DEF_VAR (s390_vec_sral_b64q, s390_vsra, B_DEP, 0, BT_OV_BV2DI_BV2DI_UV16QI) +OB_DEF_VAR (s390_vec_sral_b64h, s390_vsra, B_DEP, 0, BT_OV_BV2DI_BV2DI_UV8HI) +OB_DEF_VAR (s390_vec_sral_b64s, s390_vsra, B_DEP, 0, BT_OV_BV2DI_BV2DI_UV4SI) B_DEF (s390_vsra, vec_sralv16qiv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_srab, s390_vec_srab_u8_u8,s390_vec_srab_dbl_s64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_srab_u8_u8, s390_vsrab, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_srab_u8_s8, s390_vsrab, 0, BT_OV_UV16QI_UV16QI_V16QI) -OB_DEF_VAR (s390_vec_srab_s8_u8, s390_vsrab, 0, BT_OV_V16QI_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_srab_s8_s8, s390_vsrab, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_srab_u16_u16, s390_vsrab, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_srab_u16_s16, s390_vsrab, 0, BT_OV_UV8HI_UV8HI_V8HI) -OB_DEF_VAR (s390_vec_srab_s16_u16, s390_vsrab, 0, BT_OV_V8HI_V8HI_UV8HI) -OB_DEF_VAR (s390_vec_srab_s16_s16, s390_vsrab, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_srab_u32_u32, s390_vsrab, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_srab_u32_s32, s390_vsrab, 0, BT_OV_UV4SI_UV4SI_V4SI) -OB_DEF_VAR (s390_vec_srab_s32_u32, s390_vsrab, 0, BT_OV_V4SI_V4SI_UV4SI) -OB_DEF_VAR (s390_vec_srab_s32_s32, s390_vsrab, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_srab_u64_u64, s390_vsrab, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_srab_u64_s64, s390_vsrab, 0, BT_OV_UV2DI_UV2DI_V2DI) -OB_DEF_VAR (s390_vec_srab_s64_u64, s390_vsrab, 0, BT_OV_V2DI_V2DI_UV2DI) -OB_DEF_VAR (s390_vec_srab_s64_s64, s390_vsrab, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_srab_dbl_u64, s390_vsrab, 0, BT_OV_V2DF_V2DF_UV2DI) -OB_DEF_VAR (s390_vec_srab_dbl_s64, s390_vsrab, 0, BT_OV_V2DF_V2DF_V2DI) +OB_DEF_VAR (s390_vec_srab_u8_u8, s390_vsrab, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_srab_u8_s8, s390_vsrab, 0, 0, BT_OV_UV16QI_UV16QI_V16QI) +OB_DEF_VAR (s390_vec_srab_s8_u8, s390_vsrab, 0, 0, BT_OV_V16QI_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_srab_s8_s8, s390_vsrab, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_srab_u16_u16, s390_vsrab, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_srab_u16_s16, s390_vsrab, 0, 0, BT_OV_UV8HI_UV8HI_V8HI) +OB_DEF_VAR (s390_vec_srab_s16_u16, s390_vsrab, 0, 0, BT_OV_V8HI_V8HI_UV8HI) +OB_DEF_VAR (s390_vec_srab_s16_s16, s390_vsrab, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_srab_u32_u32, s390_vsrab, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_srab_u32_s32, s390_vsrab, 0, 0, BT_OV_UV4SI_UV4SI_V4SI) +OB_DEF_VAR (s390_vec_srab_s32_u32, s390_vsrab, 0, 0, BT_OV_V4SI_V4SI_UV4SI) +OB_DEF_VAR (s390_vec_srab_s32_s32, s390_vsrab, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_srab_u64_u64, s390_vsrab, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_srab_u64_s64, s390_vsrab, 0, 0, BT_OV_UV2DI_UV2DI_V2DI) +OB_DEF_VAR (s390_vec_srab_s64_u64, s390_vsrab, 0, 0, BT_OV_V2DI_V2DI_UV2DI) +OB_DEF_VAR (s390_vec_srab_s64_s64, s390_vsrab, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_srab_flt_u64, s390_vsrab, B_VXE, 0, BT_OV_V4SF_V4SF_UV4SI) +OB_DEF_VAR (s390_vec_srab_dbl_u64, s390_vsrab, 0, 0, BT_OV_V2DF_V2DF_UV2DI) +OB_DEF_VAR (s390_vec_srab_flt_s64, s390_vsrab, B_VXE, 0, BT_OV_V4SF_V4SF_V4SI) +OB_DEF_VAR (s390_vec_srab_dbl_s64, s390_vsrab, 0, 0, BT_OV_V2DF_V2DF_V2DI) B_DEF (s390_vsrab, vec_srabv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_srl, s390_vec_srl_u8q, s390_vec_srl_b64s, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_srl_u8q, s390_vsrl, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_srl_u8h, s390_vsrl, 0, BT_OV_UV16QI_UV16QI_UV8HI) -OB_DEF_VAR (s390_vec_srl_u8s, s390_vsrl, 0, BT_OV_UV16QI_UV16QI_UV4SI) -OB_DEF_VAR (s390_vec_srl_s8q, s390_vsrl, 0, BT_OV_V16QI_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_srl_s8h, s390_vsrl, 0, BT_OV_V16QI_V16QI_UV8HI) -OB_DEF_VAR (s390_vec_srl_s8s, s390_vsrl, 0, BT_OV_V16QI_V16QI_UV4SI) -OB_DEF_VAR (s390_vec_srl_b8q, s390_vsrl, 0, BT_OV_BV16QI_BV16QI_UV16QI) -OB_DEF_VAR (s390_vec_srl_b8h, s390_vsrl, 0, BT_OV_BV16QI_BV16QI_UV8HI) -OB_DEF_VAR (s390_vec_srl_b8s, s390_vsrl, 0, BT_OV_BV16QI_BV16QI_UV4SI) -OB_DEF_VAR (s390_vec_srl_u16q, s390_vsrl, 0, BT_OV_UV8HI_UV8HI_UV16QI) -OB_DEF_VAR (s390_vec_srl_u16h, s390_vsrl, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_srl_u16s, s390_vsrl, 0, BT_OV_UV8HI_UV8HI_UV4SI) -OB_DEF_VAR (s390_vec_srl_s16q, s390_vsrl, 0, BT_OV_V8HI_V8HI_UV16QI) -OB_DEF_VAR (s390_vec_srl_s16h, s390_vsrl, 0, BT_OV_V8HI_V8HI_UV8HI) -OB_DEF_VAR (s390_vec_srl_s16s, s390_vsrl, 0, BT_OV_V8HI_V8HI_UV4SI) -OB_DEF_VAR (s390_vec_srl_b16q, s390_vsrl, 0, BT_OV_BV8HI_BV8HI_UV16QI) -OB_DEF_VAR (s390_vec_srl_b16h, s390_vsrl, 0, BT_OV_BV8HI_BV8HI_UV8HI) -OB_DEF_VAR (s390_vec_srl_b16s, s390_vsrl, 0, BT_OV_BV8HI_BV8HI_UV4SI) -OB_DEF_VAR (s390_vec_srl_u32q, s390_vsrl, 0, BT_OV_UV4SI_UV4SI_UV16QI) -OB_DEF_VAR (s390_vec_srl_u32h, s390_vsrl, 0, BT_OV_UV4SI_UV4SI_UV8HI) -OB_DEF_VAR (s390_vec_srl_u32s, s390_vsrl, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_srl_s32q, s390_vsrl, 0, BT_OV_V4SI_V4SI_UV16QI) -OB_DEF_VAR (s390_vec_srl_s32h, s390_vsrl, 0, BT_OV_V4SI_V4SI_UV8HI) -OB_DEF_VAR (s390_vec_srl_s32s, s390_vsrl, 0, BT_OV_V4SI_V4SI_UV4SI) -OB_DEF_VAR (s390_vec_srl_b32q, s390_vsrl, 0, BT_OV_BV4SI_BV4SI_UV16QI) -OB_DEF_VAR (s390_vec_srl_b32h, s390_vsrl, 0, BT_OV_BV4SI_BV4SI_UV8HI) -OB_DEF_VAR (s390_vec_srl_b32s, s390_vsrl, 0, BT_OV_BV4SI_BV4SI_UV4SI) -OB_DEF_VAR (s390_vec_srl_u64q, s390_vsrl, 0, BT_OV_UV2DI_UV2DI_UV16QI) -OB_DEF_VAR (s390_vec_srl_u64h, s390_vsrl, 0, BT_OV_UV2DI_UV2DI_UV8HI) -OB_DEF_VAR (s390_vec_srl_u64s, s390_vsrl, 0, BT_OV_UV2DI_UV2DI_UV4SI) -OB_DEF_VAR (s390_vec_srl_s64q, s390_vsrl, 0, BT_OV_V2DI_V2DI_UV16QI) -OB_DEF_VAR (s390_vec_srl_s64h, s390_vsrl, 0, BT_OV_V2DI_V2DI_UV8HI) -OB_DEF_VAR (s390_vec_srl_s64s, s390_vsrl, 0, BT_OV_V2DI_V2DI_UV4SI) -OB_DEF_VAR (s390_vec_srl_b64q, s390_vsrl, 0, BT_OV_BV2DI_BV2DI_UV16QI) -OB_DEF_VAR (s390_vec_srl_b64h, s390_vsrl, 0, BT_OV_BV2DI_BV2DI_UV8HI) -OB_DEF_VAR (s390_vec_srl_b64s, s390_vsrl, 0, BT_OV_BV2DI_BV2DI_UV4SI) +OB_DEF_VAR (s390_vec_srl_u8q, s390_vsrl, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_srl_u8h, s390_vsrl, B_DEP, 0, BT_OV_UV16QI_UV16QI_UV8HI) +OB_DEF_VAR (s390_vec_srl_u8s, s390_vsrl, B_DEP, 0, BT_OV_UV16QI_UV16QI_UV4SI) +OB_DEF_VAR (s390_vec_srl_s8q, s390_vsrl, 0, 0, BT_OV_V16QI_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_srl_s8h, s390_vsrl, B_DEP, 0, BT_OV_V16QI_V16QI_UV8HI) +OB_DEF_VAR (s390_vec_srl_s8s, s390_vsrl, B_DEP, 0, BT_OV_V16QI_V16QI_UV4SI) +OB_DEF_VAR (s390_vec_srl_b8q, s390_vsrl, B_DEP, 0, BT_OV_BV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_srl_b8h, s390_vsrl, B_DEP, 0, BT_OV_BV16QI_BV16QI_UV8HI) +OB_DEF_VAR (s390_vec_srl_b8s, s390_vsrl, B_DEP, 0, BT_OV_BV16QI_BV16QI_UV4SI) +OB_DEF_VAR (s390_vec_srl_u16q, s390_vsrl, 0, 0, BT_OV_UV8HI_UV8HI_UV16QI) +OB_DEF_VAR (s390_vec_srl_u16h, s390_vsrl, B_DEP, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_srl_u16s, s390_vsrl, B_DEP, 0, BT_OV_UV8HI_UV8HI_UV4SI) +OB_DEF_VAR (s390_vec_srl_s16q, s390_vsrl, 0, 0, BT_OV_V8HI_V8HI_UV16QI) +OB_DEF_VAR (s390_vec_srl_s16h, s390_vsrl, B_DEP, 0, BT_OV_V8HI_V8HI_UV8HI) +OB_DEF_VAR (s390_vec_srl_s16s, s390_vsrl, B_DEP, 0, BT_OV_V8HI_V8HI_UV4SI) +OB_DEF_VAR (s390_vec_srl_b16q, s390_vsrl, B_DEP, 0, BT_OV_BV8HI_BV8HI_UV16QI) +OB_DEF_VAR (s390_vec_srl_b16h, s390_vsrl, B_DEP, 0, BT_OV_BV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_srl_b16s, s390_vsrl, B_DEP, 0, BT_OV_BV8HI_BV8HI_UV4SI) +OB_DEF_VAR (s390_vec_srl_u32q, s390_vsrl, 0, 0, BT_OV_UV4SI_UV4SI_UV16QI) +OB_DEF_VAR (s390_vec_srl_u32h, s390_vsrl, B_DEP, 0, BT_OV_UV4SI_UV4SI_UV8HI) +OB_DEF_VAR (s390_vec_srl_u32s, s390_vsrl, B_DEP, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_srl_s32q, s390_vsrl, 0, 0, BT_OV_V4SI_V4SI_UV16QI) +OB_DEF_VAR (s390_vec_srl_s32h, s390_vsrl, B_DEP, 0, BT_OV_V4SI_V4SI_UV8HI) +OB_DEF_VAR (s390_vec_srl_s32s, s390_vsrl, B_DEP, 0, BT_OV_V4SI_V4SI_UV4SI) +OB_DEF_VAR (s390_vec_srl_b32q, s390_vsrl, B_DEP, 0, BT_OV_BV4SI_BV4SI_UV16QI) +OB_DEF_VAR (s390_vec_srl_b32h, s390_vsrl, B_DEP, 0, BT_OV_BV4SI_BV4SI_UV8HI) +OB_DEF_VAR (s390_vec_srl_b32s, s390_vsrl, B_DEP, 0, BT_OV_BV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_srl_u64q, s390_vsrl, 0, 0, BT_OV_UV2DI_UV2DI_UV16QI) +OB_DEF_VAR (s390_vec_srl_u64h, s390_vsrl, B_DEP, 0, BT_OV_UV2DI_UV2DI_UV8HI) +OB_DEF_VAR (s390_vec_srl_u64s, s390_vsrl, B_DEP, 0, BT_OV_UV2DI_UV2DI_UV4SI) +OB_DEF_VAR (s390_vec_srl_s64q, s390_vsrl, 0, 0, BT_OV_V2DI_V2DI_UV16QI) +OB_DEF_VAR (s390_vec_srl_s64h, s390_vsrl, B_DEP, 0, BT_OV_V2DI_V2DI_UV8HI) +OB_DEF_VAR (s390_vec_srl_s64s, s390_vsrl, B_DEP, 0, BT_OV_V2DI_V2DI_UV4SI) +OB_DEF_VAR (s390_vec_srl_b64q, s390_vsrl, B_DEP, 0, BT_OV_BV2DI_BV2DI_UV16QI) +OB_DEF_VAR (s390_vec_srl_b64h, s390_vsrl, B_DEP, 0, BT_OV_BV2DI_BV2DI_UV8HI) +OB_DEF_VAR (s390_vec_srl_b64s, s390_vsrl, B_DEP, 0, BT_OV_BV2DI_BV2DI_UV4SI) B_DEF (s390_vsrl, vec_srlv16qiv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_srb, s390_vec_srb_u8_u8, s390_vec_srb_dbl_s64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_srb_u8_u8, s390_vsrlb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_srb_u8_s8, s390_vsrlb, 0, BT_OV_UV16QI_UV16QI_V16QI) -OB_DEF_VAR (s390_vec_srb_s8_u8, s390_vsrlb, 0, BT_OV_V16QI_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_srb_s8_s8, s390_vsrlb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vec_srb_u16_u16, s390_vsrlb, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_srb_u16_s16, s390_vsrlb, 0, BT_OV_UV8HI_UV8HI_V8HI) -OB_DEF_VAR (s390_vec_srb_s16_u16, s390_vsrlb, 0, BT_OV_V8HI_V8HI_UV8HI) -OB_DEF_VAR (s390_vec_srb_s16_s16, s390_vsrlb, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vec_srb_u32_u32, s390_vsrlb, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_srb_u32_s32, s390_vsrlb, 0, BT_OV_UV4SI_UV4SI_V4SI) -OB_DEF_VAR (s390_vec_srb_s32_u32, s390_vsrlb, 0, BT_OV_V4SI_V4SI_UV4SI) -OB_DEF_VAR (s390_vec_srb_s32_s32, s390_vsrlb, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vec_srb_u64_u64, s390_vsrlb, 0, BT_OV_UV2DI_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_srb_u64_s64, s390_vsrlb, 0, BT_OV_UV2DI_UV2DI_V2DI) -OB_DEF_VAR (s390_vec_srb_s64_u64, s390_vsrlb, 0, BT_OV_V2DI_V2DI_UV2DI) -OB_DEF_VAR (s390_vec_srb_s64_s64, s390_vsrlb, 0, BT_OV_V2DI_V2DI_V2DI) -OB_DEF_VAR (s390_vec_srb_dbl_u64, s390_vsrlb, 0, BT_OV_V2DF_V2DF_UV2DI) -OB_DEF_VAR (s390_vec_srb_dbl_s64, s390_vsrlb, 0, BT_OV_V2DF_V2DF_V2DI) +OB_DEF_VAR (s390_vec_srb_u8_u8, s390_vsrlb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_srb_u8_s8, s390_vsrlb, 0, 0, BT_OV_UV16QI_UV16QI_V16QI) +OB_DEF_VAR (s390_vec_srb_s8_u8, s390_vsrlb, 0, 0, BT_OV_V16QI_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_srb_s8_s8, s390_vsrlb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_srb_u16_u16, s390_vsrlb, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_srb_u16_s16, s390_vsrlb, 0, 0, BT_OV_UV8HI_UV8HI_V8HI) +OB_DEF_VAR (s390_vec_srb_s16_u16, s390_vsrlb, 0, 0, BT_OV_V8HI_V8HI_UV8HI) +OB_DEF_VAR (s390_vec_srb_s16_s16, s390_vsrlb, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_srb_u32_u32, s390_vsrlb, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_srb_u32_s32, s390_vsrlb, 0, 0, BT_OV_UV4SI_UV4SI_V4SI) +OB_DEF_VAR (s390_vec_srb_s32_u32, s390_vsrlb, 0, 0, BT_OV_V4SI_V4SI_UV4SI) +OB_DEF_VAR (s390_vec_srb_s32_s32, s390_vsrlb, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_srb_u64_u64, s390_vsrlb, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_srb_u64_s64, s390_vsrlb, 0, 0, BT_OV_UV2DI_UV2DI_V2DI) +OB_DEF_VAR (s390_vec_srb_s64_u64, s390_vsrlb, 0, 0, BT_OV_V2DI_V2DI_UV2DI) +OB_DEF_VAR (s390_vec_srb_s64_s64, s390_vsrlb, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_srb_flt_u64, s390_vsrlb, B_VXE, 0, BT_OV_V4SF_V4SF_UV4SI) +OB_DEF_VAR (s390_vec_srb_dbl_u64, s390_vsrlb, 0, 0, BT_OV_V2DF_V2DF_UV2DI) +OB_DEF_VAR (s390_vec_srb_flt_s64, s390_vsrlb, B_VXE, 0, BT_OV_V4SF_V4SF_V4SI) +OB_DEF_VAR (s390_vec_srb_dbl_s64, s390_vsrlb, 0, 0, BT_OV_V2DF_V2DF_V2DI) B_DEF (s390_vsrlb, vec_srbv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) OB_DEF (s390_vec_subc, s390_vec_subc_u8, s390_vec_subc_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_subc_u8, s390_vscbib, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_subc_u16, s390_vscbih, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_subc_u32, s390_vscbif, 0, BT_OV_UV4SI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_subc_u64, s390_vscbig, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_subc_u8, s390_vscbib, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_subc_u16, s390_vscbih, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_subc_u32, s390_vscbif, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_subc_u64, s390_vscbig, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) B_DEF (s390_vscbib, vscbib_v16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) B_DEF (s390_vscbih, vscbih_v8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI) @@ -2080,44 +2230,163 @@ B_DEF (s390_vec_subc_u128, vscbiq_ti, 0, B_DEF (s390_vec_sube_u128, vsbiq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI) B_DEF (s390_vec_subec_u128, vsbcbiq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI) -B_DEF (s390_vsq, subti3, 0, B_VX, 0, BT_FN_INT128_INT128_INT128) +B_DEF (s390_vsq, subti3, 0, B_VX, 0, BT_FN_INT128_INT128_INT128) B_DEF (s390_vscbiq, vscbiq_ti, 0, B_VX, 0, BT_FN_INT128_INT128_INT128) B_DEF (s390_vsbiq, vsbiq, 0, B_VX, 0, BT_FN_INT128_INT128_INT128_INT128) B_DEF (s390_vsbcbiq, vsbcbiq, 0, B_VX, 0, BT_FN_INT128_INT128_INT128_INT128) OB_DEF (s390_vec_sum2, s390_vec_sum2_u16, s390_vec_sum2_u32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_sum2_u16, s390_vsumgh, 0, BT_OV_UV2DI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_sum2_u32, s390_vsumgf, 0, BT_OV_UV2DI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_sum2_u16, s390_vsumgh, 0, 0, BT_OV_UV2DI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_sum2_u32, s390_vsumgf, 0, 0, BT_OV_UV2DI_UV4SI_UV4SI) B_DEF (s390_vsumgh, vec_sum2v8hi, 0, B_VX, 0, BT_FN_UV2DI_UV8HI_UV8HI) B_DEF (s390_vsumgf, vec_sum2v4si, 0, B_VX, 0, BT_FN_UV2DI_UV4SI_UV4SI) OB_DEF (s390_vec_sum_u128, s390_vec_sum_u128_u32,s390_vec_sum_u128_u64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_sum_u128_u32, s390_vsumqf, 0, BT_OV_UV16QI_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_sum_u128_u64, s390_vsumqg, 0, BT_OV_UV16QI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_sum_u128_u32, s390_vsumqf, 0, 0, BT_OV_UV16QI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_sum_u128_u64, s390_vsumqg, 0, 0, BT_OV_UV16QI_UV2DI_UV2DI) B_DEF (s390_vsumqf, vec_sum_u128v4si, 0, B_VX, 0, BT_FN_UV16QI_UV4SI_UV4SI) B_DEF (s390_vsumqg, vec_sum_u128v2di, 0, B_VX, 0, BT_FN_UV16QI_UV2DI_UV2DI) OB_DEF (s390_vec_sum4, s390_vec_sum4_u8, s390_vec_sum4_u16, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_sum4_u8, s390_vsumb, 0, BT_OV_UV4SI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_sum4_u16, s390_vsumh, 0, BT_OV_UV4SI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_sum4_u8, s390_vsumb, 0, 0, BT_OV_UV4SI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_sum4_u16, s390_vsumh, 0, 0, BT_OV_UV4SI_UV8HI_UV8HI) B_DEF (s390_vsumb, vec_sum4v16qi, 0, B_VX, 0, BT_FN_UV4SI_UV16QI_UV16QI) B_DEF (s390_vsumh, vec_sum4v8hi, 0, B_VX, 0, BT_FN_UV4SI_UV8HI_UV8HI) OB_DEF (s390_vec_test_mask, s390_vec_test_mask_s8,s390_vec_test_mask_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vec_test_mask_s8, s390_vtm, 0, BT_OV_INT_V16QI_UV16QI) -OB_DEF_VAR (s390_vec_test_mask_u8, s390_vtm, 0, BT_OV_INT_UV16QI_UV16QI) -OB_DEF_VAR (s390_vec_test_mask_s16, s390_vtm, 0, BT_OV_INT_V8HI_UV8HI) -OB_DEF_VAR (s390_vec_test_mask_u16, s390_vtm, 0, BT_OV_INT_UV8HI_UV8HI) -OB_DEF_VAR (s390_vec_test_mask_s32, s390_vtm, 0, BT_OV_INT_V4SI_UV4SI) -OB_DEF_VAR (s390_vec_test_mask_u32, s390_vtm, 0, BT_OV_INT_UV4SI_UV4SI) -OB_DEF_VAR (s390_vec_test_mask_s64, s390_vtm, 0, BT_OV_INT_V2DI_UV2DI) -OB_DEF_VAR (s390_vec_test_mask_u64, s390_vtm, 0, BT_OV_INT_UV2DI_UV2DI) -OB_DEF_VAR (s390_vec_test_mask_dbl, s390_vtm, 0, BT_OV_INT_V2DF_UV2DI) +OB_DEF_VAR (s390_vec_test_mask_s8, s390_vtm, 0, 0, BT_OV_INT_V16QI_UV16QI) +OB_DEF_VAR (s390_vec_test_mask_u8, s390_vtm, 0, 0, BT_OV_INT_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_test_mask_s16, s390_vtm, 0, 0, BT_OV_INT_V8HI_UV8HI) +OB_DEF_VAR (s390_vec_test_mask_u16, s390_vtm, 0, 0, BT_OV_INT_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_test_mask_s32, s390_vtm, 0, 0, BT_OV_INT_V4SI_UV4SI) +OB_DEF_VAR (s390_vec_test_mask_u32, s390_vtm, 0, 0, BT_OV_INT_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_test_mask_s64, s390_vtm, 0, 0, BT_OV_INT_V2DI_UV2DI) +OB_DEF_VAR (s390_vec_test_mask_u64, s390_vtm, 0, 0, BT_OV_INT_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_test_mask_flt, s390_vtm, B_VXE, 0, BT_OV_INT_V4SF_UV4SI) +OB_DEF_VAR (s390_vec_test_mask_dbl, s390_vtm, 0, 0, BT_OV_INT_V2DF_UV2DI) B_DEF (s390_vtm, vec_test_mask_intv16qi,0, B_VX, 0, BT_FN_INT_UV16QI_UV16QI) + +B_DEF (s390_vec_msum_u128, vec_msumv2di, 0, B_VXE, O4_U2, BT_FN_UV16QI_UV2DI_UV2DI_UV16QI_INT) +B_DEF (s390_vmslg, vmslg, 0, B_VXE, O4_U2, BT_FN_INT128_UV2DI_UV2DI_INT128_INT) + +OB_DEF (s390_vec_eqv, s390_vec_eqv_b8, s390_vec_eqv_dbl_c, B_VXE, BT_FN_OV4SI_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_eqv_b8, s390_vnx, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_eqv_s8_a, s390_vnx, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_eqv_s8_b, s390_vnx, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_eqv_s8_c, s390_vnx, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_eqv_u8_a, s390_vnx, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_eqv_u8_b, s390_vnx, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_eqv_u8_c, s390_vnx, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_eqv_b16, s390_vnx, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_eqv_s16_a, s390_vnx, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_eqv_s16_b, s390_vnx, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_eqv_s16_c, s390_vnx, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_eqv_u16_a, s390_vnx, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_eqv_u16_b, s390_vnx, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_eqv_u16_c, s390_vnx, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_eqv_b32, s390_vnx, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_eqv_s32_a, s390_vnx, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_eqv_s32_b, s390_vnx, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_eqv_s32_c, s390_vnx, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_eqv_u32_a, s390_vnx, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_eqv_u32_b, s390_vnx, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_eqv_u32_c, s390_vnx, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_eqv_b64, s390_vnx, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_eqv_s64_a, s390_vnx, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_eqv_s64_b, s390_vnx, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_eqv_s64_c, s390_vnx, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_eqv_u64_a, s390_vnx, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_eqv_u64_b, s390_vnx, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_eqv_u64_c, s390_vnx, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_eqv_flt_a, s390_vnx, B_VXE | B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF) +OB_DEF_VAR (s390_vec_eqv_flt_b, s390_vnx, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_eqv_flt_c, s390_vnx, B_VXE | B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI) +OB_DEF_VAR (s390_vec_eqv_dbl_a, s390_vnx, B_DEP, 0, BT_OV_V2DF_BV2DI_V2DF) +OB_DEF_VAR (s390_vec_eqv_dbl_b, s390_vnx, 0, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_eqv_dbl_c, s390_vnx, B_DEP, 0, BT_OV_V2DF_V2DF_BV2DI) + +B_DEF (s390_vnx, notxorv16qi3, 0, B_VXE, 0, BT_FN_UV16QI_UV16QI_UV16QI) + +OB_DEF (s390_vec_nand, s390_vec_nand_b8, s390_vec_nand_dbl_c,B_VXE, BT_FN_OV4SI_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_nand_b8, s390_vnn, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_nand_s8_a, s390_vnn, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_nand_s8_b, s390_vnn, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_nand_s8_c, s390_vnn, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_nand_u8_a, s390_vnn, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_nand_u8_b, s390_vnn, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_nand_u8_c, s390_vnn, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_nand_b16, s390_vnn, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_nand_s16_a, s390_vnn, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_nand_s16_b, s390_vnn, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_nand_s16_c, s390_vnn, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_nand_u16_a, s390_vnn, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_nand_u16_b, s390_vnn, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_nand_u16_c, s390_vnn, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_nand_b32, s390_vnn, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_nand_s32_a, s390_vnn, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_nand_s32_b, s390_vnn, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_nand_s32_c, s390_vnn, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_nand_u32_a, s390_vnn, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_nand_u32_b, s390_vnn, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_nand_u32_c, s390_vnn, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_nand_b64, s390_vnn, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_nand_s64_a, s390_vnn, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_nand_s64_b, s390_vnn, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_nand_s64_c, s390_vnn, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_nand_u64_a, s390_vnn, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_nand_u64_b, s390_vnn, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_nand_u64_c, s390_vnn, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_nand_flt_a, s390_vnn, B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF) +OB_DEF_VAR (s390_vec_nand_flt_b, s390_vnn, 0, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_nand_flt_c, s390_vnn, B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI) +OB_DEF_VAR (s390_vec_nand_dbl_a, s390_vnn, B_DEP, 0, BT_OV_V2DF_BV2DI_V2DF) +OB_DEF_VAR (s390_vec_nand_dbl_b, s390_vnn, 0, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_nand_dbl_c, s390_vnn, B_DEP, 0, BT_OV_V2DF_V2DF_BV2DI) + +B_DEF (s390_vnn, notandv16qi3, 0, B_VXE, 0, BT_FN_UV16QI_UV16QI_UV16QI) + +OB_DEF (s390_vec_orc, s390_vec_orc_b8, s390_vec_orc_dbl_c, B_VXE, BT_FN_OV4SI_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_orc_b8, s390_voc, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vec_orc_s8_a, s390_voc, B_DEP, 0, BT_OV_V16QI_BV16QI_V16QI) +OB_DEF_VAR (s390_vec_orc_s8_b, s390_voc, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vec_orc_s8_c, s390_voc, B_DEP, 0, BT_OV_V16QI_V16QI_BV16QI) +OB_DEF_VAR (s390_vec_orc_u8_a, s390_voc, B_DEP, 0, BT_OV_UV16QI_BV16QI_UV16QI) +OB_DEF_VAR (s390_vec_orc_u8_b, s390_voc, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vec_orc_u8_c, s390_voc, B_DEP, 0, BT_OV_UV16QI_UV16QI_BV16QI) +OB_DEF_VAR (s390_vec_orc_b16, s390_voc, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vec_orc_s16_a, s390_voc, B_DEP, 0, BT_OV_V8HI_BV8HI_V8HI) +OB_DEF_VAR (s390_vec_orc_s16_b, s390_voc, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vec_orc_s16_c, s390_voc, B_DEP, 0, BT_OV_V8HI_V8HI_BV8HI) +OB_DEF_VAR (s390_vec_orc_u16_a, s390_voc, B_DEP, 0, BT_OV_UV8HI_BV8HI_UV8HI) +OB_DEF_VAR (s390_vec_orc_u16_b, s390_voc, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vec_orc_u16_c, s390_voc, B_DEP, 0, BT_OV_UV8HI_UV8HI_BV8HI) +OB_DEF_VAR (s390_vec_orc_b32, s390_voc, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vec_orc_s32_a, s390_voc, B_DEP, 0, BT_OV_V4SI_BV4SI_V4SI) +OB_DEF_VAR (s390_vec_orc_s32_b, s390_voc, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vec_orc_s32_c, s390_voc, B_DEP, 0, BT_OV_V4SI_V4SI_BV4SI) +OB_DEF_VAR (s390_vec_orc_u32_a, s390_voc, B_DEP, 0, BT_OV_UV4SI_BV4SI_UV4SI) +OB_DEF_VAR (s390_vec_orc_u32_b, s390_voc, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vec_orc_u32_c, s390_voc, B_DEP, 0, BT_OV_UV4SI_UV4SI_BV4SI) +OB_DEF_VAR (s390_vec_orc_b64, s390_voc, 0, 0, BT_OV_BV2DI_BV2DI_BV2DI) +OB_DEF_VAR (s390_vec_orc_s64_a, s390_voc, B_DEP, 0, BT_OV_V2DI_BV2DI_V2DI) +OB_DEF_VAR (s390_vec_orc_s64_b, s390_voc, 0, 0, BT_OV_V2DI_V2DI_V2DI) +OB_DEF_VAR (s390_vec_orc_s64_c, s390_voc, B_DEP, 0, BT_OV_V2DI_V2DI_BV2DI) +OB_DEF_VAR (s390_vec_orc_u64_a, s390_voc, B_DEP, 0, BT_OV_UV2DI_BV2DI_UV2DI) +OB_DEF_VAR (s390_vec_orc_u64_b, s390_voc, 0, 0, BT_OV_UV2DI_UV2DI_UV2DI) +OB_DEF_VAR (s390_vec_orc_u64_c, s390_voc, B_DEP, 0, BT_OV_UV2DI_UV2DI_BV2DI) +OB_DEF_VAR (s390_vec_orc_flt_a, s390_voc, B_DEP, 0, BT_OV_V4SF_BV4SI_V4SF) +OB_DEF_VAR (s390_vec_orc_flt_b, s390_voc, 0, 0, BT_OV_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_orc_flt_c, s390_voc, B_DEP, 0, BT_OV_V4SF_V4SF_BV4SI) +OB_DEF_VAR (s390_vec_orc_dbl_a, s390_voc, B_DEP, 0, BT_OV_V2DF_BV2DI_V2DF) +OB_DEF_VAR (s390_vec_orc_dbl_b, s390_voc, 0, 0, BT_OV_V2DF_V2DF_V2DF) +OB_DEF_VAR (s390_vec_orc_dbl_c, s390_voc, B_DEP, 0, BT_OV_V2DF_V2DF_BV2DI) + +B_DEF (s390_voc, ior_notv16qi3, 0, B_VXE, 0, BT_FN_UV16QI_UV16QI_UV16QI) + B_DEF (s390_vfaeb, vfaev16qi, 0, B_VX, O3_U4, BT_FN_UV16QI_UV16QI_UV16QI_INT) B_DEF (s390_vfaeh, vfaev8hi, 0, B_VX, O3_U4, BT_FN_UV8HI_UV8HI_UV8HI_INT) B_DEF (s390_vfaef, vfaev4si, 0, B_VX, O3_U4, BT_FN_UV4SI_UV4SI_UV4SI_INT) @@ -2132,136 +2401,136 @@ B_DEF (s390_vfaezhs, vfaezsv8hi, 0, B_DEF (s390_vfaezfs, vfaezsv4si, 0, B_VX, O3_U4, BT_FN_UV4SI_UV4SI_UV4SI_INT_INTPTR) OB_DEF (s390_vec_find_any_eq_idx, s390_vfaeb_idx_s8, s390_vfaef_idx_u32b,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfaeb_idx_s8, s390_vfaeb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfaeb_idx_u8a, s390_vfaeb, 0, BT_OV_UV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfaeb_idx_u8b, s390_vfaeb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfaeh_idx_s16, s390_vfaeh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfaeh_idx_u16a, s390_vfaeh, 0, BT_OV_UV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfaeh_idx_u16b, s390_vfaeh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfaef_idx_s32, s390_vfaef, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfaef_idx_u32a, s390_vfaef, 0, BT_OV_UV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfaef_idx_u32b, s390_vfaef, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfaeb_idx_s8, s390_vfaeb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfaeb_idx_u8a, s390_vfaeb, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfaeb_idx_u8b, s390_vfaeb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfaeh_idx_s16, s390_vfaeh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfaeh_idx_u16a, s390_vfaeh, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfaeh_idx_u16b, s390_vfaeh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfaef_idx_s32, s390_vfaef, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfaef_idx_u32a, s390_vfaef, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfaef_idx_u32b, s390_vfaef, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_find_any_ne_idx, s390_vfaeb_inv_idx_s8,s390_vfaef_inv_idx_u32b,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfaeb_inv_idx_s8, s390_vfaeb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfaeb_inv_idx_u8a, s390_vfaeb, 0, BT_OV_UV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfaeb_inv_idx_u8b, s390_vfaeb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfaeh_inv_idx_s16, s390_vfaeh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfaeh_inv_idx_u16a, s390_vfaeh, 0, BT_OV_UV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfaeh_inv_idx_u16b, s390_vfaeh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfaef_inv_idx_s32, s390_vfaef, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfaef_inv_idx_u32a, s390_vfaef, 0, BT_OV_UV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfaef_inv_idx_u32b, s390_vfaef, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfaeb_inv_idx_s8, s390_vfaeb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfaeb_inv_idx_u8a, s390_vfaeb, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfaeb_inv_idx_u8b, s390_vfaeb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfaeh_inv_idx_s16, s390_vfaeh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfaeh_inv_idx_u16a, s390_vfaeh, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfaeh_inv_idx_u16b, s390_vfaeh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfaef_inv_idx_s32, s390_vfaef, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfaef_inv_idx_u32a, s390_vfaef, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfaef_inv_idx_u32b, s390_vfaef, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_find_any_eq_or_0_idx,s390_vfaezb_idx_s8,s390_vfaezf_idx_u32b,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfaezb_idx_s8, s390_vfaezb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfaezb_idx_u8a, s390_vfaezb, 0, BT_OV_UV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfaezb_idx_u8b, s390_vfaezb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfaezh_idx_s16, s390_vfaezh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfaezh_idx_u16a, s390_vfaezh, 0, BT_OV_UV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfaezh_idx_u16b, s390_vfaezh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfaezf_idx_s32, s390_vfaezf, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfaezf_idx_u32a, s390_vfaezf, 0, BT_OV_UV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfaezf_idx_u32b, s390_vfaezf, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfaezb_idx_s8, s390_vfaezb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfaezb_idx_u8a, s390_vfaezb, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfaezb_idx_u8b, s390_vfaezb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfaezh_idx_s16, s390_vfaezh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfaezh_idx_u16a, s390_vfaezh, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfaezh_idx_u16b, s390_vfaezh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfaezf_idx_s32, s390_vfaezf, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfaezf_idx_u32a, s390_vfaezf, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfaezf_idx_u32b, s390_vfaezf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_find_any_ne_or_0_idx,s390_vfaezb_inv_idx_s8,s390_vfaezf_inv_idx_u32b,B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfaezb_inv_idx_s8, s390_vfaezb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfaezb_inv_idx_u8a, s390_vfaezb, 0, BT_OV_UV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfaezb_inv_idx_u8b, s390_vfaezb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfaezh_inv_idx_s16, s390_vfaezh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfaezh_inv_idx_u16a, s390_vfaezh, 0, BT_OV_UV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfaezh_inv_idx_u16b, s390_vfaezh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfaezf_inv_idx_s32, s390_vfaezf, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfaezf_inv_idx_u32a, s390_vfaezf, 0, BT_OV_UV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfaezf_inv_idx_u32b, s390_vfaezf, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfaezb_inv_idx_s8, s390_vfaezb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfaezb_inv_idx_u8a, s390_vfaezb, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfaezb_inv_idx_u8b, s390_vfaezb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfaezh_inv_idx_s16, s390_vfaezh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfaezh_inv_idx_u16a, s390_vfaezh, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfaezh_inv_idx_u16b, s390_vfaezh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfaezf_inv_idx_s32, s390_vfaezf, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfaezf_inv_idx_u32a, s390_vfaezf, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfaezf_inv_idx_u32b, s390_vfaezf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_find_any_eq, s390_vfaeb_s8, s390_vfaef_b32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfaeb_s8, s390_vfaeb, 0, BT_OV_BV16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfaeb_u8, s390_vfaeb, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfaeb_b8, s390_vfaeb, 0, BT_OV_BV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfaeh_s16, s390_vfaeh, 0, BT_OV_BV8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfaeh_u16, s390_vfaeh, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfaeh_b16, s390_vfaeh, 0, BT_OV_BV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfaef_s32, s390_vfaef, 0, BT_OV_BV4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfaef_u32, s390_vfaef, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfaef_b32, s390_vfaef, 0, BT_OV_BV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfaeb_s8, s390_vfaeb, 0, 0, BT_OV_BV16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfaeb_u8, s390_vfaeb, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfaeb_b8, s390_vfaeb, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfaeh_s16, s390_vfaeh, 0, 0, BT_OV_BV8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfaeh_u16, s390_vfaeh, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfaeh_b16, s390_vfaeh, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfaef_s32, s390_vfaef, 0, 0, BT_OV_BV4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfaef_u32, s390_vfaef, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfaef_b32, s390_vfaef, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_find_any_ne, s390_vfaeb_inv_s8, s390_vfaef_inv_b32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfaeb_inv_s8, s390_vfaeb, 0, BT_OV_BV16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfaeb_inv_u8, s390_vfaeb, 0, BT_OV_BV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfaeb_inv_b8, s390_vfaeb, 0, BT_OV_BV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfaeh_inv_s16, s390_vfaeh, 0, BT_OV_BV8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfaeh_inv_u16, s390_vfaeh, 0, BT_OV_BV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfaeh_inv_b16, s390_vfaeh, 0, BT_OV_BV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfaef_inv_s32, s390_vfaef, 0, BT_OV_BV4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfaef_inv_u32, s390_vfaef, 0, BT_OV_BV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfaef_inv_b32, s390_vfaef, 0, BT_OV_BV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfaeb_inv_s8, s390_vfaeb, 0, 0, BT_OV_BV16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfaeb_inv_u8, s390_vfaeb, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfaeb_inv_b8, s390_vfaeb, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfaeh_inv_s16, s390_vfaeh, 0, 0, BT_OV_BV8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfaeh_inv_u16, s390_vfaeh, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfaeh_inv_b16, s390_vfaeh, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfaef_inv_s32, s390_vfaef, 0, 0, BT_OV_BV4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfaef_inv_u32, s390_vfaef, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfaef_inv_b32, s390_vfaef, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_find_any_eq_idx_cc,s390_vfaebs_idx_s8, s390_vfaefs_idx_u32b,B_VX, BT_FN_INT_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfaebs_idx_s8, s390_vfaebs, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfaebs_idx_u8a, s390_vfaebs, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfaebs_idx_u8b, s390_vfaebs, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfaehs_idx_s16, s390_vfaehs, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfaehs_idx_u16a, s390_vfaehs, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfaehs_idx_u16b, s390_vfaehs, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfaefs_idx_s32, s390_vfaefs, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfaefs_idx_u32a, s390_vfaefs, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfaefs_idx_u32b, s390_vfaefs, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfaebs_idx_s8, s390_vfaebs, 0, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfaebs_idx_u8a, s390_vfaebs, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfaebs_idx_u8b, s390_vfaebs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfaehs_idx_s16, s390_vfaehs, 0, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfaehs_idx_u16a, s390_vfaehs, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfaehs_idx_u16b, s390_vfaehs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfaefs_idx_s32, s390_vfaefs, 0, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfaefs_idx_u32a, s390_vfaefs, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfaefs_idx_u32b, s390_vfaefs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_find_any_ne_idx_cc,s390_vfaebs_inv_idx_s8,s390_vfaefs_inv_idx_u32b,B_VX, BT_FN_INT_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfaebs_inv_idx_s8, s390_vfaebs, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfaebs_inv_idx_u8a, s390_vfaebs, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfaebs_inv_idx_u8b, s390_vfaebs, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfaehs_inv_idx_s16, s390_vfaehs, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfaehs_inv_idx_u16a, s390_vfaehs, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfaehs_inv_idx_u16b, s390_vfaehs, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfaefs_inv_idx_s32, s390_vfaefs, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfaefs_inv_idx_u32a, s390_vfaefs, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfaefs_inv_idx_u32b, s390_vfaefs, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfaebs_inv_idx_s8, s390_vfaebs, 0, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfaebs_inv_idx_u8a, s390_vfaebs, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfaebs_inv_idx_u8b, s390_vfaebs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfaehs_inv_idx_s16, s390_vfaehs, 0, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfaehs_inv_idx_u16a, s390_vfaehs, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfaehs_inv_idx_u16b, s390_vfaehs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfaefs_inv_idx_s32, s390_vfaefs, 0, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfaefs_inv_idx_u32a, s390_vfaefs, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfaefs_inv_idx_u32b, s390_vfaefs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_find_any_eq_or_0_idx_cc,s390_vfaezbs_idx_s8,s390_vfaezfs_idx_u32b,B_VX, BT_FN_INT_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfaezbs_idx_s8, s390_vfaezbs, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfaezbs_idx_u8a, s390_vfaezbs, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfaezbs_idx_u8b, s390_vfaezbs, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfaezhs_idx_s16, s390_vfaezhs, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfaezhs_idx_u16a, s390_vfaezhs, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfaezhs_idx_u16b, s390_vfaezhs, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfaezfs_idx_s32, s390_vfaezfs, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfaezfs_idx_u32a, s390_vfaezfs, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfaezfs_idx_u32b, s390_vfaezfs, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfaezbs_idx_s8, s390_vfaezbs, 0, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfaezbs_idx_u8a, s390_vfaezbs, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfaezbs_idx_u8b, s390_vfaezbs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfaezhs_idx_s16, s390_vfaezhs, 0, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfaezhs_idx_u16a, s390_vfaezhs, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfaezhs_idx_u16b, s390_vfaezhs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfaezfs_idx_s32, s390_vfaezfs, 0, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfaezfs_idx_u32a, s390_vfaezfs, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfaezfs_idx_u32b, s390_vfaezfs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_find_any_ne_or_0_idx_cc,s390_vfaezbs_inv_idx_s8,s390_vfaezfs_inv_idx_u32b,B_VX,BT_FN_INT_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfaezbs_inv_idx_s8, s390_vfaezbs, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfaezbs_inv_idx_u8a, s390_vfaezbs, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfaezbs_inv_idx_u8b, s390_vfaezbs, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfaezhs_inv_idx_s16, s390_vfaezhs, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfaezhs_inv_idx_u16a, s390_vfaezhs, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfaezhs_inv_idx_u16b, s390_vfaezhs, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfaezfs_inv_idx_s32, s390_vfaezfs, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfaezfs_inv_idx_u32a, s390_vfaezfs, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfaezfs_inv_idx_u32b, s390_vfaezfs, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfaezbs_inv_idx_s8, s390_vfaezbs, 0, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfaezbs_inv_idx_u8a, s390_vfaezbs, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfaezbs_inv_idx_u8b, s390_vfaezbs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfaezhs_inv_idx_s16, s390_vfaezhs, 0, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfaezhs_inv_idx_u16a, s390_vfaezhs, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfaezhs_inv_idx_u16b, s390_vfaezhs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfaezfs_inv_idx_s32, s390_vfaezfs, 0, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfaezfs_inv_idx_u32a, s390_vfaezfs, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfaezfs_inv_idx_u32b, s390_vfaezfs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_find_any_eq_cc, s390_vfaebs_s8, s390_vfaefs_b32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfaebs_s8, s390_vfaebs, 0, BT_OV_BV16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfaebs_u8, s390_vfaebs, 0, BT_OV_BV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfaebs_b8, s390_vfaebs, 0, BT_OV_BV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfaehs_s16, s390_vfaehs, 0, BT_OV_BV8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfaehs_u16, s390_vfaehs, 0, BT_OV_BV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfaehs_b16, s390_vfaehs, 0, BT_OV_BV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfaefs_s32, s390_vfaefs, 0, BT_OV_BV4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfaefs_u32, s390_vfaefs, 0, BT_OV_BV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfaefs_b32, s390_vfaefs, 0, BT_OV_BV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfaebs_s8, s390_vfaebs, 0, 0, BT_OV_BV16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfaebs_u8, s390_vfaebs, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfaebs_b8, s390_vfaebs, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfaehs_s16, s390_vfaehs, 0, 0, BT_OV_BV8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfaehs_u16, s390_vfaehs, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfaehs_b16, s390_vfaehs, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfaefs_s32, s390_vfaefs, 0, 0, BT_OV_BV4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfaefs_u32, s390_vfaefs, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfaefs_b32, s390_vfaefs, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_find_any_ne_cc, s390_vfaebs_inv_s8, s390_vfaefs_inv_b32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfaebs_inv_s8, s390_vfaebs, 0, BT_OV_BV16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfaebs_inv_u8, s390_vfaebs, 0, BT_OV_BV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfaebs_inv_b8, s390_vfaebs, 0, BT_OV_BV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfaehs_inv_s16, s390_vfaehs, 0, BT_OV_BV8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfaehs_inv_u16, s390_vfaehs, 0, BT_OV_BV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfaehs_inv_b16, s390_vfaehs, 0, BT_OV_BV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfaefs_inv_s32, s390_vfaefs, 0, BT_OV_BV4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfaefs_inv_u32, s390_vfaefs, 0, BT_OV_BV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfaefs_inv_b32, s390_vfaefs, 0, BT_OV_BV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfaebs_inv_s8, s390_vfaebs, 0, 0, BT_OV_BV16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfaebs_inv_u8, s390_vfaebs, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfaebs_inv_b8, s390_vfaebs, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfaehs_inv_s16, s390_vfaehs, 0, 0, BT_OV_BV8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfaehs_inv_u16, s390_vfaehs, 0, 0, BT_OV_BV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfaehs_inv_b16, s390_vfaehs, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfaefs_inv_s32, s390_vfaefs, 0, 0, BT_OV_BV4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfaefs_inv_u32, s390_vfaefs, 0, 0, BT_OV_BV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfaefs_inv_b32, s390_vfaefs, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI_INTPTR) B_DEF (s390_vfeeb, vfeev16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) B_DEF (s390_vfeeh, vfeev8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI) @@ -2277,48 +2546,48 @@ B_DEF (s390_vfeezhs, vfeezsv8hi, 0, B_DEF (s390_vfeezfs, vfeezsv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_cmpeq_idx, s390_vfeeb_s8, s390_vfeef_u32b, B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfeeb_s8, s390_vfeeb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfeeb_u8a, s390_vfeeb, 0, BT_OV_UV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfeeb_u8b, s390_vfeeb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfeeh_s16, s390_vfeeh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfeeh_u16a, s390_vfeeh, 0, BT_OV_UV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfeeh_u16b, s390_vfeeh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfeef_s32, s390_vfeef, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfeef_u32a, s390_vfeef, 0, BT_OV_UV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfeef_u32b, s390_vfeef, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfeeb_s8, s390_vfeeb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfeeb_u8a, s390_vfeeb, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfeeb_u8b, s390_vfeeb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfeeh_s16, s390_vfeeh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfeeh_u16a, s390_vfeeh, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfeeh_u16b, s390_vfeeh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfeef_s32, s390_vfeef, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfeef_u32a, s390_vfeef, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfeef_u32b, s390_vfeef, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmpeq_or_0_idx, s390_vfeezb_s8, s390_vfeezf_u32b, B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfeezb_s8, s390_vfeezb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfeezb_u8a, s390_vfeezb, 0, BT_OV_UV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfeezb_u8b, s390_vfeezb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfeezh_s16, s390_vfeezh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfeezh_u16a, s390_vfeezh, 0, BT_OV_UV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfeezh_u16b, s390_vfeezh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfeezf_s32, s390_vfeezf, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfeezf_u32a, s390_vfeezf, 0, BT_OV_UV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfeezf_u32b, s390_vfeezf, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfeezb_s8, s390_vfeezb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfeezb_u8a, s390_vfeezb, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfeezb_u8b, s390_vfeezb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfeezh_s16, s390_vfeezh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfeezh_u16a, s390_vfeezh, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfeezh_u16b, s390_vfeezh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfeezf_s32, s390_vfeezf, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfeezf_u32a, s390_vfeezf, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfeezf_u32b, s390_vfeezf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmpeq_idx_cc, s390_vfeebs_s8, s390_vfeefs_u32b, B_VX, BT_FN_INT_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfeebs_s8, s390_vfeebs, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfeebs_u8a, s390_vfeebs, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfeebs_u8b, s390_vfeebs, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfeehs_s16, s390_vfeehs, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfeehs_u16a, s390_vfeehs, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfeehs_u16b, s390_vfeehs, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfeefs_s32, s390_vfeefs, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfeefs_u32a, s390_vfeefs, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfeefs_u32b, s390_vfeefs, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfeebs_s8, s390_vfeebs, 0, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfeebs_u8a, s390_vfeebs, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfeebs_u8b, s390_vfeebs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfeehs_s16, s390_vfeehs, 0, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfeehs_u16a, s390_vfeehs, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfeehs_u16b, s390_vfeehs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfeefs_s32, s390_vfeefs, 0, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfeefs_u32a, s390_vfeefs, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfeefs_u32b, s390_vfeefs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_cmpeq_or_0_idx_cc, s390_vfeezbs_s8, s390_vfeezfs_u32b, B_VX, BT_FN_INT_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfeezbs_s8, s390_vfeezbs, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfeezbs_u8a, s390_vfeezbs, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfeezbs_u8b, s390_vfeezbs, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfeezhs_s16, s390_vfeezhs, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfeezhs_u16a, s390_vfeezhs, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfeezhs_u16b, s390_vfeezhs, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfeezfs_s32, s390_vfeezfs, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfeezfs_u32a, s390_vfeezfs, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfeezfs_u32b, s390_vfeezfs, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfeezbs_s8, s390_vfeezbs, 0, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfeezbs_u8a, s390_vfeezbs, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfeezbs_u8b, s390_vfeezbs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfeezhs_s16, s390_vfeezhs, 0, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfeezhs_u16a, s390_vfeezhs, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfeezhs_u16b, s390_vfeezhs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfeezfs_s32, s390_vfeezfs, 0, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfeezfs_u32a, s390_vfeezfs, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfeezfs_u32b, s390_vfeezfs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) B_DEF (s390_vfeneb, vfenev16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI) B_DEF (s390_vfeneh, vfenev8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI) @@ -2334,48 +2603,48 @@ B_DEF (s390_vfenezhs, vfenezsv8hi, 0, B_DEF (s390_vfenezfs, vfenezsv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_cmpne_idx, s390_vfeneb_s8, s390_vfenef_u32b, B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfeneb_s8, s390_vfeneb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfeneb_u8a, s390_vfeneb, 0, BT_OV_UV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfeneb_u8b, s390_vfeneb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfeneh_s16, s390_vfeneh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfeneh_u16a, s390_vfeneh, 0, BT_OV_UV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfeneh_u16b, s390_vfeneh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfenef_s32, s390_vfenef, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfenef_u32a, s390_vfenef, 0, BT_OV_UV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfenef_u32b, s390_vfenef, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfeneb_s8, s390_vfeneb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfeneb_u8a, s390_vfeneb, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfeneb_u8b, s390_vfeneb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfeneh_s16, s390_vfeneh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfeneh_u16a, s390_vfeneh, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfeneh_u16b, s390_vfeneh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfenef_s32, s390_vfenef, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfenef_u32a, s390_vfenef, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfenef_u32b, s390_vfenef, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmpne_or_0_idx, s390_vfenezb_s8, s390_vfenezf_u32b, B_VX, BT_FN_INT_OV4SI_OV4SI) -OB_DEF_VAR (s390_vfenezb_s8, s390_vfenezb, 0, BT_OV_V16QI_V16QI_V16QI) -OB_DEF_VAR (s390_vfenezb_u8a, s390_vfenezb, 0, BT_OV_UV16QI_BV16QI_BV16QI) -OB_DEF_VAR (s390_vfenezb_u8b, s390_vfenezb, 0, BT_OV_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vfenezh_s16, s390_vfenezh, 0, BT_OV_V8HI_V8HI_V8HI) -OB_DEF_VAR (s390_vfenezh_u16a, s390_vfenezh, 0, BT_OV_UV8HI_BV8HI_BV8HI) -OB_DEF_VAR (s390_vfenezh_u16b, s390_vfenezh, 0, BT_OV_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vfenezf_s32, s390_vfenezf, 0, BT_OV_V4SI_V4SI_V4SI) -OB_DEF_VAR (s390_vfenezf_u32a, s390_vfenezf, 0, BT_OV_UV4SI_BV4SI_BV4SI) -OB_DEF_VAR (s390_vfenezf_u32b, s390_vfenezf, 0, BT_OV_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vfenezb_s8, s390_vfenezb, 0, 0, BT_OV_V16QI_V16QI_V16QI) +OB_DEF_VAR (s390_vfenezb_u8a, s390_vfenezb, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI) +OB_DEF_VAR (s390_vfenezb_u8b, s390_vfenezb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vfenezh_s16, s390_vfenezh, 0, 0, BT_OV_V8HI_V8HI_V8HI) +OB_DEF_VAR (s390_vfenezh_u16a, s390_vfenezh, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI) +OB_DEF_VAR (s390_vfenezh_u16b, s390_vfenezh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vfenezf_s32, s390_vfenezf, 0, 0, BT_OV_V4SI_V4SI_V4SI) +OB_DEF_VAR (s390_vfenezf_u32a, s390_vfenezf, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI) +OB_DEF_VAR (s390_vfenezf_u32b, s390_vfenezf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmpne_idx_cc, s390_vfenebs_s8, s390_vfenefs_u32b, B_VX, BT_FN_INT_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfenebs_s8, s390_vfenebs, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfenebs_u8a, s390_vfenebs, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfenebs_u8b, s390_vfenebs, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfenehs_s16, s390_vfenehs, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfenehs_u16a, s390_vfenehs, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfenehs_u16b, s390_vfenehs, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfenefs_s32, s390_vfenefs, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfenefs_u32a, s390_vfenefs, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfenefs_u32b, s390_vfenefs, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfenebs_s8, s390_vfenebs, 0, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfenebs_u8a, s390_vfenebs, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfenebs_u8b, s390_vfenebs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfenehs_s16, s390_vfenehs, 0, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfenehs_u16a, s390_vfenehs, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfenehs_u16b, s390_vfenehs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfenefs_s32, s390_vfenefs, 0, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfenefs_u32a, s390_vfenefs, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfenefs_u32b, s390_vfenefs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_cmpne_or_0_idx_cc, s390_vfenezbs_s8, s390_vfenezfs_u32b, B_VX, BT_FN_INT_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vfenezbs_s8, s390_vfenezbs, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vfenezbs_u8a, s390_vfenezbs, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vfenezbs_u8b, s390_vfenezbs, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vfenezhs_s16, s390_vfenezhs, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vfenezhs_u16a, s390_vfenezhs, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vfenezhs_u16b, s390_vfenezhs, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vfenezfs_s32, s390_vfenezfs, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vfenezfs_u32a, s390_vfenezfs, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vfenezfs_u32b, s390_vfenezfs, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vfenezbs_s8, s390_vfenezbs, 0, 0, BT_OV_V16QI_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vfenezbs_u8a, s390_vfenezbs, 0, 0, BT_OV_UV16QI_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vfenezbs_u8b, s390_vfenezbs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vfenezhs_s16, s390_vfenezhs, 0, 0, BT_OV_V8HI_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vfenezhs_u16a, s390_vfenezhs, 0, 0, BT_OV_UV8HI_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vfenezhs_u16b, s390_vfenezhs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vfenezfs_s32, s390_vfenezfs, 0, 0, BT_OV_V4SI_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vfenezfs_u32a, s390_vfenezfs, 0, 0, BT_OV_UV4SI_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vfenezfs_u32b, s390_vfenezfs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_INTPTR) B_DEF (s390_vistrb, vistrv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI) B_DEF (s390_vistrh, vistrv8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI) @@ -2385,26 +2654,26 @@ B_DEF (s390_vistrhs, vistrsv8hi, 0, B_DEF (s390_vistrfs, vistrsv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_cp_until_zero, s390_vistrb_s8, s390_vistrf_u32, B_VX, BT_FN_OV4SI_OV4SI) -OB_DEF_VAR (s390_vistrb_s8, s390_vistrb, 0, BT_OV_V16QI_V16QI) -OB_DEF_VAR (s390_vistrb_b8, s390_vistrb, 0, BT_OV_BV16QI_BV16QI) -OB_DEF_VAR (s390_vistrb_u8, s390_vistrb, 0, BT_OV_UV16QI_UV16QI) -OB_DEF_VAR (s390_vistrh_s16, s390_vistrh, 0, BT_OV_V8HI_V8HI) -OB_DEF_VAR (s390_vistrh_b16, s390_vistrh, 0, BT_OV_BV8HI_BV8HI) -OB_DEF_VAR (s390_vistrh_u16, s390_vistrh, 0, BT_OV_UV8HI_UV8HI) -OB_DEF_VAR (s390_vistrf_s32, s390_vistrf, 0, BT_OV_V4SI_V4SI) -OB_DEF_VAR (s390_vistrf_b32, s390_vistrf, 0, BT_OV_BV4SI_BV4SI) -OB_DEF_VAR (s390_vistrf_u32, s390_vistrf, 0, BT_OV_UV4SI_UV4SI) +OB_DEF_VAR (s390_vistrb_s8, s390_vistrb, 0, 0, BT_OV_V16QI_V16QI) +OB_DEF_VAR (s390_vistrb_b8, s390_vistrb, 0, 0, BT_OV_BV16QI_BV16QI) +OB_DEF_VAR (s390_vistrb_u8, s390_vistrb, 0, 0, BT_OV_UV16QI_UV16QI) +OB_DEF_VAR (s390_vistrh_s16, s390_vistrh, 0, 0, BT_OV_V8HI_V8HI) +OB_DEF_VAR (s390_vistrh_b16, s390_vistrh, 0, 0, BT_OV_BV8HI_BV8HI) +OB_DEF_VAR (s390_vistrh_u16, s390_vistrh, 0, 0, BT_OV_UV8HI_UV8HI) +OB_DEF_VAR (s390_vistrf_s32, s390_vistrf, 0, 0, BT_OV_V4SI_V4SI) +OB_DEF_VAR (s390_vistrf_b32, s390_vistrf, 0, 0, BT_OV_BV4SI_BV4SI) +OB_DEF_VAR (s390_vistrf_u32, s390_vistrf, 0, 0, BT_OV_UV4SI_UV4SI) OB_DEF (s390_vec_cp_until_zero_cc, s390_vistrbs_s8, s390_vistrfs_u32, B_VX, BT_FN_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vistrbs_s8, s390_vistrbs, 0, BT_OV_V16QI_V16QI_INTPTR) -OB_DEF_VAR (s390_vistrbs_b8, s390_vistrbs, 0, BT_OV_BV16QI_BV16QI_INTPTR) -OB_DEF_VAR (s390_vistrbs_u8, s390_vistrbs, 0, BT_OV_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vistrhs_s16, s390_vistrhs, 0, BT_OV_V8HI_V8HI_INTPTR) -OB_DEF_VAR (s390_vistrhs_b16, s390_vistrhs, 0, BT_OV_BV8HI_BV8HI_INTPTR) -OB_DEF_VAR (s390_vistrhs_u16, s390_vistrhs, 0, BT_OV_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vistrfs_s32, s390_vistrfs, 0, BT_OV_V4SI_V4SI_INTPTR) -OB_DEF_VAR (s390_vistrfs_b32, s390_vistrfs, 0, BT_OV_BV4SI_BV4SI_INTPTR) -OB_DEF_VAR (s390_vistrfs_u32, s390_vistrfs, 0, BT_OV_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vistrbs_s8, s390_vistrbs, 0, 0, BT_OV_V16QI_V16QI_INTPTR) +OB_DEF_VAR (s390_vistrbs_b8, s390_vistrbs, 0, 0, BT_OV_BV16QI_BV16QI_INTPTR) +OB_DEF_VAR (s390_vistrbs_u8, s390_vistrbs, 0, 0, BT_OV_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vistrhs_s16, s390_vistrhs, 0, 0, BT_OV_V8HI_V8HI_INTPTR) +OB_DEF_VAR (s390_vistrhs_b16, s390_vistrhs, 0, 0, BT_OV_BV8HI_BV8HI_INTPTR) +OB_DEF_VAR (s390_vistrhs_u16, s390_vistrhs, 0, 0, BT_OV_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vistrfs_s32, s390_vistrfs, 0, 0, BT_OV_V4SI_V4SI_INTPTR) +OB_DEF_VAR (s390_vistrfs_b32, s390_vistrfs, 0, 0, BT_OV_BV4SI_BV4SI_INTPTR) +OB_DEF_VAR (s390_vistrfs_u32, s390_vistrfs, 0, 0, BT_OV_UV4SI_UV4SI_INTPTR) B_DEF (s390_vstrcb, vstrcv16qi, 0, B_VX, O4_U4, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI_INT) B_DEF (s390_vstrch, vstrcv8hi, 0, B_VX, O4_U4, BT_FN_UV8HI_UV8HI_UV8HI_UV8HI_INT) @@ -2420,87 +2689,167 @@ B_DEF (s390_vstrczhs, vstrczsv8hi, 0, B_DEF (s390_vstrczfs, vstrczsv4si, 0, B_VX, O4_U4, BT_FN_UV4SI_UV4SI_UV4SI_UV4SI_INT_INTPTR) OB_DEF (s390_vec_cmprg_idx, s390_vstrcb_idx_u8, s390_vstrcf_idx_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vstrcb_idx_u8, s390_vstrcb, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vstrch_idx_u16, s390_vstrch, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vstrcf_idx_u32, s390_vstrcf, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vstrcb_idx_u8, s390_vstrcb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vstrch_idx_u16, s390_vstrch, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vstrcf_idx_u32, s390_vstrcf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmpnrg_idx, s390_vstrcb_inv_idx_u8,s390_vstrcf_inv_idx_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vstrcb_inv_idx_u8, s390_vstrcb, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vstrch_inv_idx_u16, s390_vstrch, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vstrcf_inv_idx_u32, s390_vstrcf, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vstrcb_inv_idx_u8, s390_vstrcb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vstrch_inv_idx_u16, s390_vstrch, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vstrcf_inv_idx_u32, s390_vstrcf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmprg_or_0_idx, s390_vstrczb_idx_u8,s390_vstrczf_idx_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vstrczb_idx_u8, s390_vstrczb, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vstrczh_idx_u16, s390_vstrczh, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vstrczf_idx_u32, s390_vstrczf, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vstrczb_idx_u8, s390_vstrczb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vstrczh_idx_u16, s390_vstrczh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vstrczf_idx_u32, s390_vstrczf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmpnrg_or_0_idx, s390_vstrczb_inv_idx_u8,s390_vstrczf_inv_idx_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vstrczb_inv_idx_u8, s390_vstrczb, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vstrczh_inv_idx_u16, s390_vstrczh, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vstrczf_inv_idx_u32, s390_vstrczf, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vstrczb_inv_idx_u8, s390_vstrczb, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vstrczh_inv_idx_u16, s390_vstrczh, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vstrczf_inv_idx_u32, s390_vstrczf, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmprg, s390_vstrcb_u8, s390_vstrcf_u32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vstrcb_u8, s390_vstrcb, 0, BT_OV_BV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vstrch_u16, s390_vstrch, 0, BT_OV_BV8HI_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vstrcf_u32, s390_vstrcf, 0, BT_OV_BV4SI_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vstrcb_u8, s390_vstrcb, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vstrch_u16, s390_vstrch, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vstrcf_u32, s390_vstrcf, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmpnrg, s390_vstrcb_inv_u8, s390_vstrcf_inv_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) -OB_DEF_VAR (s390_vstrcb_inv_u8, s390_vstrcb, 0, BT_OV_BV16QI_UV16QI_UV16QI_UV16QI) -OB_DEF_VAR (s390_vstrch_inv_u16, s390_vstrch, 0, BT_OV_BV8HI_UV8HI_UV8HI_UV8HI) -OB_DEF_VAR (s390_vstrcf_inv_u32, s390_vstrcf, 0, BT_OV_BV4SI_UV4SI_UV4SI_UV4SI) +OB_DEF_VAR (s390_vstrcb_inv_u8, s390_vstrcb, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI_UV16QI) +OB_DEF_VAR (s390_vstrch_inv_u16, s390_vstrch, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI_UV8HI) +OB_DEF_VAR (s390_vstrcf_inv_u32, s390_vstrcf, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI_UV4SI) OB_DEF (s390_vec_cmprg_idx_cc, s390_vstrcbs_idx_u8,s390_vstrcfs_idx_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vstrcbs_idx_u8, s390_vstrcbs, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vstrchs_idx_u16, s390_vstrchs, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vstrcfs_idx_u32, s390_vstrcfs, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vstrcbs_idx_u8, s390_vstrcbs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vstrchs_idx_u16, s390_vstrchs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vstrcfs_idx_u32, s390_vstrcfs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_cmpnrg_idx_cc, s390_vstrcbs_inv_idx_u8,s390_vstrcfs_inv_idx_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vstrcbs_inv_idx_u8, s390_vstrcbs, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI_INTPTR) /* vstrcb */ -OB_DEF_VAR (s390_vstrchs_inv_idx_u16, s390_vstrchs, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI_INTPTR) /* vstrch */ -OB_DEF_VAR (s390_vstrcfs_inv_idx_u32, s390_vstrcfs, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI_INTPTR) /* vstrcf */ +OB_DEF_VAR (s390_vstrcbs_inv_idx_u8, s390_vstrcbs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI_INTPTR) /* vstrcb */ +OB_DEF_VAR (s390_vstrchs_inv_idx_u16, s390_vstrchs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI_INTPTR) /* vstrch */ +OB_DEF_VAR (s390_vstrcfs_inv_idx_u32, s390_vstrcfs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI_INTPTR) /* vstrcf */ OB_DEF (s390_vec_cmprg_or_0_idx_cc, s390_vstrczbs_idx_u8,s390_vstrczfs_idx_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vstrczbs_idx_u8, s390_vstrczbs, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vstrczhs_idx_u16, s390_vstrczhs, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vstrczfs_idx_u32, s390_vstrczfs, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vstrczbs_idx_u8, s390_vstrczbs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vstrczhs_idx_u16, s390_vstrczhs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vstrczfs_idx_u32, s390_vstrczfs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_cmpnrg_or_0_idx_cc,s390_vstrczbs_inv_idx_u8,s390_vstrczfs_inv_idx_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vstrczbs_inv_idx_u8, s390_vstrczbs, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vstrczhs_inv_idx_u16, s390_vstrczhs, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vstrczfs_inv_idx_u32, s390_vstrczfs, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vstrczbs_inv_idx_u8, s390_vstrczbs, 0, 0, BT_OV_UV16QI_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vstrczhs_inv_idx_u16, s390_vstrczhs, 0, 0, BT_OV_UV8HI_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vstrczfs_inv_idx_u32, s390_vstrczfs, 0, 0, BT_OV_UV4SI_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_cmprg_cc, s390_vstrcbs_u8, s390_vstrcfs_u32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vstrcbs_u8, s390_vstrcbs, 0, BT_OV_BV16QI_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vstrchs_u16, s390_vstrchs, 0, BT_OV_BV8HI_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vstrcfs_u32, s390_vstrcfs, 0, BT_OV_BV4SI_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vstrcbs_u8, s390_vstrcbs, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vstrchs_u16, s390_vstrchs, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vstrcfs_u32, s390_vstrcfs, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI_UV4SI_INTPTR) OB_DEF (s390_vec_cmpnrg_cc, s390_vstrcbs_inv_u8,s390_vstrcfs_inv_u32,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI_INTPTR) -OB_DEF_VAR (s390_vstrcbs_inv_u8, s390_vstrcbs, 0, BT_OV_BV16QI_UV16QI_UV16QI_UV16QI_INTPTR) -OB_DEF_VAR (s390_vstrchs_inv_u16, s390_vstrchs, 0, BT_OV_BV8HI_UV8HI_UV8HI_UV8HI_INTPTR) -OB_DEF_VAR (s390_vstrcfs_inv_u32, s390_vstrcfs, 0, BT_OV_BV4SI_UV4SI_UV4SI_UV4SI_INTPTR) +OB_DEF_VAR (s390_vstrcbs_inv_u8, s390_vstrcbs, 0, 0, BT_OV_BV16QI_UV16QI_UV16QI_UV16QI_INTPTR) +OB_DEF_VAR (s390_vstrchs_inv_u16, s390_vstrchs, 0, 0, BT_OV_BV8HI_UV8HI_UV8HI_UV8HI_INTPTR) +OB_DEF_VAR (s390_vstrcfs_inv_u32, s390_vstrcfs, 0, 0, BT_OV_BV4SI_UV4SI_UV4SI_UV4SI_INTPTR) -B_DEF (s390_vec_all_nge, vec_all_unltv2df, 0, B_VX, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (s390_vec_all_ngt, vec_all_unlev2df, 0, B_VX, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (s390_vec_any_nge, vec_any_unltv2df, 0, B_VX, 0, BT_FN_INT_V2DF_V2DF) -B_DEF (s390_vec_any_ngt, vec_any_unlev2df, 0, B_VX, 0, BT_FN_INT_V2DF_V2DF) +B_DEF (vec_all_unltv4sf, vec_all_unltv4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_all_unltv2df, vec_all_unltv2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) +B_DEF (vec_all_unlev4sf, vec_all_unlev4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_all_unlev2df, vec_all_unlev2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +B_DEF (vec_any_unltv4sf, vec_any_unltv4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_any_unltv2df, vec_any_unltv2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) +B_DEF (vec_any_unlev4sf, vec_any_unlev4sf, 0, B_INT | B_VXE, 0, BT_FN_INT_V4SF_V4SF) +B_DEF (vec_any_unlev2df, vec_any_unlev2df, 0, B_INT | B_VX, 0, BT_FN_INT_V2DF_V2DF) + +OB_DEF (s390_vec_all_nge, s390_vec_all_nge_flt,s390_vec_all_nge_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_all_nge_flt, vec_all_unltv4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) /* vfchesbs */ +OB_DEF_VAR (s390_vec_all_nge_dbl, vec_all_unltv2df, 0, 0, BT_OV_INT_V2DF_V2DF) /* vfchedbs */ + +OB_DEF (s390_vec_all_ngt, s390_vec_all_ngt_flt,s390_vec_all_ngt_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_all_ngt_flt, vec_all_unlev4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) /* vfchsbs */ +OB_DEF_VAR (s390_vec_all_ngt_dbl, vec_all_unlev2df, 0, 0, BT_OV_INT_V2DF_V2DF) /* vfchdbs */ + +OB_DEF (s390_vec_any_nge, s390_vec_any_nge_flt,s390_vec_any_nge_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_any_nge_flt, vec_any_unltv4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_any_nge_dbl, vec_any_unltv2df, 0, 0, BT_OV_INT_V2DF_V2DF) + +OB_DEF (s390_vec_any_ngt, s390_vec_any_ngt_flt,s390_vec_any_ngt_dbl,B_VX, BT_FN_INT_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_any_ngt_flt, vec_any_unlev4sf, B_VXE, 0, BT_OV_INT_V4SF_V4SF) +OB_DEF_VAR (s390_vec_any_ngt_dbl, vec_any_unlev2df, 0, 0, BT_OV_INT_V2DF_V2DF) OB_DEF (s390_vec_ctd, s390_vec_ctd_s64, s390_vec_ctd_u64, B_VX, BT_FN_V2DF_UV4SI_INT) -OB_DEF_VAR (s390_vec_ctd_s64, s390_vec_ctd_s64, O2_U5, BT_OV_V2DF_V2DI_INT) /* vcdgb */ -OB_DEF_VAR (s390_vec_ctd_u64, s390_vec_ctd_u64, O2_U5, BT_OV_V2DF_UV2DI_INT) /* vcdlgb */ +OB_DEF_VAR (s390_vec_ctd_s64, s390_vec_ctd_s64, 0, O2_U5, BT_OV_V2DF_V2DI_INT) /* vcdgb */ +OB_DEF_VAR (s390_vec_ctd_u64, s390_vec_ctd_u64, 0, O2_U5, BT_OV_V2DF_UV2DI_INT) /* vcdlgb */ B_DEF (s390_vec_ctd_s64, vec_ctd_s64, 0, B_VX, O2_U3, BT_FN_V2DF_V2DI_INT) /* vcdgb */ B_DEF (s390_vec_ctd_u64, vec_ctd_u64, 0, B_VX, O2_U3, BT_FN_V2DF_UV2DI_INT) /* vcdlgb */ -B_DEF (s390_vcdgb, vec_di_to_df_s64, 0, B_VX, O2_U3, BT_FN_V2DF_V2DI_INT) /* vcdgb */ -B_DEF (s390_vcdlgb, vec_di_to_df_u64, 0, B_VX, O2_U3, BT_FN_V2DF_UV2DI_INT) /* vcdlgb */ +B_DEF (s390_vcdgb, vcdgb, 0, B_VX, O2_U4 | O3_U3, BT_FN_V2DF_V2DI_INT_INT) +B_DEF (s390_vcdlgb, vcdlgb, 0, B_VX, O2_U4 | O3_U3, BT_FN_V2DF_UV2DI_INT_INT) B_DEF (s390_vec_ctsl, vec_ctsl, 0, B_VX, O2_U3, BT_FN_V2DI_V2DF_INT) /* vcgdb */ B_DEF (s390_vec_ctul, vec_ctul, 0, B_VX, O2_U3, BT_FN_UV2DI_V2DF_INT) /* vclgdb */ -B_DEF (s390_vcgdb, vec_df_to_di_s64, 0, B_VX, O2_U3, BT_FN_V2DI_V2DF_INT) /* vcgdb */ -B_DEF (s390_vclgdb, vec_df_to_di_u64, 0, B_VX, O2_U3, BT_FN_UV2DI_V2DF_INT) /* vclgdb */ -B_DEF (s390_vfidb, vfiv2df, 0, B_VX, O2_U4 | O3_U3, BT_FN_V2DF_V2DF_UCHAR_UCHAR) +B_DEF (s390_vcgdb, vcgdb, 0, B_VX, O2_U4 | O3_U3, BT_FN_V2DI_V2DF_INT_INT) +B_DEF (s390_vclgdb, vclgdb, 0, B_VX, O2_U4 | O3_U3, BT_FN_UV2DI_V2DF_INT_INT) +B_DEF (s390_vfisb, vec_fpintv4sf, 0, B_VXE, O2_U4 | O3_U3, BT_FN_V4SF_V4SF_UCHAR_UCHAR) +B_DEF (s390_vfidb, vec_fpintv2df, 0, B_VX, O2_U4 | O3_U3, BT_FN_V2DF_V2DF_UCHAR_UCHAR) B_DEF (s390_vec_ld2f, vec_ld2f, 0, B_VX, 0, BT_FN_V2DF_FLTCONSTPTR) /* vldeb */ B_DEF (s390_vec_st2f, vec_st2f, 0, B_VX, 0, BT_FN_VOID_V2DF_FLTPTR) /* vledb */ + +B_DEF (s390_vfmasb, fmav4sf4, 0, B_VXE, 0, BT_FN_V4SF_V4SF_V4SF_V4SF) B_DEF (s390_vfmadb, fmav2df4, 0, B_VX, 0, BT_FN_V2DF_V2DF_V2DF_V2DF) +B_DEF (s390_vfmssb, fmsv4sf4, 0, B_VXE, 0, BT_FN_V4SF_V4SF_V4SF_V4SF) B_DEF (s390_vfmsdb, fmsv2df4, 0, B_VX, 0, BT_FN_V2DF_V2DF_V2DF_V2DF) -B_DEF (s390_vflndb, vec_nabs, 0, B_VX, 0, BT_FN_V2DF_V2DF) +B_DEF (s390_vfnmasb, neg_fmav4sf4, 0, B_VXE, 0, BT_FN_V4SF_V4SF_V4SF_V4SF) +B_DEF (s390_vfnmadb, neg_fmav2df4, 0, B_VXE, 0, BT_FN_V2DF_V2DF_V2DF_V2DF) +B_DEF (s390_vfnmssb, neg_fmsv4sf4, 0, B_VXE, 0, BT_FN_V4SF_V4SF_V4SF_V4SF) +B_DEF (s390_vfnmsdb, neg_fmsv2df4, 0, B_VXE, 0, BT_FN_V2DF_V2DF_V2DF_V2DF) + +B_DEF (s390_vfsqsb, sqrtv4sf2, 0, B_VXE, 0, BT_FN_V4SF_V4SF) B_DEF (s390_vfsqdb, sqrtv2df2, 0, B_VX, 0, BT_FN_V2DF_V2DF) -B_DEF (s390_vftcidb, vftcidb, 0, B_VX, O2_U12, BT_FN_V2DI_V2DF_INT_INTPTR) + +OB_DEF (s390_vec_double, s390_vec_double_s64,s390_vec_double_u64,B_VX, BT_FN_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_double_s64, s390_vcdgb, 0, 0, BT_OV_V2DF_V2DI) +OB_DEF_VAR (s390_vec_double_u64, s390_vcdlgb, 0, 0, BT_OV_V2DF_UV2DI) + +B_DEF (s390_vec_double_s64, vec_double_s64, 0, B_INT | B_VX, 0, BT_FN_V2DF_V2DI) /* vcdgb */ +B_DEF (s390_vec_double_u64, vec_double_u64, 0, B_INT | B_VX, 0, BT_FN_V2DF_UV2DI) /* vcdlgb */ + +B_DEF (s390_vflls, vflls, 0, B_VX, 0, BT_FN_V2DF_V4SF) /* vldeb */ +B_DEF (s390_vflrd, vflrd, 0, B_VX, O2_U4 | O3_U4, BT_FN_V4SF_V2DF_INT_INT) /* vledb */ + +OB_DEF (s390_vec_madd, s390_vec_madd_flt, s390_vec_madd_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_madd_flt, s390_vfmasb, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_madd_dbl, s390_vfmadb, 0, 0, BT_OV_V2DF_V2DF_V2DF_V2DF) + +OB_DEF (s390_vec_msub, s390_vec_msub_flt, s390_vec_msub_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_msub_flt, s390_vfmssb, B_VXE, 0, BT_OV_V4SF_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_msub_dbl, s390_vfmsdb, 0, 0, BT_OV_V2DF_V2DF_V2DF_V2DF) + +OB_DEF (s390_vec_nmadd, s390_vec_nmadd_flt, s390_vec_nmadd_dbl, B_VXE, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_nmadd_flt, s390_vfnmasb, 0, 0, BT_OV_V4SF_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_nmadd_dbl, s390_vfnmadb, 0, 0, BT_OV_V2DF_V2DF_V2DF_V2DF) + +OB_DEF (s390_vec_nmsub, s390_vec_nmsub_flt, s390_vec_nmsub_dbl, B_VXE, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_nmsub_flt, s390_vfnmssb, 0, 0, BT_OV_V4SF_V4SF_V4SF_V4SF) +OB_DEF_VAR (s390_vec_nmsub_dbl, s390_vfnmsdb, 0, 0, BT_OV_V2DF_V2DF_V2DF_V2DF) + +B_DEF (s390_vflnsb, negabsv4sf2, 0, B_VXE, 0, BT_FN_V4SF_V4SF) +B_DEF (s390_vflndb, negabsv2df2, 0, B_VX, 0, BT_FN_V2DF_V2DF) + +OB_DEF (s390_vec_nabs, s390_vec_nabs_flt, s390_vec_nabs_dbl, B_VXE, BT_FN_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_nabs_flt, s390_vflnsb, 0, 0, BT_OV_V4SF_V4SF) +OB_DEF_VAR (s390_vec_nabs_dbl, s390_vflndb, B_VX, 0, BT_OV_V2DF_V2DF) + +OB_DEF (s390_vec_sqrt, s390_vec_sqrt_flt, s390_vec_sqrt_dbl, B_VXE, BT_FN_OV4SI_OV4SI) +OB_DEF_VAR (s390_vec_sqrt_flt, s390_vfsqsb, 0, 0, BT_OV_V4SF_V4SF) +OB_DEF_VAR (s390_vec_sqrt_dbl, s390_vfsqdb, B_VX, 0, BT_OV_V2DF_V2DF) + +/* Test data class with boolean result *AND* cc mode. */ + +B_DEF (s390_vftcisb, vftciv4sf_intcc, 0, B_VXE, O2_U12, BT_FN_V4SI_V4SF_INT_INTPTR) +B_DEF (s390_vftcidb, vftciv2df_intcc, 0, B_VX, O2_U12, BT_FN_V2DI_V2DF_INT_INTPTR) + +/* Test data class with boolean result *AND* cc mode. */ + +B_DEF (s390_vftcisbcc, vftciv4sf_intcc, 0, B_INT | B_VXE, O2_U12, BT_FN_BV4SI_V4SF_USHORT_INTPTR) /* vftcisb */ +B_DEF (s390_vftcidbcc, vftciv2df_intcc, 0, B_INT | B_VX, O2_U12, BT_FN_BV2DI_V2DF_USHORT_INTPTR) /* vftcidb */ + +OB_DEF (s390_vec_fp_test_data_class,s390_vec_fp_test_data_class_flt,s390_vec_fp_test_data_class_dbl,B_VX,BT_FN_OV4SI_OV4SI_INT_INTPTR) +OB_DEF_VAR (s390_vec_fp_test_data_class_flt,s390_vftcisbcc, B_VXE, O2_U12, BT_OV_BV4SI_V4SF_USHORT_INTPTR) /* vftcisb */ +OB_DEF_VAR (s390_vec_fp_test_data_class_dbl,s390_vftcidbcc, 0, O2_U12, BT_OV_BV2DI_V2DF_USHORT_INTPTR) /* vftcidb */ diff --git a/gcc/config/s390/s390-builtins.h b/gcc/config/s390/s390-builtins.h index eb15c96bbaf..019aff95dd5 100644 --- a/gcc/config/s390/s390-builtins.h +++ b/gcc/config/s390/s390-builtins.h @@ -145,6 +145,8 @@ extern const unsigned int opflags_builtin[S390_BUILTIN_MAX + 1]; extern const unsigned int bflags_overloaded_builtin[S390_OVERLOADED_BUILTIN_MAX + 1]; extern const unsigned int + bflags_overloaded_builtin_var[S390_OVERLOADED_BUILTIN_VAR_MAX + 1]; +extern const unsigned int opflags_overloaded_builtin_var[S390_OVERLOADED_BUILTIN_VAR_MAX + 1]; static inline unsigned int diff --git a/gcc/config/s390/s390-c.c b/gcc/config/s390/s390-c.c index 019d86eb24c..fb8d821922d 100644 --- a/gcc/config/s390/s390-c.c +++ b/gcc/config/s390/s390-c.c @@ -61,7 +61,7 @@ type_for_overloaded_builtin_var[S390_OVERLOADED_BUILTIN_VAR_MAX + 1] = #undef OB_DEF_VAR #define B_DEF(...) #define OB_DEF(...) -#define OB_DEF_VAR(NAME, PATTERN, FLAGS, FNTYPE) FNTYPE, +#define OB_DEF_VAR(NAME, PATTERN, FLAGS, OPFLAGS, FNTYPE) FNTYPE, #include "s390-builtins.def" BT_OV_MAX }; @@ -259,6 +259,7 @@ s390_macro_to_expand (cpp_reader *pfile, const cpp_token *tok) if (rid_code == RID_UNSIGNED || rid_code == RID_LONG || rid_code == RID_SHORT || rid_code == RID_SIGNED || rid_code == RID_INT || rid_code == RID_CHAR + || (rid_code == RID_FLOAT && TARGET_VXE) || rid_code == RID_DOUBLE) { expand_this = C_CPP_HASHNODE (__vector_keyword); @@ -323,7 +324,7 @@ s390_cpu_cpp_builtins_internal (cpp_reader *pfile, s390_def_or_undef_macro (pfile, MASK_OPT_VX, old_opts, opts, "__VX__", "__VX__"); s390_def_or_undef_macro (pfile, MASK_ZVECTOR, old_opts, opts, - "__VEC__=10301", "__VEC__"); + "__VEC__=10302", "__VEC__"); s390_def_or_undef_macro (pfile, MASK_ZVECTOR, old_opts, opts, "__vector=__attribute__((vector_size(16)))", "__vector__"); @@ -471,11 +472,13 @@ s390_expand_overloaded_builtin (location_t loc, } return build_int_cst (NULL_TREE, TYPE_VECTOR_SUBPARTS (TREE_TYPE ((*arglist)[0]))); + case S390_OVERLOADED_BUILTIN_s390_vec_xl: case S390_OVERLOADED_BUILTIN_s390_vec_xld2: case S390_OVERLOADED_BUILTIN_s390_vec_xlw4: return build2 (MEM_REF, return_type, fold_build_pointer_plus ((*arglist)[1], (*arglist)[0]), build_int_cst (TREE_TYPE ((*arglist)[1]), 0)); + case S390_OVERLOADED_BUILTIN_s390_vec_xst: case S390_OVERLOADED_BUILTIN_s390_vec_xstd2: case S390_OVERLOADED_BUILTIN_s390_vec_xstw4: return build2 (MODIFY_EXPR, TREE_TYPE((*arglist)[0]), @@ -848,6 +851,7 @@ s390_resolve_overloaded_builtin (location_t loc, int last_match_type = INT_MAX; int last_match_index = -1; unsigned int all_op_flags; + const unsigned int ob_flags = bflags_for_builtin(ob_fcode); int num_matches = 0; tree target_builtin_decl, b_arg_chain, return_type; enum s390_builtin_ov_type_index last_match_fntype_index; @@ -861,7 +865,7 @@ s390_resolve_overloaded_builtin (location_t loc, /* 0...S390_BUILTIN_MAX-1 is for non-overloaded builtins. */ if (ob_fcode < S390_BUILTIN_MAX) { - if (bflags_for_builtin(ob_fcode) & B_INT) + if (ob_flags & B_INT) { error_at (loc, "builtin %qF is for GCC internal use only.", @@ -871,6 +875,21 @@ s390_resolve_overloaded_builtin (location_t loc, return NULL_TREE; } + if (ob_flags & B_DEP) + warning_at (loc, 0, "builtin %qF is deprecated.", ob_fndecl); + + if (!TARGET_VX && (ob_flags & B_VX)) + { + error_at (loc, "%qF requires -mvx", ob_fndecl); + return error_mark_node; + } + + if (!TARGET_VXE && (ob_flags & B_VXE)) + { + error_at (loc, "%qF requires -march=arch12 or higher", ob_fndecl); + return error_mark_node; + } + ob_fcode -= S390_BUILTIN_MAX; for (b_arg_chain = TYPE_ARG_TYPES (TREE_TYPE (ob_fndecl)); @@ -941,6 +960,20 @@ s390_resolve_overloaded_builtin (location_t loc, return error_mark_node; } + if (!TARGET_VXE + && bflags_overloaded_builtin_var[last_match_index] & B_VXE) + { + error_at (loc, "%qs matching variant requires -march=arch12 or higher", + IDENTIFIER_POINTER (DECL_NAME (ob_fndecl))); + return error_mark_node; + } + + if (bflags_overloaded_builtin_var[last_match_index] & B_DEP) + warning_at (loc, 0, "%qs matching variant is deprecated.", + IDENTIFIER_POINTER (DECL_NAME (ob_fndecl))); + + /* Overloaded variants which have MAX set as low level builtin are + supposed to be replaced during expansion with something else. */ if (bt_for_overloaded_builtin_var[last_match_index] == S390_BUILTIN_MAX) target_builtin_decl = ob_fndecl; else diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 1d26979cdea..0b1a95f2dca 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -625,6 +625,19 @@ const unsigned int bflags_overloaded_builtin[S390_OVERLOADED_BUILTIN_MAX + 1] = }; const unsigned int +bflags_overloaded_builtin_var[S390_OVERLOADED_BUILTIN_VAR_MAX + 1] = + { +#undef B_DEF +#undef OB_DEF +#undef OB_DEF_VAR +#define B_DEF(...) +#define OB_DEF(...) +#define OB_DEF_VAR(NAME, PATTERN, FLAGS, OPFLAGS, FNTYPE) FLAGS, +#include "s390-builtins.def" + 0 + }; + +const unsigned int opflags_overloaded_builtin_var[S390_OVERLOADED_BUILTIN_VAR_MAX + 1] = { #undef B_DEF @@ -632,7 +645,7 @@ opflags_overloaded_builtin_var[S390_OVERLOADED_BUILTIN_VAR_MAX + 1] = #undef OB_DEF_VAR #define B_DEF(...) #define OB_DEF(...) -#define OB_DEF_VAR(NAME, PATTERN, FLAGS, FNTYPE) FLAGS, +#define OB_DEF_VAR(NAME, PATTERN, FLAGS, OPFLAGS, FNTYPE) OPFLAGS, #include "s390-builtins.def" 0 }; @@ -827,7 +840,7 @@ s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, } if (((bflags & B_VX) || (bflags & B_VXE)) && !TARGET_VX) { - error ("builtin %qF is not supported without -mvx " + error ("builtin %qF requires -mvx " "(default with -march=z13 and higher).", fndecl); return const0_rtx; } diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 7e9add7c340..59f189c5e97 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -156,6 +156,7 @@ UNSPEC_VEC_INSERT_AND_ZERO UNSPEC_VEC_LOAD_BNDRY UNSPEC_VEC_LOAD_LEN + UNSPEC_VEC_LOAD_LEN_R UNSPEC_VEC_MERGEH UNSPEC_VEC_MERGEL UNSPEC_VEC_PACK @@ -169,6 +170,8 @@ UNSPEC_VEC_PERMI UNSPEC_VEC_EXTEND UNSPEC_VEC_STORE_LEN + UNSPEC_VEC_STORE_LEN_R + UNSPEC_VEC_VBPERM UNSPEC_VEC_UNPACKH UNSPEC_VEC_UNPACKH_L UNSPEC_VEC_UNPACKL @@ -223,13 +226,18 @@ UNSPEC_VEC_VCGDB UNSPEC_VEC_VCLGDB - UNSPEC_VEC_VFIDB + UNSPEC_VEC_VFI - UNSPEC_VEC_VLDEB - UNSPEC_VEC_VLEDB + UNSPEC_VEC_VFLL ; vector fp load lengthened + UNSPEC_VEC_VFLR ; vector fp load rounded - UNSPEC_VEC_VFTCIDB - UNSPEC_VEC_VFTCIDBCC + UNSPEC_VEC_VFTCI + UNSPEC_VEC_VFTCICC + + UNSPEC_VEC_MSUM + + UNSPEC_VEC_VFMIN + UNSPEC_VEC_VFMAX ]) ;; @@ -400,7 +408,7 @@ ;; Used to determine defaults for length and other attribute values. (define_attr "op_type" - "NN,E,RR,RRE,RX,RS,RSI,RI,SI,S,SS,SSE,RXE,RSE,RIL,RIE,RXY,RSY,SIY,RRF,SIL,RRS,RIS,VRI,VRR,VRS,VRV,VRX" + "NN,E,RR,RRE,RX,RS,RSI,RI,SI,S,SS,SSE,RXE,RSE,RIL,RIE,RXY,RSY,SIY,RRF,SIL,RRS,RIS,VRI,VRR,VRS,VRV,VRX,VSI" (const_string "NN")) ;; Instruction type attribute used for scheduling. diff --git a/gcc/config/s390/vecintrin.h b/gcc/config/s390/vecintrin.h index 75bb4f223c3..38cc0692df8 100644 --- a/gcc/config/s390/vecintrin.h +++ b/gcc/config/s390/vecintrin.h @@ -21,18 +21,42 @@ along with GCC; see the file COPYING3. If not see #ifndef _VECINTRIN_H #define _VECINTRIN_H -#define __VFTCI_ZERO 1<<11 -#define __VFTCI_ZERO_N 1<<10 -#define __VFTCI_NORMAL 1<<9 -#define __VFTCI_NORMAL_N 1<<8 -#define __VFTCI_SUBNORMAL 1<<7 -#define __VFTCI_SUBNORMAL_N 1<<6 -#define __VFTCI_INF 1<<5 -#define __VFTCI_INF_N 1<<4 -#define __VFTCI_QNAN 1<<3 -#define __VFTCI_QNAN_N 1<<2 -#define __VFTCI_SNAN 1<<1 -#define __VFTCI_SNAN_N 1<<0 +#define __VEC_CLASS_FP_ZERO_P (1<<11) +#define __VEC_CLASS_FP_ZERO_N (1<<10) +#define __VEC_CLASS_FP_ZERO (__VEC_CLASS_FP_ZERO_P \ + | __VEC_CLASS_FP_ZERO_N) + +#define __VEC_CLASS_FP_NORMAL_P (1<<9) +#define __VEC_CLASS_FP_NORMAL_N (1<<8) +#define __VEC_CLASS_FP_NORMAL (__VEC_CLASS_FP_NORMAL_P \ + | __VEC_CLASS_FP_NORMAL_N) + +#define __VEC_CLASS_FP_SUBNORMAL_P (1<<7) +#define __VEC_CLASS_FP_SUBNORMAL_N (1<<6) +#define __VEC_CLASS_FP_SUBNORMAL (__VEC_CLASS_FP_SUBNORMAL_P \ + | __VEC_CLASS_FP_SUBNORMAL_N) + +#define __VEC_CLASS_FP_INFINITY_P (1<<5) +#define __VEC_CLASS_FP_INFINITY_N (1<<4) +#define __VEC_CLASS_FP_INFINITY (__VEC_CLASS_FP_INFINITY_P \ + | __VEC_CLASS_FP_INFINITY_N) + +#define __VEC_CLASS_FP_QNAN_P (1<<3) +#define __VEC_CLASS_FP_QNAN_N (1<<2) +#define __VEC_CLASS_FP_QNAN (__VEC_CLASS_FP_QNAN_P \ + | __VEC_CLASS_FP_QNAN_N) + +#define __VEC_CLASS_FP_SNAN_P (1<<1) +#define __VEC_CLASS_FP_SNAN_N (1<<0) +#define __VEC_CLASS_FP_SNAN (__VEC_CLASS_FP_SNAN_P \ + | __VEC_CLASS_FP_SNAN_N) + +#define __VEC_CLASS_FP_NAN (__VEC_CLASS_FP_QNAN \ + | __VEC_CLASS_FP_SNAN) +#define __VEC_CLASS_FP_NOT_NORMAL (__VEC_CLASS_FP_NAN \ + | __VEC_CLASS_FP_SUBNORMAL \ + |__VEC_CLASS_FP_ZERO \ + | __VEC_CLASS_FP_INFINITY) /* This also accepts a type for its parameter, so it is not enough to #define vec_step to __builtin_vec_step. */ @@ -76,62 +100,69 @@ __lcbb(const void *ptr, int bndry) #define vec_checksum __builtin_s390_vcksm #define vec_gfmsum_128 __builtin_s390_vgfmg #define vec_gfmsum_accum_128 __builtin_s390_vgfmag -#define vec_ceil(X) __builtin_s390_vfidb((X), 4, 6) -#define vec_roundp(X) __builtin_s390_vfidb((X), 4, 6) -#define vec_floor(X) __builtin_s390_vfidb((X), 4, 7) -#define vec_roundm(X) __builtin_s390_vfidb((X), 4, 7) -#define vec_trunc(X) __builtin_s390_vfidb((X), 4, 5) -#define vec_roundz(X) __builtin_s390_vfidb((X), 4, 5) -#define vec_roundc(X) __builtin_s390_vfidb((X), 4, 0) -#define vec_round(X) __builtin_s390_vfidb((X), 4, 4) +#define vec_ceil(X) __builtin_s390_vfi((X), 4, 6) +#define vec_roundp(X) __builtin_s390_vfi((X), 4, 6) +#define vec_floor(X) __builtin_s390_vfi((X), 4, 7) +#define vec_roundm(X) __builtin_s390_vfi((X), 4, 7) +#define vec_trunc(X) __builtin_s390_vfi((X), 4, 5) +#define vec_roundz(X) __builtin_s390_vfi((X), 4, 5) +#define vec_rint(X) __builtin_s390_vfi((X), 0, 0) +#define vec_roundc(X) __builtin_s390_vfi((X), 4, 0) +#define vec_round(X) __builtin_s390_vfi((X), 4, 4) +#define vec_signed(X) __builtin_s390_vcgdb((X), 0, 0) +#define vec_unsigned(X) __builtin_s390_vclgdb((X), 0, 0) +#define vec_doublee(X) __builtin_s390_vfll((X)) +#define vec_floate(X) __builtin_s390_vflr((X), 0, 0) #define vec_madd __builtin_s390_vfmadb #define vec_msub __builtin_s390_vfmsdb +#define vec_load_len_r(X,Y) __builtin_s390_vlrl((Y),(X)) +#define vec_store_len_r(X,Y) __builtin_s390_vstrl((Y),(X)) #define vec_all_nan(a) \ __extension__ ({ \ int __cc; \ - __builtin_s390_vftcidb (a, \ - __VFTCI_QNAN \ - | __VFTCI_QNAN_N \ - | __VFTCI_SNAN \ - | __VFTCI_SNAN_N, &__cc); \ + __builtin_s390_vec_fp_test_data_class (a, \ + __VEC_CLASS_FP_QNAN \ + | __VEC_CLASS_FP_QNAN_N \ + | __VEC_CLASS_FP_SNAN \ + | __VEC_CLASS_FP_SNAN_N, &__cc); \ __cc == 0 ? 1 : 0; \ }) #define vec_all_numeric(a) \ __extension__ ({ \ int __cc; \ - __builtin_s390_vftcidb (a, \ - __VFTCI_NORMAL \ - | __VFTCI_NORMAL_N \ - | __VFTCI_SUBNORMAL \ - | __VFTCI_SUBNORMAL_N, &__cc); \ + __builtin_s390_vec_fp_test_data_class (a, \ + __VEC_CLASS_FP_NORMAL \ + | __VEC_CLASS_FP_NORMAL_N \ + | __VEC_CLASS_FP_SUBNORMAL \ + | __VEC_CLASS_FP_SUBNORMAL_N, &__cc); \ __cc == 0 ? 1 : 0; \ }) #define vec_any_nan(a) \ __extension__ ({ \ int __cc; \ - __builtin_s390_vftcidb (a, \ - __VFTCI_QNAN \ - | __VFTCI_QNAN_N \ - | __VFTCI_SNAN \ - | __VFTCI_SNAN_N, &cc); \ + __builtin_s390_vec_fp_test_data_class (a, \ + __VEC_CLASS_FP_QNAN \ + | __VEC_CLASS_FP_QNAN_N \ + | __VEC_CLASS_FP_SNAN \ + | __VEC_CLASS_FP_SNAN_N, &cc); \ cc != 3 ? 1 : 0; \ }) #define vec_any_numeric(a) \ __extension__ ({ \ int __cc; \ - __builtin_s390_vftcidb (a, \ - __VFTCI_NORMAL \ - | __VFTCI_NORMAL_N \ - | __VFTCI_SUBNORMAL \ - | __VFTCI_SUBNORMAL_N, &cc); \ + __builtin_s390_vec_fp_test_data_class (a, \ + __VEC_CLASS_FP_NORMAL \ + | __VEC_CLASS_FP_NORMAL_N \ + | __VEC_CLASS_FP_SUBNORMAL \ + | __VEC_CLASS_FP_SUBNORMAL_N, &cc); \ cc != 3 ? 1 : 0; \ }) - #define vec_gather_element __builtin_s390_vec_gather_element +#define vec_xl __builtin_s390_vec_xl #define vec_xld2 __builtin_s390_vec_xld2 #define vec_xlw4 __builtin_s390_vec_xlw4 #define vec_splats __builtin_s390_vec_splats @@ -155,9 +186,11 @@ __lcbb(const void *ptr, int bndry) #define vec_scatter_element __builtin_s390_vec_scatter_element #define vec_sel __builtin_s390_vec_sel #define vec_extend_s64 __builtin_s390_vec_extend_s64 +#define vec_xst __builtin_s390_vec_xst #define vec_xstd2 __builtin_s390_vec_xstd2 #define vec_xstw4 __builtin_s390_vec_xstw4 #define vec_store_len __builtin_s390_vec_store_len +#define vec_bperm_u128 __builtin_s390_vec_bperm_u128 #define vec_unpackh __builtin_s390_vec_unpackh #define vec_unpackl __builtin_s390_vec_unpackl #define vec_addc __builtin_s390_vec_addc @@ -223,6 +256,10 @@ __lcbb(const void *ptr, int bndry) #define vec_sum_u128 __builtin_s390_vec_sum_u128 #define vec_sum4 __builtin_s390_vec_sum4 #define vec_test_mask __builtin_s390_vec_test_mask +#define vec_msum_u128 __builtin_s390_vec_msum_u128 +#define vec_eqv __builtin_s390_vec_eqv +#define vec_nand __builtin_s390_vec_nand +#define vec_orc __builtin_s390_vec_orc #define vec_find_any_eq_idx __builtin_s390_vec_find_any_eq_idx #define vec_find_any_ne_idx __builtin_s390_vec_find_any_ne_idx #define vec_find_any_eq_or_0_idx __builtin_s390_vec_find_any_eq_or_0_idx @@ -268,4 +305,10 @@ __lcbb(const void *ptr, int bndry) #define vec_ctul __builtin_s390_vec_ctul #define vec_ld2f __builtin_s390_vec_ld2f #define vec_st2f __builtin_s390_vec_st2f +#define vec_double __builtin_s390_vec_double +#define vec_nmadd __builtin_s390_vec_nmadd +#define vec_nmsub __builtin_s390_vec_nmsub +#define vec_nabs __builtin_s390_vec_nabs +#define vec_sqrt __builtin_s390_vec_sqrt +#define vec_fp_test_data_class __builtin_s390_vec_fp_test_data_class #endif /* _VECINTRIN_H */ diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index 48164dae213..cf79c7bc859 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -20,9 +20,13 @@ ; The patterns in this file are enabled with -mzvector -(define_mode_iterator V_HW_32_64 [V4SI V2DI V2DF]) +(define_mode_iterator V_HW_32_64 [V4SI V2DI V2DF (V4SF "TARGET_VXE")]) (define_mode_iterator VI_HW_SD [V4SI V2DI]) (define_mode_iterator V_HW_HSD [V8HI V4SI V2DI V2DF]) +(define_mode_iterator V_HW_4 [V4SI V4SF]) +; Full size vector modes with more than one element which are directly supported in vector registers by the hardware. +(define_mode_iterator VEC_HW [V16QI V8HI V4SI V2DI V2DF (V4SF "TARGET_VXE")]) +(define_mode_iterator VECF_HW [(V4SF "TARGET_VXE") V2DF]) ; The element type of the vector with floating point modes translated ; to int modes of the same size. @@ -61,6 +65,11 @@ (VEC_RND_TO_INF 6) (VEC_RND_TO_MINF 7)]) +; Inexact suppression facility flag as being used for e.g. VFI +(define_constants + [(VEC_INEXACT 0) + (VEC_NOINEXACT 4)]) + ; Vector gather element @@ -142,26 +151,26 @@ }) (define_expand "vec_splats<mode>" - [(set (match_operand:V_HW 0 "register_operand" "") - (vec_duplicate:V_HW (match_operand:<non_vec> 1 "general_operand" "")))] + [(set (match_operand:VEC_HW 0 "register_operand" "") + (vec_duplicate:VEC_HW (match_operand:<non_vec> 1 "general_operand" "")))] "TARGET_VX") (define_expand "vec_insert<mode>" - [(set (match_operand:V_HW 0 "register_operand" "") - (unspec:V_HW [(match_operand:<non_vec> 2 "register_operand" "") - (match_operand:SI 3 "nonmemory_operand" "") - (match_operand:V_HW 1 "register_operand" "")] - UNSPEC_VEC_SET))] + [(set (match_operand:VEC_HW 0 "register_operand" "") + (unspec:VEC_HW [(match_operand:<non_vec> 2 "register_operand" "") + (match_operand:SI 3 "nonmemory_operand" "") + (match_operand:VEC_HW 1 "register_operand" "")] + UNSPEC_VEC_SET))] "TARGET_VX" "") ; This is vec_set + modulo arithmetic on the element selector (op 2) (define_expand "vec_promote<mode>" - [(set (match_operand:V_HW 0 "register_operand" "") - (unspec:V_HW [(match_operand:<non_vec> 1 "register_operand" "") - (match_operand:SI 2 "nonmemory_operand" "") - (match_dup 0)] - UNSPEC_VEC_SET))] + [(set (match_operand:VEC_HW 0 "register_operand" "") + (unspec:VEC_HW [(match_operand:<non_vec> 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" "") + (match_dup 0)] + UNSPEC_VEC_SET))] "TARGET_VX" "") @@ -169,9 +178,9 @@ ; vllezb, vllezh, vllezf, vllezg (define_insn "vec_insert_and_zero<mode>" - [(set (match_operand:V_HW 0 "register_operand" "=v") - (unspec:V_HW [(match_operand:<non_vec> 1 "memory_operand" "R")] - UNSPEC_VEC_INSERT_AND_ZERO))] + [(set (match_operand:VEC_HW 0 "register_operand" "=v") + (unspec:VEC_HW [(match_operand:<non_vec> 1 "memory_operand" "R")] + UNSPEC_VEC_INSERT_AND_ZERO))] "TARGET_VX" "vllez<bhfgq>\t%v0,%1" [(set_attr "op_type" "VRX")]) @@ -185,24 +194,36 @@ "vlbb\t%v0,%1,%2" [(set_attr "op_type" "VRX")]) +(define_insn "vlrlrv16qi" + [(set (match_operand:V16QI 0 "register_operand" "=v,v") + (unspec:V16QI [(match_operand:BLK 2 "memory_operand" "Q,Q") + (match_operand:SI 1 "nonmemory_operand" "d,C")] + UNSPEC_VEC_LOAD_LEN_R))] + "TARGET_VXE" + "@ + vlrlr\t%v0,%1,%2 + vlrl\t%v0,%2,%1" + [(set_attr "op_type" "VRS,VSI")]) + + ; FIXME: The following two patterns might using vec_merge. But what is ; the canonical form: (vec_select (vec_merge op0 op1)) or (vec_merge ; (vec_select op0) (vec_select op1) ; vmrhb, vmrhh, vmrhf, vmrhg (define_insn "vec_mergeh<mode>" - [(set (match_operand:V_HW 0 "register_operand" "=v") - (unspec:V_HW [(match_operand:V_HW 1 "register_operand" "v") - (match_operand:V_HW 2 "register_operand" "v")] - UNSPEC_VEC_MERGEH))] + [(set (match_operand:VEC_HW 0 "register_operand" "=v") + (unspec:VEC_HW [(match_operand:VEC_HW 1 "register_operand" "v") + (match_operand:VEC_HW 2 "register_operand" "v")] + UNSPEC_VEC_MERGEH))] "TARGET_VX" "vmrh<bhfgq>\t%v0,%1,%2" [(set_attr "op_type" "VRR")]) ; vmrlb, vmrlh, vmrlf, vmrlg (define_insn "vec_mergel<mode>" - [(set (match_operand:V_HW 0 "register_operand" "=v") - (unspec:V_HW [(match_operand:V_HW 1 "register_operand" "v") - (match_operand:V_HW 2 "register_operand" "v")] + [(set (match_operand:VEC_HW 0 "register_operand" "=v") + (unspec:VEC_HW [(match_operand:VEC_HW 1 "register_operand" "v") + (match_operand:VEC_HW 2 "register_operand" "v")] UNSPEC_VEC_MERGEL))] "TARGET_VX" "vmrl<bhfgq>\t%v0,%1,%2" @@ -397,15 +418,15 @@ ; vscef, vsceg ; A 64 bit target address generated from 32 bit elements -(define_insn "vec_scatter_elementv4si_DI" - [(set (mem:SI +(define_insn "vec_scatter_element<V_HW_4:mode>_DI" + [(set (mem:<non_vec> (plus:DI (zero_extend:DI (unspec:SI [(match_operand:V4SI 1 "register_operand" "v") (match_operand:QI 3 "const_mask_operand" "C")] UNSPEC_VEC_EXTRACT)) (match_operand:SI 2 "address_operand" "ZQ"))) - (unspec:SI [(match_operand:V4SI 0 "register_operand" "v") - (match_dup 3)] UNSPEC_VEC_EXTRACT))] + (unspec:<non_vec> [(match_operand:V_HW_4 0 "register_operand" "v") + (match_dup 3)] UNSPEC_VEC_EXTRACT))] "TARGET_VX && TARGET_64BIT && UINTVAL (operands[3]) < 4" "vscef\t%v0,%O2(%v1,%R2),%3" [(set_attr "op_type" "VRV")]) @@ -515,6 +536,31 @@ "vstl\t%v0,%1,%2" [(set_attr "op_type" "VRS")]) +; Vector store rightmost with length + +(define_insn "vstrlrv16qi" + [(set (match_operand:BLK 2 "memory_operand" "=Q,Q") + (unspec:BLK [(match_operand:V16QI 0 "register_operand" "v,v") + (match_operand:SI 1 "nonmemory_operand" "d,C")] + UNSPEC_VEC_STORE_LEN_R))] + "TARGET_VXE" + "@ + vstrlr\t%v0,%2,%1 + vstrl\t%v0,%1,%2" + [(set_attr "op_type" "VRS,VSI")]) + + + +; vector bit permute + +(define_insn "vbpermv16qi" + [(set (match_operand:V2DI 0 "register_operand" "=v") + (unspec:V2DI [(match_operand:V16QI 1 "register_operand" "v") + (match_operand:V16QI 2 "register_operand" "v")] + UNSPEC_VEC_VBPERM))] + "TARGET_VXE" + "vbperm\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) ; Vector unpack high @@ -600,24 +646,6 @@ ; Vector and -; The following two patterns allow mixed mode and's as required for the intrinsics. -(define_insn "and_av2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (and:V2DF (subreg:V2DF (match_operand:V2DI 1 "register_operand" "v") 0) - (match_operand:V2DF 2 "register_operand" "v")))] - "TARGET_VX" - "vn\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - -(define_insn "and_cv2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (and:V2DF (match_operand:V2DF 1 "register_operand" "v") - (subreg:V2DF (match_operand:V2DI 2 "register_operand" "v") 0)))] - "TARGET_VX" - "vn\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - - ; Vector and with complement ; vnc @@ -629,24 +657,6 @@ "vnc\t%v0,%v1,%v2" [(set_attr "op_type" "VRR")]) -; The following two patterns allow mixed mode and's as required for the intrinsics. -(define_insn "vec_andc_av2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (and:V2DF (not:V2DF (match_operand:V2DF 2 "register_operand" "v")) - (subreg:V2DF (match_operand:V2DI 1 "register_operand" "v") 0)))] - - "TARGET_VX" - "vnc\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - -(define_insn "vec_andc_cv2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (and:V2DF (not:V2DF (subreg:V2DF (match_operand:V2DI 2 "register_operand" "v") 0)) - (match_operand:V2DF 1 "register_operand" "v")))] - "TARGET_VX" - "vnc\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - ; Vector average @@ -720,10 +730,10 @@ ; vec_all/any fp compares -(define_expand "vec_all_<fpcmpcc:code>v2df" - [(match_operand:SI 0 "register_operand" "") - (fpcmpcc (match_operand:V2DF 1 "register_operand" "") - (match_operand:V2DF 2 "register_operand" ""))] +(define_expand "vec_all_<fpcmpcc:code><mode>" + [(match_operand:SI 0 "register_operand" "") + (fpcmpcc (match_operand:VECF_HW 1 "register_operand" "") + (match_operand:VECF_HW 2 "register_operand" ""))] "TARGET_VX" { s390_expand_vec_compare_cc (operands[0], @@ -734,10 +744,10 @@ DONE; }) -(define_expand "vec_any_<fpcmpcc:code>v2df" - [(match_operand:SI 0 "register_operand" "") - (fpcmpcc (match_operand:V2DF 1 "register_operand" "") - (match_operand:V2DF 2 "register_operand" ""))] +(define_expand "vec_any_<fpcmpcc:code><mode>" + [(match_operand:SI 0 "register_operand" "") + (fpcmpcc (match_operand:VECF_HW 1 "register_operand" "") + (match_operand:VECF_HW 2 "register_operand" ""))] "TARGET_VX" { s390_expand_vec_compare_cc (operands[0], @@ -761,10 +771,10 @@ DONE; }) -(define_expand "vec_cmp<fpcmp:code>v2df" - [(set (match_operand:V2DI 0 "register_operand" "=v") - (fpcmp:V2DI (match_operand:V2DF 1 "register_operand" "v") - (match_operand:V2DF 2 "register_operand" "v")))] +(define_expand "vec_cmp<fpcmp:code><mode>" + [(set (match_operand:<tointvec> 0 "register_operand" "=v") + (fpcmp:<tointvec> (match_operand:VF_HW 1 "register_operand" "v") + (match_operand:VF_HW 2 "register_operand" "v")))] "TARGET_VX" { s390_expand_vec_compare (operands[0], <fpcmp:CODE>, operands[1], operands[2]); @@ -781,24 +791,6 @@ ; vec_xor -> xor -; The following two patterns allow mixed mode xor's as required for the intrinsics. -(define_insn "xor_av2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (xor:V2DF (subreg:V2DF (match_operand:V2DI 1 "register_operand" "v") 0) - (match_operand:V2DF 2 "register_operand" "v")))] - "TARGET_VX" - "vx\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - -(define_insn "xor_cv2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (xor:V2DF (match_operand:V2DF 1 "register_operand" "v") - (subreg:V2DF (match_operand:V2DI 2 "register_operand" "v") 0)))] - "TARGET_VX" - "vx\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - - ; Vector Galois field multiply sum ; vgfmb, vgfmh, vgfmf @@ -971,25 +963,9 @@ (define_insn "vec_nor<mode>3" [(set (match_operand:VT_HW 0 "register_operand" "=v") - (not:VT_HW (ior:VT_HW (match_operand:VT_HW 1 "register_operand" "%v") - (match_operand:VT_HW 2 "register_operand" "v"))))] - "TARGET_VX" - "vno\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - -; The following two patterns allow mixed mode and's as required for the intrinsics. -(define_insn "vec_nor_av2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (not:V2DF (ior:V2DF (subreg:V2DF (match_operand:V2DI 1 "register_operand" "v") 0) - (match_operand:V2DF 2 "register_operand" "v"))))] - "TARGET_VX" - "vno\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - -(define_insn "vec_nor_cv2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (not:V2DF (ior:V2DF (match_operand:V2DF 1 "register_operand" "v") - (subreg:V2DF (match_operand:V2DI 2 "register_operand" "v") 0))))] + (not:VT_HW + (ior:VT_HW (match_operand:VT_HW 1 "register_operand" "%v") + (match_operand:VT_HW 2 "register_operand" "v"))))] "TARGET_VX" "vno\t%v0,%v1,%v2" [(set_attr "op_type" "VRR")]) @@ -997,24 +973,6 @@ ; Vector or -; The following two patterns allow mixed mode or's as required for the intrinsics. -(define_insn "ior_av2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (ior:V2DF (subreg:V2DF (match_operand:V2DI 1 "register_operand" "v") 0) - (match_operand:V2DF 2 "register_operand" "v")))] - "TARGET_VX" - "vo\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - -(define_insn "ior_cv2df3" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (ior:V2DF (match_operand:V2DF 1 "register_operand" "v") - (subreg:V2DF (match_operand:V2DI 2 "register_operand" "v") 0)))] - "TARGET_VX" - "vo\t%v0,%v1,%v2" - [(set_attr "op_type" "VRR")]) - - ; Vector population count vec_popcnt -> popcount ; Vector element rotate left logical vec_rl -> vrotl, vec_rli -> rot @@ -1219,6 +1177,31 @@ [(set_attr "op_type" "VRR")]) +; Vector multiply sum logical + +(define_insn "vec_msumv2di" + [(set (match_operand:V16QI 0 "register_operand" "=v") + (unspec:V16QI [(match_operand:V2DI 1 "register_operand" "v") + (match_operand:V2DI 2 "register_operand" "v") + (match_operand:V16QI 3 "register_operand" "v") + (match_operand:QI 4 "const_mask_operand" "C")] + UNSPEC_VEC_MSUM))] + "TARGET_VXE" + "vmslg\t%v0,%v1,%v2,%v3" + [(set_attr "op_type" "VRR")]) + +(define_insn "vmslg" + [(set (match_operand:TI 0 "register_operand" "=v") + (unspec:TI [(match_operand:V2DI 1 "register_operand" "v") + (match_operand:V2DI 2 "register_operand" "v") + (match_operand:TI 3 "register_operand" "v") + (match_operand:QI 4 "const_mask_operand" "C")] + UNSPEC_VEC_MSUM))] + "TARGET_VXE" + "vmslg\t%v0,%v1,%v2,%v3" + [(set_attr "op_type" "VRR")]) + + ; Vector find any element equal ; vfaeb, vfaeh, vfaef @@ -1609,22 +1592,23 @@ operands[4] = GEN_INT (INTVAL (operands[4]) | VSTRING_FLAG_CS | VSTRING_FLAG_ZS); }) - -; Signed V2DI -> V2DF conversion - inexact exception disabled -(define_insn "vec_di_to_df_s64" +(define_insn "vcdgb" [(set (match_operand:V2DF 0 "register_operand" "=v") (unspec:V2DF [(match_operand:V2DI 1 "register_operand" "v") - (match_operand:QI 2 "const_mask_operand" "C")] + (match_operand:QI 2 "const_mask_operand" "C") ; inexact suppression + (match_operand:QI 3 "const_mask_operand" "C")] ; rounding mode UNSPEC_VEC_VCDGB))] - "TARGET_VX && UINTVAL (operands[2]) != 2 && UINTVAL (operands[2]) <= 7" - "vcdgb\t%v0,%v1,4,%b2" + "TARGET_VX && UINTVAL (operands[3]) != 2 && UINTVAL (operands[3]) <= 7" + "vcdgb\t%v0,%v1,%b2,%b3" [(set_attr "op_type" "VRR")]) + ; The result needs to be multiplied with 2**-op2 (define_expand "vec_ctd_s64" [(set (match_operand:V2DF 0 "register_operand" "") (unspec:V2DF [(match_operand:V2DI 1 "register_operand" "") - (const_int 0)] ; According to current BFP rounding mode + (const_int 4) ; inexact suppressed + (const_int VEC_RND_CURRENT)] UNSPEC_VEC_VCDGB)) (use (match_operand:QI 2 "const_int_operand" "")) (set (match_dup 0) (mult:V2DF (match_dup 0) (match_dup 3)))] @@ -1640,21 +1624,22 @@ operands[3] = force_reg (V2DFmode, operands[3]); }) -; Unsigned V2DI -> V2DF conversion - inexact exception disabled -(define_insn "vec_di_to_df_u64" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (unspec:V2DF [(match_operand:V2DI 1 "register_operand" "v") - (match_operand:QI 2 "const_int_operand" "C")] +(define_insn "vcdlgb" + [(set (match_operand:V2DF 0 "register_operand" "=v") + (unspec:V2DF [(match_operand:V2DI 1 "register_operand" "v") + (match_operand:QI 2 "const_mask_operand" "C") ; inexact suppression + (match_operand:QI 3 "const_mask_operand" "C")] ; rounding mode UNSPEC_VEC_VCDLGB))] - "TARGET_VX" - "vcdlgb\t%v0,%v1,4,%b2" + "TARGET_VX && UINTVAL (operands[3]) != 2 && UINTVAL (operands[3]) <= 7" + "vcdlgb\t%v0,%v1,%b2,%b3" [(set_attr "op_type" "VRR")]) ; The result needs to be multiplied with 2**-op2 (define_expand "vec_ctd_u64" [(set (match_operand:V2DF 0 "register_operand" "") (unspec:V2DF [(match_operand:V2DI 1 "register_operand" "") - (const_int 0)] ; According to current BFP rounding mode + (const_int 4) ; inexact suppressed + (const_int VEC_RND_CURRENT)] UNSPEC_VEC_VCDLGB)) (use (match_operand:QI 2 "const_int_operand" "")) (set (match_dup 0) (mult:V2DF (match_dup 0) (match_dup 3)))] @@ -1670,15 +1655,14 @@ operands[3] = force_reg (V2DFmode, operands[3]); }) - -; Signed V2DF -> V2DI conversion - inexact exception disabled -(define_insn "vec_df_to_di_s64" - [(set (match_operand:V2DI 0 "register_operand" "=v") - (unspec:V2DI [(match_operand:V2DF 1 "register_operand" "v") - (match_operand:QI 2 "const_int_operand" "C")] +(define_insn "vcgdb" + [(set (match_operand:V2DI 0 "register_operand" "=v") + (unspec:V2DI [(match_operand:V2DF 1 "register_operand" "v") + (match_operand:QI 2 "const_mask_operand" "C") + (match_operand:QI 3 "const_mask_operand" "C")] UNSPEC_VEC_VCGDB))] - "TARGET_VX" - "vcgdb\t%v0,%v1,4,%b2" + "TARGET_VX && UINTVAL (operands[3]) != 2 && UINTVAL (operands[3]) <= 7" + "vcgdb\t%v0,%v1,%b2,%b3" [(set_attr "op_type" "VRR")]) ; The input needs to be multiplied with 2**op2 @@ -1687,7 +1671,9 @@ (set (match_dup 4) (mult:V2DF (match_operand:V2DF 1 "register_operand" "") (match_dup 3))) (set (match_operand:V2DI 0 "register_operand" "") - (unspec:V2DI [(match_dup 4) (const_int 0)] ; According to current BFP rounding mode + (unspec:V2DI [(match_dup 4) + (const_int 4) ; inexact suppressed + (const_int VEC_RND_CURRENT)] UNSPEC_VEC_VCGDB))] "TARGET_VX" { @@ -1702,14 +1688,14 @@ operands[4] = gen_reg_rtx (V2DFmode); }) -; Unsigned V2DF -> V2DI conversion - inexact exception disabled -(define_insn "vec_df_to_di_u64" +(define_insn "vclgdb" [(set (match_operand:V2DI 0 "register_operand" "=v") (unspec:V2DI [(match_operand:V2DF 1 "register_operand" "v") - (match_operand:QI 2 "const_mask_operand" "C")] + (match_operand:QI 2 "const_mask_operand" "C") + (match_operand:QI 3 "const_mask_operand" "C")] UNSPEC_VEC_VCLGDB))] - "TARGET_VX && UINTVAL (operands[2]) <= 7" - "vclgdb\t%v0,%v1,4,%b2" + "TARGET_VX && UINTVAL (operands[3]) != 2 && UINTVAL (operands[3]) <= 7" + "vclgdb\t%v0,%v1,%b2,%b3" [(set_attr "op_type" "VRR")]) ; The input needs to be multiplied with 2**op2 @@ -1718,7 +1704,9 @@ (set (match_dup 4) (mult:V2DF (match_operand:V2DF 1 "register_operand" "") (match_dup 3))) (set (match_operand:V2DI 0 "register_operand" "") - (unspec:V2DI [(match_dup 4) (const_int 0)] ; According to current BFP rounding mode + (unspec:V2DI [(match_dup 4) + (const_int 4) ; inexact suppressed + (const_int VEC_RND_CURRENT)] UNSPEC_VEC_VCLGDB))] "TARGET_VX" { @@ -1734,23 +1722,24 @@ }) ; Vector load fp integer - IEEE inexact exception is suppressed -(define_insn "vfidb" - [(set (match_operand:V2DI 0 "register_operand" "=v") - (unspec:V2DI [(match_operand:V2DF 1 "register_operand" "v") - (match_operand:QI 2 "const_mask_operand" "C") - (match_operand:QI 3 "const_mask_operand" "C")] - UNSPEC_VEC_VFIDB))] - "TARGET_VX && !(UINTVAL (operands[2]) & 3) && UINTVAL (operands[3]) <= 7" - "vfidb\t%v0,%v1,%b2,%b3" +; vfisb, vfidb, wfisb, wfidb, wfixb +(define_insn "vec_fpint<mode>" + [(set (match_operand:VFT 0 "register_operand" "=v") + (unspec:VFT [(match_operand:VFT 1 "register_operand" "v") + (match_operand:QI 2 "const_mask_operand" "C") ; inexact suppression control + (match_operand:QI 3 "const_mask_operand" "C")] ; rounding mode + UNSPEC_VEC_VFI))] + "TARGET_VX" + "<vw>fi<sdx>b\t%v0,%v1,%b2,%b3" [(set_attr "op_type" "VRR")]) ; Vector load lengthened - V4SF -> V2DF -(define_insn "*vldeb" +(define_insn "vflls" [(set (match_operand:V2DF 0 "register_operand" "=v") (unspec:V2DF [(match_operand:V4SF 1 "register_operand" "v")] - UNSPEC_VEC_VLDEB))] + UNSPEC_VEC_VFLL))] "TARGET_VX" "vldeb\t%v0,%v1" [(set_attr "op_type" "VRR")]) @@ -1769,7 +1758,7 @@ (match_dup 2)] UNSPEC_VEC_SET)) (set (match_operand:V2DF 0 "register_operand" "") - (unspec:V2DF [(match_dup 2)] UNSPEC_VEC_VLDEB))] + (unspec:V2DF [(match_dup 2)] UNSPEC_VEC_VFLL))] "TARGET_VX" { operands[2] = gen_reg_rtx (V4SFmode); @@ -1780,18 +1769,22 @@ ; Vector load rounded - V2DF -> V4SF -(define_insn "*vledb" - [(set (match_operand:V4SF 0 "register_operand" "=v") - (unspec:V4SF [(match_operand:V2DF 1 "register_operand" "v")] - UNSPEC_VEC_VLEDB))] +(define_insn "vflrd" + [(set (match_operand:V4SF 0 "register_operand" "=v") + (unspec:V4SF [(match_operand:V2DF 1 "register_operand" "v") + (match_operand:QI 2 "const_mask_operand" "C") + (match_operand:QI 3 "const_mask_operand" "C")] + UNSPEC_VEC_VFLR))] "TARGET_VX" - "vledb\t%v0,%v1,0,0" + "vledb\t%v0,%v1,%b2,%b3" [(set_attr "op_type" "VRR")]) (define_expand "vec_st2f" [(set (match_dup 2) - (unspec:V4SF [(match_operand:V2DF 0 "register_operand" "")] - UNSPEC_VEC_VLEDB)) + (unspec:V4SF [(match_operand:V2DF 0 "register_operand" "") + (const_int VEC_INEXACT) + (const_int VEC_RND_CURRENT)] + UNSPEC_VEC_VFLR)) (set (match_operand:SF 1 "memory_operand" "") (unspec:SF [(match_dup 2) (const_int 0)] UNSPEC_VEC_EXTRACT)) (set (match_dup 3) @@ -1803,46 +1796,59 @@ }) -; Vector load negated fp - -(define_expand "vec_nabs" - [(set (match_operand:V2DF 0 "register_operand" "") - (neg:V2DF (abs:V2DF (match_operand:V2DF 1 "register_operand" ""))))] - "TARGET_VX") - ; Vector square root fp vec_sqrt -> sqrt rtx standard name -; Vector FP test data class immediate +;; Vector FP test data class immediate -(define_insn "*vftcidb" - [(set (match_operand:V2DF 0 "register_operand" "=v") - (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "v") - (match_operand:HI 2 "const_int_operand" "J")] - UNSPEC_VEC_VFTCIDB)) - (set (reg:CCRAW CC_REGNUM) - (unspec:CCRAW [(match_dup 1) (match_dup 2)] UNSPEC_VEC_VFTCIDBCC))] +; vec_all_nan, vec_all_numeric, vec_any_nan, vec_any_numeric +; These ignore the vector result and only want CC stored to an int +; pointer. + +; vftcisb, vftcidb +(define_insn "*vftci<mode>_cconly" + [(set (reg:CCRAW CC_REGNUM) + (unspec:CCRAW [(match_operand:VECF_HW 1 "register_operand") + (match_operand:HI 2 "const_int_operand")] + UNSPEC_VEC_VFTCICC)) + (clobber (match_scratch:<tointvec> 0))] "TARGET_VX && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'J', \"J\")" - "vftcidb\t%v0,%v1,%x2" + "vftci<sdx>b\t%v0,%v1,%x2" [(set_attr "op_type" "VRR")]) -(define_insn "*vftcidb_cconly" - [(set (reg:CCRAW CC_REGNUM) - (unspec:CCRAW [(match_operand:V2DF 1 "register_operand" "v") - (match_operand:HI 2 "const_int_operand" "J")] - UNSPEC_VEC_VFTCIDBCC)) - (clobber (match_scratch:V2DI 0 "=v"))] +(define_expand "vftci<mode>_intcconly" + [(parallel + [(set (reg:CCRAW CC_REGNUM) + (unspec:CCRAW [(match_operand:VECF_HW 0 "register_operand") + (match_operand:HI 1 "const_int_operand")] + UNSPEC_VEC_VFTCICC)) + (clobber (scratch:<tointvec>))]) + (set (match_operand:SI 2 "register_operand" "") + (unspec:SI [(reg:CCRAW CC_REGNUM)] UNSPEC_CC_TO_INT))] + "TARGET_VX && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[1]), 'J', \"J\")") + +; vec_fp_test_data_class wants the result vector and the CC stored to +; an int pointer. + +; vftcisb, vftcidb +(define_insn "*vftci<mode>" + [(set (match_operand:VECF_HW 0 "register_operand" "=v") + (unspec:VECF_HW [(match_operand:VECF_HW 1 "register_operand" "v") + (match_operand:HI 2 "const_int_operand" "J")] + UNSPEC_VEC_VFTCI)) + (set (reg:CCRAW CC_REGNUM) + (unspec:CCRAW [(match_dup 1) (match_dup 2)] UNSPEC_VEC_VFTCICC))] "TARGET_VX && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'J', \"J\")" - "vftcidb\t%v0,%v1,%x2" + "vftci<sdx>b\t%v0,%v1,%x2" [(set_attr "op_type" "VRR")]) -(define_expand "vftcidb" +(define_expand "vftci<mode>_intcc" [(parallel - [(set (match_operand:V2DF 0 "register_operand" "") - (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "") - (match_operand:HI 2 "const_int_operand" "")] - UNSPEC_VEC_VFTCIDB)) + [(set (match_operand:VECF_HW 0 "register_operand") + (unspec:VECF_HW [(match_operand:VECF_HW 1 "register_operand") + (match_operand:HI 2 "const_int_operand")] + UNSPEC_VEC_VFTCI)) (set (reg:CCRAW CC_REGNUM) - (unspec:CCRAW [(match_dup 1) (match_dup 2)] UNSPEC_VEC_VFTCIDBCC))]) + (unspec:CCRAW [(match_dup 1) (match_dup 2)] UNSPEC_VEC_VFTCICC))]) (set (match_operand:SI 3 "memory_operand" "") (unspec:SI [(reg:CCRAW CC_REGNUM)] UNSPEC_CC_TO_INT))] "TARGET_VX && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operands[2]), 'J', \"J\")") @@ -1933,79 +1939,123 @@ [(set_attr "op_type" "VRR")]) ;; -;; Floating point comparesg +;; Floating point compares ;; -(define_insn "*vec_cmp<insn_cmp>v2df_cconly" +; vfcesbs, vfcedbs, wfcexbs, vfchsbs, vfchdbs, wfchxbs, vfchesbs, vfchedbs, wfchexbs +(define_insn "*vec_cmp<insn_cmp><mode>_cconly" [(set (reg:VFCMP CC_REGNUM) - (compare:VFCMP (match_operand:V2DF 0 "register_operand" "v") - (match_operand:V2DF 1 "register_operand" "v"))) - (clobber (match_scratch:V2DI 2 "=v"))] + (compare:VFCMP (match_operand:VF_HW 0 "register_operand" "v") + (match_operand:VF_HW 1 "register_operand" "v"))) + (clobber (match_scratch:<tointvec> 2 "=v"))] "TARGET_VX" - "vfc<asm_fcmp>dbs\t%v2,%v0,%v1" + "<vw>fc<asm_fcmp><sdx>bs\t%v2,%v0,%v1" [(set_attr "op_type" "VRR")]) ; FIXME: Merge the following 2x3 patterns with VFCMP -(define_expand "vec_cmpeqv2df_cc" +(define_expand "vec_cmpeq<mode>_cc" [(parallel [(set (reg:CCVEQ CC_REGNUM) - (compare:CCVEQ (match_operand:V2DF 1 "register_operand" "v") - (match_operand:V2DF 2 "register_operand" "v"))) - (set (match_operand:V2DI 0 "register_operand" "=v") - (eq:V2DI (match_dup 1) (match_dup 2)))]) + (compare:CCVEQ (match_operand:VF_HW 1 "register_operand" "v") + (match_operand:VF_HW 2 "register_operand" "v"))) + (set (match_operand:<tointvec> 0 "register_operand" "=v") + (eq:<tointvec> (match_dup 1) (match_dup 2)))]) (set (match_operand:SI 3 "memory_operand" "") (unspec:SI [(reg:CCVEQ CC_REGNUM)] UNSPEC_CC_TO_INT))] "TARGET_VX") -(define_expand "vec_cmphv2df_cc" +(define_expand "vec_cmph<mode>_cc" [(parallel - [(set (reg:CCVIH CC_REGNUM) - (compare:CCVIH (match_operand:V2DF 1 "register_operand" "v") - (match_operand:V2DF 2 "register_operand" "v"))) - (set (match_operand:V2DI 0 "register_operand" "=v") - (gt:V2DI (match_dup 1) (match_dup 2)))]) + [(set (reg:CCVFH CC_REGNUM) + (compare:CCVFH (match_operand:VF_HW 1 "register_operand" "v") + (match_operand:VF_HW 2 "register_operand" "v"))) + (set (match_operand:<tointvec> 0 "register_operand" "=v") + (gt:<tointvec> (match_dup 1) (match_dup 2)))]) (set (match_operand:SI 3 "memory_operand" "") (unspec:SI [(reg:CCVIH CC_REGNUM)] UNSPEC_CC_TO_INT))] "TARGET_VX") -(define_expand "vec_cmphev2df_cc" +(define_expand "vec_cmphe<mode>_cc" [(parallel [(set (reg:CCVFHE CC_REGNUM) - (compare:CCVFHE (match_operand:V2DF 1 "register_operand" "v") - (match_operand:V2DF 2 "register_operand" "v"))) - (set (match_operand:V2DI 0 "register_operand" "=v") - (ge:V2DI (match_dup 1) (match_dup 2)))]) + (compare:CCVFHE (match_operand:VF_HW 1 "register_operand" "v") + (match_operand:VF_HW 2 "register_operand" "v"))) + (set (match_operand:<tointvec> 0 "register_operand" "=v") + (ge:<tointvec> (match_dup 1) (match_dup 2)))]) (set (match_operand:SI 3 "memory_operand" "") (unspec:SI [(reg:CCVFHE CC_REGNUM)] UNSPEC_CC_TO_INT))] "TARGET_VX") +; These 3 cannot be merged as the insn defintion above since it also +; requires to rewrite the RTL equality operator that the same time as +; the CC mode. -(define_insn "*vec_cmpeqv2df_cc" +; vfcesbs, vfcedbs, wfcexbs +(define_insn "*vec_cmpeq<mode>_cc" [(set (reg:CCVEQ CC_REGNUM) - (compare:CCVEQ (match_operand:V2DF 0 "register_operand" "v") - (match_operand:V2DF 1 "register_operand" "v"))) - (set (match_operand:V2DI 2 "register_operand" "=v") - (eq:V2DI (match_dup 0) (match_dup 1)))] + (compare:CCVEQ (match_operand:VF_HW 0 "register_operand" "v") + (match_operand:VF_HW 1 "register_operand" "v"))) + (set (match_operand:<tointvec> 2 "register_operand" "=v") + (eq:<tointvec> (match_dup 0) (match_dup 1)))] "TARGET_VX" - "vfcedbs\t%v2,%v0,%v1" + "<vw>fce<sdx>bs\t%v2,%v0,%v1" [(set_attr "op_type" "VRR")]) -(define_insn "*vec_cmphv2df_cc" - [(set (reg:CCVIH CC_REGNUM) - (compare:CCVIH (match_operand:V2DF 0 "register_operand" "v") - (match_operand:V2DF 1 "register_operand" "v"))) - (set (match_operand:V2DI 2 "register_operand" "=v") - (gt:V2DI (match_dup 0) (match_dup 1)))] +; vfchsbs, vfchdbs, wfchxbs +(define_insn "*vec_cmph<mode>_cc" + [(set (reg:CCVFH CC_REGNUM) + (compare:CCVFH (match_operand:VF_HW 0 "register_operand" "v") + (match_operand:VF_HW 1 "register_operand" "v"))) + (set (match_operand:<tointvec> 2 "register_operand" "=v") + (gt:<tointvec> (match_dup 0) (match_dup 1)))] "TARGET_VX" - "vfchdbs\t%v2,%v0,%v1" + "<vw>fch<sdx>bs\t%v2,%v0,%v1" [(set_attr "op_type" "VRR")]) -(define_insn "*vec_cmphev2df_cc" +; vfchesbs, vfchedbs, wfchexbs +(define_insn "*vec_cmphe<mode>_cc" [(set (reg:CCVFHE CC_REGNUM) - (compare:CCVFHE (match_operand:V2DF 0 "register_operand" "v") - (match_operand:V2DF 1 "register_operand" "v"))) - (set (match_operand:V2DI 2 "register_operand" "=v") - (ge:V2DI (match_dup 0) (match_dup 1)))] + (compare:CCVFHE (match_operand:VF_HW 0 "register_operand" "v") + (match_operand:VF_HW 1 "register_operand" "v"))) + (set (match_operand:<tointvec> 2 "register_operand" "=v") + (ge:<tointvec> (match_dup 0) (match_dup 1)))] "TARGET_VX" - "vfchedbs\t%v2,%v0,%v1" + "<vw>fche<sdx>bs\t%v2,%v0,%v1" + [(set_attr "op_type" "VRR")]) + +(define_expand "vec_double_s64" + [(set (match_operand:V2DF 0 "register_operand") + (unspec:V2DF [(match_operand:V2DI 1 "register_operand") + (const_int 0) ; inexact suppression disabled + (const_int VEC_RND_CURRENT)] + UNSPEC_VEC_VCDGB))] + "TARGET_VX") + +(define_expand "vec_double_u64" + [(set (match_operand:V2DF 0 "register_operand") + (unspec:V2DF [(match_operand:V2DI 1 "register_operand") + (const_int 0) ; inexact suppression disabled + (const_int VEC_RND_CURRENT)] + UNSPEC_VEC_VCDLGB))] + "TARGET_VX") + + +(define_insn "vfmin<mode>" + [(set (match_operand:VF_HW 0 "register_operand" "=v") + (unspec:VF_HW [(match_operand:VF_HW 1 "register_operand" "%v") + (match_operand:VF_HW 2 "register_operand" "v") + (match_operand:QI 3 "const_mask_operand" "C")] + UNSPEC_VEC_VFMIN))] + "TARGET_VXE" + "<vw>fmin<sdx>b\t%v0,%v1,%v2,%b3" + [(set_attr "op_type" "VRR")]) + +(define_insn "vfmax<mode>" + [(set (match_operand:VF_HW 0 "register_operand" "=v") + (unspec:VF_HW [(match_operand:VF_HW 1 "register_operand" "%v") + (match_operand:VF_HW 2 "register_operand" "v") + (match_operand:QI 3 "const_mask_operand" "C")] + UNSPEC_VEC_VFMAX))] + "TARGET_VXE" + "<vw>fmax<sdx>b\t%v0,%v1,%v2,%b3" [(set_attr "op_type" "VRR")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index bd0a9b01db3..886a0f04caf 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,12 @@ 2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + * gcc.target/s390/target-attribute/tattr-3.c: Adjust error message + and remove the high-level builtin. The error message for the + would prevent compilation from reaching the second. + * gcc.target/s390/target-attribute/tattr-4.c: Likewise. + +2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + * gcc.target/s390/vxe/negfma-1.c: New test. 2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com> diff --git a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-3.c b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-3.c index 95916288204..1af2274120d 100644 --- a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-3.c +++ b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-3.c @@ -16,8 +16,7 @@ void vx1(void) __attribute__ ((target("arch=z10"))) void vx0(void) { - vec_load_bndry ((const signed char *)0, 64); /* { dg-error "is not supported without -mvx" } */ - __builtin_s390_vll ((unsigned int)0, (const void *)8); /* { dg-error "is not supported without -mvx" } */ + __builtin_s390_vll ((unsigned int)0, (const void *)8); /* { dg-error "requires -mvx" } */ } void vxd(void) diff --git a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-4.c b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-4.c index f0a4eff68eb..c501eca2ca6 100644 --- a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-4.c +++ b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-4.c @@ -24,8 +24,7 @@ void a0(void) #ifdef __VEC__ #error __VEC__ is defined #endif - vec_load_bndry ((const signed char *)0, 64); /* { dg-error "is not supported without -mvx" } */ - __builtin_s390_vll ((unsigned int)0, (const void *)8); /* { dg-error "is not supported without -mvx" } */ + __builtin_s390_vll ((unsigned int)0, (const void *)8); /* { dg-error "requires -mvx" } */ } void d(void) @@ -33,6 +32,5 @@ void d(void) #ifdef __VEC__ #error __VEC__ is defined #endif - vec_load_bndry ((const signed char *)0, 64); /* { dg-error "is not supported without -mvx" } */ - __builtin_s390_vll ((unsigned int)0, (const void *)8); /* { dg-error "is not supported without -mvx" } */ + __builtin_s390_vll ((unsigned int)0, (const void *)8); /* { dg-error "requires -mvx" } */ } |