diff options
author | kyukhin <kyukhin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-12-08 08:05:33 +0000 |
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committer | kyukhin <kyukhin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-12-08 08:05:33 +0000 |
commit | ce075df5032df8bd58393372da9298bc32cb6e65 (patch) | |
tree | 699c470185b0b40bbfdeabb957c8b3dbe55d724a | |
parent | f3d6df8ca85e3f2f1173f77e9658adb607118010 (diff) | |
download | gcc-ce075df5032df8bd58393372da9298bc32cb6e65.tar.gz |
Enable VNNI support [4/5]
gcc/
* config/i386/avx512vnniintrin.h (_mm512_dpwssd_epi32,
_mm512_mask_dpwssd_epi32, _mm512_maskz_dpwssd_epi32): New intrinsics.
* config/i386/avx512vnnivlintrin.h (_mm256_dpwssd_epi32,
_mm256_mask_dpwssd_epi32, _mm256_maskz_dpwssd_epi32, _mm_dpwssd_epi32,
_mm_mask_dpwssd_epi32, _mm_maskz_dpwssd_epi32): Ditto.
gcc/testsuite/
* gcc.target/i386/avx512f-vnni-1.c: Add vdpwssd checks.
* gcc.target/i386/avx512vl-vnni-1.c: Ditto.
* gcc.target/i386/avx512f-vpdpwssd-2.c: New.
* gcc.target/i386/avx512vl-vpdpwssd-2.c: Ditto.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@255496 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 23 | ||||
-rw-r--r-- | gcc/config/i386/avx512vnniintrin.h | 25 | ||||
-rw-r--r-- | gcc/config/i386/avx512vnnivlintrin.h | 48 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 16 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c | 7 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512f-vpdpwssd-2.c | 69 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c | 14 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssd-2.c | 16 |
8 files changed, 204 insertions, 14 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3de4b428ae9..1d20dc5234c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,14 +1,19 @@ 2017-12-08 Julia Koval <julia.koval@intel.com> - * config.gcc: Add vaesintrin.h. - * config/i386/i386-builtin-types.def (V64QI_FTYPE_V64QI_V64QI): New type. - * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi, - __builtin_ia32_vaesdec_v32qi, __builtin_ia32_vaesdec_v64qi): New builtins. - * config/i386/i386.c (ix86_expand_args_builtin): Handle new type. - * config/i386/immintrin.h: Include vaesintrin.h. - * config/i386/sse.md (vaesdec_<mode>): New pattern. - * config/i386/vaesintrin.h (_mm256_aesdec_epi128, _mm512_aesdec_epi128, - _mm_aesdec_epi128): New intrinsics. + * config/i386/avx512vnniintrin.h (_mm512_dpwssd_epi32, + _mm512_mask_dpwssd_epi32, _mm512_maskz_dpwssd_epi32): New intrinsics. + * config/i386/avx512vnnivlintrin.h (_mm256_dpwssd_epi32, + _mm256_mask_dpwssd_epi32, _mm256_maskz_dpwssd_epi32, _mm_dpwssd_epi32, + _mm_mask_dpwssd_epi32, _mm_maskz_dpwssd_epi32): Ditto. + +2017-12-08 Julia Koval <julia.koval@intel.com> + + * config/i386/avx512vnniintrin.h (_mm512_dpbusds_epi32, + _mm512_mask_dpbusds_epi32, _mm512_maskz_dpbusds_epi32): New. + * config/i386/avx512vnnivlintrin.h (_mm256_dpbusds_epi32, + _mm256_mask_dpbusds_epi32, _mm256_maskz_dpbusds_epi32, + _mm_dpbusds_epi32, _mm_mask_dpbusds_epi32, + _mm_maskz_dpbusds_epi32): New intrinsics. 2017-12-07 Sandra Loosemore <sandra@codesourcery.com> diff --git a/gcc/config/i386/avx512vnniintrin.h b/gcc/config/i386/avx512vnniintrin.h index c9842f3833f..c435dc14a85 100644 --- a/gcc/config/i386/avx512vnniintrin.h +++ b/gcc/config/i386/avx512vnniintrin.h @@ -85,6 +85,31 @@ _mm512_maskz_dpbusds_epi32 (__mmask16 __A, __m512i __B, __m512i __C, (__v16si) __C, (__v16si) __D, (__mmask16)__A); } +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_dpwssd_epi32 (__m512i __A, __m512i __B, __m512i __C) +{ + return (__m512i) __builtin_ia32_vpdpwssd_v16si ((__v16si)__A, (__v16si) __B, + (__v16si) __C); +} + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_dpwssd_epi32 (__m512i __A, __mmask16 __B, __m512i __C, __m512i __D) +{ + return (__m512i)__builtin_ia32_vpdpwssd_v16si_mask ((__v16si)__A, + (__v16si) __C, (__v16si) __D, (__mmask16)__B); +} + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_maskz_dpwssd_epi32 (__mmask16 __A, __m512i __B, __m512i __C, + __m512i __D) +{ + return (__m512i)__builtin_ia32_vpdpwssd_v16si_maskz ((__v16si)__B, + (__v16si) __C, (__v16si) __D, (__mmask16)__A); +} + #ifdef __DISABLE_AVX512VNNI__ #undef __DISABLE_AVX512VNNI__ #pragma GCC pop_options diff --git a/gcc/config/i386/avx512vnnivlintrin.h b/gcc/config/i386/avx512vnnivlintrin.h index 621f0aceb71..d87feaa3815 100644 --- a/gcc/config/i386/avx512vnnivlintrin.h +++ b/gcc/config/i386/avx512vnnivlintrin.h @@ -131,6 +131,54 @@ _mm_maskz_dpbusds_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D) (__v4si) __C, (__v4si) __D, (__mmask8)__A); } +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_dpwssd_epi32 (__m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i) __builtin_ia32_vpdpwssd_v8si ((__v8si)__A, (__v8si) __B, + (__v8si) __C); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_dpwssd_epi32 (__m256i __A, __mmask8 __B, __m256i __C, __m256i __D) +{ + return (__m256i)__builtin_ia32_vpdpwssd_v8si_mask ((__v8si)__A, (__v8si) __C, + (__v8si) __D, (__mmask8)__B); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_maskz_dpwssd_epi32 (__mmask8 __A, __m256i __B, __m256i __C, __m256i __D) +{ + return (__m256i)__builtin_ia32_vpdpwssd_v8si_maskz ((__v8si)__B, + (__v8si) __C, (__v8si) __D, (__mmask8)__A); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_dpwssd_epi32 (__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i) __builtin_ia32_vpdpwssd_v4si ((__v4si)__A, (__v4si) __B, + (__v4si) __C); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_dpwssd_epi32 (__m128i __A, __mmask8 __B, __m128i __C, __m128i __D) +{ + return (__m128i)__builtin_ia32_vpdpwssd_v4si_mask ((__v4si)__A, (__v4si) __C, + (__v4si) __D, (__mmask8)__B); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_maskz_dpwssd_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D) +{ + return (__m128i)__builtin_ia32_vpdpwssd_v4si_maskz ((__v4si)__B, + (__v4si) __C, (__v4si) __D, (__mmask8)__A); +} + #ifdef __DISABLE_AVX512VNNIVL__ #undef __DISABLE_AVX512VNNIVL__ #pragma GCC pop_options diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3020f51df66..b13130d4454 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,10 +1,16 @@ 2017-12-08 Julia Koval <julia.koval@intel.com> - * gcc.target/i386/avx512-check.h: Handle bit_VAES. - * gcc.target/i386/avx512f-aesdec-2.c: New test. - * gcc.target/i386/avx512fvl-vaes-1.c: Ditto. - * gcc.target/i386/avx512vl-aesdec-2.c: Ditto. - * gcc.target/i386/i386.exp (check_effective_target_avx512vaes): New. + * gcc.target/i386/avx512f-vnni-1.c: Add vdpwssd checks. + * gcc.target/i386/avx512vl-vnni-1.c: Ditto. + * gcc.target/i386/avx512f-vpdpwssd-2.c: New. + * gcc.target/i386/avx512vl-vpdpwssd-2.c: Ditto. + +2017-12-08 Julia Koval <julia.koval@intel.com> + + * gcc.target/i386/avx512f-vnni-1.c: Add vpdpbusds check. + * gcc.target/i386/avx512vl-vnni-1.c: Ditto. + * gcc.target/i386/avx512f-vpdpbusds-2.c: New. + * gcc.target/i386/avx512vl-vpdpbusds-2.c: Ditto. 2017-12-07 Sandra Loosemore <sandra@codesourcery.com> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c index b4b6d83d3a9..d6c319b8007 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c @@ -6,6 +6,9 @@ /* { dg-final { scan-assembler-times "vpdpbusds\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbusds\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbusds\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> @@ -25,4 +28,8 @@ avx512f_test (void) x = _mm512_mask_dpbusds_epi32 (x, m16, y, z); x = _mm512_maskz_dpbusds_epi32 (m16, x, y, z); + x = _mm512_dpwssd_epi32 (x, y, z); + x = _mm512_mask_dpwssd_epi32 (x, m16, y, z); + x = _mm512_maskz_dpwssd_epi32 (m16, x, y, z); + } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpdpwssd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpdpwssd-2.c new file mode 100644 index 00000000000..d8488e8251f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpdpwssd-2.c @@ -0,0 +1,69 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f -mavx512vnni" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-require-effective-target avx512vnni } */ + +#define AVX512F + +#define AVX512VNNI +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#define SIZE_RES (AVX512F_LEN / 32) + +#include "avx512f-mask-type.h" + +static void +CALC (int *r, int *dst, short *s1, short *s2) +{ + short tempres[SIZE]; + for (int i = 0; i < SIZE; i++) { + tempres[i] = ((int)(s1[i]) * (int)(s2[i])); + } + for (int i = 0; i < SIZE_RES; i++) { + long long test = (long long)dst[i] + tempres[i*2] + tempres[i*2 + 1]; + r[i] = test; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE mask = MASK_VALUE; + int res_ref[SIZE_RES]; + int res_ref2[SIZE_RES]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 1 + i; + src2.a[i] = 2 + 2*i; + } + + for (i = 0; i < SIZE_RES; i++) + { + res1.a[i] = 0x7fffffff; + res2.a[i] = DEFAULT_VALUE; + res3.a[i] = DEFAULT_VALUE; + } + + CALC (res_ref, res1.a, src1.a, src2.a); + CALC (res_ref2, res2.a, src1.a, src2.a); + + res1.x = INTRINSIC (_dpwssd_epi32) (res1.x, src1.x, src2.x); + res2.x = INTRINSIC (_mask_dpwssd_epi32) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_dpwssd_epi32) (mask, res3.x, src1.x, src2.x); + + if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) + abort (); + + MASK_MERGE (i_d) (res_ref2, mask, SIZE_RES); + if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref2)) + abort (); + + MASK_ZERO (i_d) (res_ref2, mask, SIZE_RES); + if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref2)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c index 058c082cff1..aba98979021 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c @@ -12,6 +12,12 @@ /* { dg-final { scan-assembler-times "vpdpbusds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbusds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbusds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> @@ -39,4 +45,12 @@ avx512f_test (void) x_ = _mm_mask_dpbusds_epi32 (x_, m, y_, z_); x_ = _mm_maskz_dpbusds_epi32 (m, x_, y_, z_); + x = _mm256_dpwssd_epi32 (x, y, z); + x = _mm256_mask_dpwssd_epi32 (x, m, y, z); + x = _mm256_maskz_dpwssd_epi32 (m, x, y, z); + + x_ = _mm_dpwssd_epi32 (x_, y_, z_); + x_ = _mm_mask_dpwssd_epi32 (x_, m, y_, z_); + x_ = _mm_maskz_dpwssd_epi32 (m, x_, y_, z_); + } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssd-2.c new file mode 100644 index 00000000000..023f06f93c5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssd-2.c @@ -0,0 +1,16 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vnni -mavx512vl" } */ +/* { dg-require-effective-target avx512vl } */ +/* { dg-require-effective-target avx512vnni } */ + +#define AVX512VL +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpdpwssd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpdpwssd-2.c" |