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author | willschm <willschm@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-08-09 18:58:37 +0000 |
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committer | willschm <willschm@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-08-09 18:58:37 +0000 |
commit | bff6c70873a2172b3bbe970540d6e6f313950395 (patch) | |
tree | 9cabcc5ea071eefbe09e5c2948adcd0696ee861e | |
parent | b9e17a4abb8eb2a41a7872fc4961ce4939312977 (diff) | |
download | gcc-bff6c70873a2172b3bbe970540d6e6f313950395.tar.gz |
2017-08-09 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-cntlz-int.c: New.
* gcc.target/powerpc/fold-vec-cntlz-char.c: New.
* gcc.target/powerpc/fold-vec-cntlz-short.c: New.
* gcc.target/powerpc/fold-vec-cntlz-longlong.c: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@250995 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-char.c | 22 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-int.c | 22 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-longlong.c | 22 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-short.c | 22 |
5 files changed, 95 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d13c8f17160..97a17e33f16 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2017-08-09 Will Schmidt <will_schmidt@vnet.ibm.com> + + * gcc.target/powerpc/fold-vec-cntlz-int.c: New. + * gcc.target/powerpc/fold-vec-cntlz-char.c: New. + * gcc.target/powerpc/fold-vec-cntlz-short.c: New. + * gcc.target/powerpc/fold-vec-cntlz-longlong.c: New. + 2017-08-09 Slava Barinov <v.barinov@samsung.com> * g++.dg/asan/asan.exp: Switch on *.cc tests. diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-char.c new file mode 100644 index 00000000000..61dfbccd672 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-char.c @@ -0,0 +1,22 @@ +/* Verify that overloaded built-ins for vec_cntlz with char + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-maltivec -mpower8-vector -O2" } */ + +#include <altivec.h> + +vector signed char +testsc_h (vector signed char vsc2) +{ + return vec_cntlz (vsc2); +} + +vector unsigned char +testuc_h (vector unsigned char vuc2) +{ + return vec_cntlz (vuc2); +} + +/* { dg-final { scan-assembler-times "vclzb" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-int.c new file mode 100644 index 00000000000..ae4dd577692 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-int.c @@ -0,0 +1,22 @@ +/* Verify that overloaded built-ins for vec_cntlz with int + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-maltivec -mpower8-vector -O2" } */ + +#include <altivec.h> + +vector signed int +testsi (vector signed int vsi2) +{ + return vec_cntlz (vsi2); +} + +vector unsigned int +testui (vector unsigned int vui2) +{ + return vec_cntlz (vui2); +} + +/* { dg-final { scan-assembler-times "vclzw" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-longlong.c new file mode 100644 index 00000000000..1a72a2d38c7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-longlong.c @@ -0,0 +1,22 @@ +/* Verify that overloaded built-ins for vec_cntlz with long long + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mvsx -mpower8-vector -O2" } */ + +#include <altivec.h> + +vector signed long long +testsl (vector signed long long vsl2) +{ + return vec_cntlz (vsl2); +} + +vector unsigned long long +testul (vector unsigned long long vul2) +{ + return vec_cntlz (vul2); +} + +/* { dg-final { scan-assembler-times "vclzd" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-short.c new file mode 100644 index 00000000000..0f05cace2e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-cntlz-short.c @@ -0,0 +1,22 @@ +/* Verify that overloaded built-ins for vec_cntlz with int + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-maltivec -mpower8-vector -O2" } */ + +#include <altivec.h> + +vector signed short +testsi (vector signed short vss2) +{ + return vec_cntlz (vss2); +} + +vector unsigned short +testui (vector unsigned short vus2) +{ + return vec_cntlz (vus2); +} + +/* { dg-final { scan-assembler-times "vclzh" 2 } } */ |