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author | wilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-06-21 16:35:44 +0000 |
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committer | wilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-06-21 16:35:44 +0000 |
commit | 66ff0c677f9e47f7479f747d956ead8140882a67 (patch) | |
tree | a4eab55abb8dd4ea4880d93cbd8e30ecb176a63c | |
parent | 949bfed4911d48c4fb6b31433f9ea84a5f0af486 (diff) | |
download | gcc-66ff0c677f9e47f7479f747d956ead8140882a67.tar.gz |
The recently added gcc.target/aarch64/advsimd-intrinsics/vrnd*.c tests cause
failures due to accidentally running on non-ARMv8 hardware - the target check
arm_v8_neon_ok is correct for compilation tests but should be arm_v8_neon_hw
for execution tests. Fix this and also change arm_v8_neon_hw to return
true for AArch64 so these tests are run on AArch64 too.
gcc/testsuite/
* gcc.target/aarch64/advsimd-intrinsics/vrnd.c
(dg-require-effective-target): Use arm_v8_neon_hw.
* gcc.target/aarch64/advsimd-intrinsics/vrnda.c
(dg-require-effective-target): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndm.c
(dg-require-effective-target): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndn.c
(dg-require-effective-target): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndp.c
(dg-require-effective-target): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndx.c
(dg-require-effective-target): Likewise.
* lib/target-supports.exp (check_runtime arm_v8_neon_hw_available):
Add AArch64 check.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@237653 138bc75d-0d04-0410-961f-82ee72b054a4
8 files changed, 31 insertions, 8 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7f2df1f8499..ffb16146c31 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,22 @@ 2016-06-21 Wilco Dijkstra <wdijkstr@arm.com> + * gcc.target/aarch64/advsimd-intrinsics/vrnd.c + (dg-require-effective-target): Use arm_v8_neon_hw. + * gcc.target/aarch64/advsimd-intrinsics/vrnda.c + (dg-require-effective-target): Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndm.c + (dg-require-effective-target): Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndn.c + (dg-require-effective-target): Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndp.c + (dg-require-effective-target): Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndx.c + (dg-require-effective-target): Likewise. + * lib/target-supports.exp (check_runtime arm_v8_neon_hw_available): + Add AArch64 check. + +2016-06-21 Wilco Dijkstra <wdijkstr@arm.com> + * gcc.dg/tree-ssa/attr-hotcold-2.c (scan-tree-dump-times): Set to 3 so test passes. diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c index 5f492d41bff..d97a3a25ee5 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c index 816fd28dd19..ff2bdc0563f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c index 029880c21f6..eae9f61c585 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c index 571243c4929..c6c707d6765 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c index ff4771c8789..e94eb6b7622 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c index ff2357bebf3..0d2a63ef26c 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target arm_v8_neon_ok } */ +/* { dg-require-effective-target arm_v8_neon_hw } */ /* { dg-add-options arm_v8_neon } */ #include <arm_neon.h> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 9876bb5f4ce..2a8feb8f13e 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -3417,11 +3417,17 @@ proc check_effective_target_arm_v8_neon_hw { } { int main (void) { - float32x2_t a; + float32x2_t a = { 1.0f, 2.0f }; + #ifdef __ARM_ARCH_ISA_A64 + asm ("frinta %0.2s, %1.2s" + : "=w" (a) + : "w" (a)); + #else asm ("vrinta.f32 %P0, %P1" : "=w" (a) : "0" (a)); - return 0; + #endif + return a[0] == 2.0f; } } [add_options_for_arm_v8_neon ""]] } |