diff options
| author | uweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-08-05 13:53:20 +0000 |
|---|---|---|
| committer | uweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-08-05 13:53:20 +0000 |
| commit | 38aca5ebcf7388ee053844bf5933d51f8490db76 (patch) | |
| tree | 9408472c21f527ea51e2804155c844ded6a42836 | |
| parent | 6056b6d94e82714a4dae44f95ff467f83de03134 (diff) | |
| download | gcc-38aca5ebcf7388ee053844bf5933d51f8490db76.tar.gz | |
* config/spu/spu.h (CANNOT_CHANGE_MODE_CLASS): Allow (multi)word-sized
SUBREG of multi-word hard register.
* config/spu/spu.c (valid_subreg): Likewise.
(adjust_operand): Handle SUBREGs of multi-word hard registers.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@138711 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/spu/spu.c | 9 | ||||
| -rw-r--r-- | gcc/config/spu/spu.h | 1 |
3 files changed, 14 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 02ca43300fa..10385d926f8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2008-08-05 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/spu/spu.h (CANNOT_CHANGE_MODE_CLASS): Allow (multi)word-sized + SUBREG of multi-word hard register. + * config/spu/spu.c (valid_subreg): Likewise. + (adjust_operand): Handle SUBREGs of multi-word hard registers. + 2008-08-04 Richard Guenther <rguenther@suse.de> * tree-ssa-loop-ivopts.c (add_iv_value_candidates): Also add diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index 83bd9f51315..b40d12c0149 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -419,7 +419,8 @@ valid_subreg (rtx op) enum machine_mode im = GET_MODE (SUBREG_REG (op)); return om != VOIDmode && im != VOIDmode && (GET_MODE_SIZE (im) == GET_MODE_SIZE (om) - || (GET_MODE_SIZE (im) <= 4 && GET_MODE_SIZE (om) <= 4)); + || (GET_MODE_SIZE (im) <= 4 && GET_MODE_SIZE (om) <= 4) + || (GET_MODE_SIZE (im) >= 16 && GET_MODE_SIZE (om) >= 16)); } /* When insv and ext[sz]v ar passed a TI SUBREG, we want to strip it off @@ -429,8 +430,10 @@ adjust_operand (rtx op, HOST_WIDE_INT * start) { enum machine_mode mode; int op_size; - /* Strip any SUBREG */ - if (GET_CODE (op) == SUBREG) + /* Strip any paradoxical SUBREG. */ + if (GET_CODE (op) == SUBREG + && (GET_MODE_BITSIZE (GET_MODE (op)) + > GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op))))) { if (start) *start -= diff --git a/gcc/config/spu/spu.h b/gcc/config/spu/spu.h index 729e0d707a8..4180c4e4638 100644 --- a/gcc/config/spu/spu.h +++ b/gcc/config/spu/spu.h @@ -263,6 +263,7 @@ enum reg_class { only true for SPU. */ #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ ((GET_MODE_SIZE (FROM) > 4 || GET_MODE_SIZE (TO) > 4) \ + && (GET_MODE_SIZE (FROM) < 16 || GET_MODE_SIZE (TO) < 16) \ && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)) #define REGISTER_TARGET_PRAGMAS() do { \ |