diff options
author | steven <steven@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-06-04 17:07:57 +0000 |
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committer | steven <steven@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-06-04 17:07:57 +0000 |
commit | 2f138c1cfbd62fbaa71196fb5e9adb90c297c468 (patch) | |
tree | 60b6a1a40cafd587e8f0365563226295e3d92044 | |
parent | fb9fa4cf6c97becf39517cb9883e0a434e01e48c (diff) | |
download | gcc-2f138c1cfbd62fbaa71196fb5e9adb90c297c468.tar.gz |
* lcm.c: Move all mode-switching related functions from here...
* mode-switching.c: ...to this new file.
* doc/passes.texi: Update accordingly.
* basic-block.h (label_value_list): Remove extern decl.
* cfgrtl.c (label_value_list): Remove.
(can_delete_label_p): Don't look at it.
* cfgcleanup.c (cleanup_cfg): Don't free it.
* common.opt: Don't refer to non-existing flag_alias_check.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@100591 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 15 | ||||
-rw-r--r-- | gcc/Makefile.in | 5 | ||||
-rw-r--r-- | gcc/basic-block.h | 4 | ||||
-rw-r--r-- | gcc/cfgcleanup.c | 2 | ||||
-rw-r--r-- | gcc/cfgrtl.c | 8 | ||||
-rw-r--r-- | gcc/common.opt | 1 | ||||
-rw-r--r-- | gcc/doc/passes.texi | 3 | ||||
-rw-r--r-- | gcc/lcm.c | 673 | ||||
-rw-r--r-- | gcc/mode-switching.c | 711 |
9 files changed, 732 insertions, 690 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5c3ad3551d8..ad10c835cc3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2005-06-04 Steven Bosscher <stevenb@suse.de> + + * lcm.c: Move all mode-switching related functions from here... + * mode-switching.c: ...to this new file. + * doc/passes.texi: Update accordingly. + + * basic-block.h (label_value_list): Remove extern decl. + * cfgrtl.c (label_value_list): Remove. + (can_delete_label_p): Don't look at it. + * cfgcleanup.c (cleanup_cfg): Don't free it. + + * common.opt: Don't refer to non-existing flag_alias_check. + 2005-06-04 David Edelsohn <edelsohn@gnu.org> * config/rs6000/aix52.h (ASM_CPU_SPEC): Add power5. @@ -62,7 +75,7 @@ 2005-06-03 Eric Christopher <echristo@redhat.com> * config/mips/mips.opt: Add RejectNegative to divide-breaks and - divide-traps. + divide-traps. 2005-06-03 Jan Hubicka <jh@suse.cz> diff --git a/gcc/Makefile.in b/gcc/Makefile.in index 30bdf4fc6d1..9be640ebf26 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -949,7 +949,7 @@ OBJS-common = \ haifa-sched.o hooks.o ifcvt.o insn-attrtab.o insn-emit.o insn-modes.o \ insn-extract.o insn-opinit.o insn-output.o insn-peep.o insn-recog.o \ integrate.o intl.o jump.o langhooks.o lcm.o lists.o local-alloc.o \ - loop.o modulo-sched.o optabs.o options.o opts.o \ + loop.o mode-switching.o modulo-sched.o optabs.o options.o opts.o \ params.o postreload.o postreload-gcse.o predict.o \ insn-preds.o pointer-set.o postreload.o \ print-rtl.o print-tree.o profile.o value-prof.o var-tracking.o \ @@ -2099,6 +2099,9 @@ resource.o : resource.c $(CONFIG_H) $(RTL_H) hard-reg-set.h $(SYSTEM_H) \ lcm.o : lcm.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) $(REGS_H) \ hard-reg-set.h $(FLAGS_H) real.h insn-config.h $(INSN_ATTR_H) $(RECOG_H) \ $(BASIC_BLOCK_H) $(TM_P_H) function.h output.h +mode-switching.o : mode-switching.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(RTL_H) $(REGS_H) hard-reg-set.h $(FLAGS_H) real.h insn-config.h \ + $(INSN_ATTR_H) $(RECOG_H) $(BASIC_BLOCK_H) $(TM_P_H) function.h output.h tree-ssa-dce.o : tree-ssa-dce.c $(CONFIG_H) $(SYSTEM_H) $(TREE_H) \ $(RTL_H) $(TM_P_H) $(TREE_FLOW_H) $(DIAGNOSTIC_H) $(TIMEVAR_H) $(TM_H) \ coretypes.h $(TREE_DUMP_H) tree-pass.h $(FLAGS_H) $(BASIC_BLOCK_H) \ diff --git a/gcc/basic-block.h b/gcc/basic-block.h index 5c033dfbd4b..2979e01a3ea 100644 --- a/gcc/basic-block.h +++ b/gcc/basic-block.h @@ -446,10 +446,6 @@ extern bool rediscover_loops_after_threading; #define FOR_ALL_BB_FN(BB, FN) \ for (BB = ENTRY_BLOCK_PTR_FOR_FUNCTION (FN); BB; BB = BB->next_bb) -/* Special labels found during CFG build. */ - -extern GTY(()) rtx label_value_list; - extern bitmap_obstack reg_obstack; /* Indexed by n, gives number of basic block that (REG n) is used in. diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c index 10e6f101eed..98c82452ca3 100644 --- a/gcc/cfgcleanup.c +++ b/gcc/cfgcleanup.c @@ -2132,8 +2132,6 @@ cleanup_cfg (int mode) delete_dead_jumptables (); } - /* Kill the data we won't maintain. */ - free_EXPR_LIST_list (&label_value_list); timevar_pop (TV_CLEANUP_CFG); return changed; diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c index 86b2435c30a..2571d4d65dc 100644 --- a/gcc/cfgrtl.c +++ b/gcc/cfgrtl.c @@ -59,11 +59,6 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #include "target.h" #include "cfgloop.h" -/* The labels mentioned in non-jump rtl. Valid during find_basic_blocks. */ -/* ??? Should probably be using LABEL_NUSES instead. It would take a - bit of surgery to be able to use or co-opt the routines in jump. */ -rtx label_value_list; - static int can_delete_note_p (rtx); static int can_delete_label_p (rtx); static void commit_one_edge_insertion (edge, int); @@ -103,8 +98,7 @@ can_delete_label_p (rtx label) return (!LABEL_PRESERVE_P (label) /* User declared labels must be preserved. */ && LABEL_NAME (label) == 0 - && !in_expr_list_p (forced_labels, label) - && !in_expr_list_p (label_value_list, label)); + && !in_expr_list_p (forced_labels, label)); } /* Delete INSN by patching it out. Return the next insn. */ diff --git a/gcc/common.opt b/gcc/common.opt index a603707508a..f54eabce8a1 100644 --- a/gcc/common.opt +++ b/gcc/common.opt @@ -234,7 +234,6 @@ Common RejectNegative Joined UInteger ; global variables. ; 2 if pointer arguments may not alias each other and may not ; alias global variables. True in Fortran. -; The value is ignored if flag_alias_check is 0. fargument-alias Common Report Var(flag_argument_noalias,0) Specify that arguments may alias each other and globals diff --git a/gcc/doc/passes.texi b/gcc/doc/passes.texi index ad6110e7312..e2fcc7a5d02 100644 --- a/gcc/doc/passes.texi +++ b/gcc/doc/passes.texi @@ -639,7 +639,8 @@ The pass is located in @file{regmove.c}. This pass looks for instructions that require the processor to be in a specific ``mode'' and minimizes the number of mode changes required to satisfy all users. What these modes are, and what they apply to are -completely target-specific. The source is located in @file{lcm.c}. +completely target-specific. +The source is located in @file{mode-switching.c}. @cindex modulo scheduling @cindex sms, swing, software pipelining diff --git a/gcc/lcm.c b/gcc/lcm.c index 210e4d600b1..330068e7d61 100644 --- a/gcc/lcm.c +++ b/gcc/lcm.c @@ -809,676 +809,3 @@ pre_edge_rev_lcm (FILE *file ATTRIBUTE_UNUSED, int n_exprs, sbitmap *transp, return edge_list; } -/* Mode switching: - - The algorithm for setting the modes consists of scanning the insn list - and finding all the insns which require a specific mode. Each insn gets - a unique struct seginfo element. These structures are inserted into a list - for each basic block. For each entity, there is an array of bb_info over - the flow graph basic blocks (local var 'bb_info'), and contains a list - of all insns within that basic block, in the order they are encountered. - - For each entity, any basic block WITHOUT any insns requiring a specific - mode are given a single entry, without a mode. (Each basic block - in the flow graph must have at least one entry in the segment table.) - - The LCM algorithm is then run over the flow graph to determine where to - place the sets to the highest-priority value in respect of first the first - insn in any one block. Any adjustments required to the transparency - vectors are made, then the next iteration starts for the next-lower - priority mode, till for each entity all modes are exhausted. - - More details are located in the code for optimize_mode_switching(). */ - -/* This structure contains the information for each insn which requires - either single or double mode to be set. - MODE is the mode this insn must be executed in. - INSN_PTR is the insn to be executed (may be the note that marks the - beginning of a basic block). - BBNUM is the flow graph basic block this insn occurs in. - NEXT is the next insn in the same basic block. */ -struct seginfo -{ - int mode; - rtx insn_ptr; - int bbnum; - struct seginfo *next; - HARD_REG_SET regs_live; -}; - -struct bb_info -{ - struct seginfo *seginfo; - int computing; -}; - -/* These bitmaps are used for the LCM algorithm. */ - -#ifdef OPTIMIZE_MODE_SWITCHING -static sbitmap *antic; -static sbitmap *transp; -static sbitmap *comp; - -static struct seginfo * new_seginfo (int, rtx, int, HARD_REG_SET); -static void add_seginfo (struct bb_info *, struct seginfo *); -static void reg_dies (rtx, HARD_REG_SET); -static void reg_becomes_live (rtx, rtx, void *); -static void make_preds_opaque (basic_block, int); -#endif - -#ifdef OPTIMIZE_MODE_SWITCHING - -/* This function will allocate a new BBINFO structure, initialized - with the MODE, INSN, and basic block BB parameters. */ - -static struct seginfo * -new_seginfo (int mode, rtx insn, int bb, HARD_REG_SET regs_live) -{ - struct seginfo *ptr; - ptr = xmalloc (sizeof (struct seginfo)); - ptr->mode = mode; - ptr->insn_ptr = insn; - ptr->bbnum = bb; - ptr->next = NULL; - COPY_HARD_REG_SET (ptr->regs_live, regs_live); - return ptr; -} - -/* Add a seginfo element to the end of a list. - HEAD is a pointer to the list beginning. - INFO is the structure to be linked in. */ - -static void -add_seginfo (struct bb_info *head, struct seginfo *info) -{ - struct seginfo *ptr; - - if (head->seginfo == NULL) - head->seginfo = info; - else - { - ptr = head->seginfo; - while (ptr->next != NULL) - ptr = ptr->next; - ptr->next = info; - } -} - -/* Make all predecessors of basic block B opaque, recursively, till we hit - some that are already non-transparent, or an edge where aux is set; that - denotes that a mode set is to be done on that edge. - J is the bit number in the bitmaps that corresponds to the entity that - we are currently handling mode-switching for. */ - -static void -make_preds_opaque (basic_block b, int j) -{ - edge e; - edge_iterator ei; - - FOR_EACH_EDGE (e, ei, b->preds) - { - basic_block pb = e->src; - - if (e->aux || ! TEST_BIT (transp[pb->index], j)) - continue; - - RESET_BIT (transp[pb->index], j); - make_preds_opaque (pb, j); - } -} - -/* Record in LIVE that register REG died. */ - -static void -reg_dies (rtx reg, HARD_REG_SET live) -{ - int regno, nregs; - - if (!REG_P (reg)) - return; - - regno = REGNO (reg); - if (regno < FIRST_PSEUDO_REGISTER) - for (nregs = hard_regno_nregs[regno][GET_MODE (reg)] - 1; nregs >= 0; - nregs--) - CLEAR_HARD_REG_BIT (live, regno + nregs); -} - -/* Record in LIVE that register REG became live. - This is called via note_stores. */ - -static void -reg_becomes_live (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *live) -{ - int regno, nregs; - - if (GET_CODE (reg) == SUBREG) - reg = SUBREG_REG (reg); - - if (!REG_P (reg)) - return; - - regno = REGNO (reg); - if (regno < FIRST_PSEUDO_REGISTER) - for (nregs = hard_regno_nregs[regno][GET_MODE (reg)] - 1; nregs >= 0; - nregs--) - SET_HARD_REG_BIT (* (HARD_REG_SET *) live, regno + nregs); -} - -/* Make sure if MODE_ENTRY is defined the MODE_EXIT is defined - and vice versa. */ -#if defined (MODE_ENTRY) != defined (MODE_EXIT) - #error "Both MODE_ENTRY and MODE_EXIT must be defined" -#endif - -#if defined (MODE_ENTRY) && defined (MODE_EXIT) -/* Split the fallthrough edge to the exit block, so that we can note - that there NORMAL_MODE is required. Return the new block if it's - inserted before the exit block. Otherwise return null. */ - -static basic_block -create_pre_exit (int n_entities, int *entity_map, const int *num_modes) -{ - edge eg; - edge_iterator ei; - basic_block pre_exit; - - /* The only non-call predecessor at this stage is a block with a - fallthrough edge; there can be at most one, but there could be - none at all, e.g. when exit is called. */ - pre_exit = 0; - FOR_EACH_EDGE (eg, ei, EXIT_BLOCK_PTR->preds) - if (eg->flags & EDGE_FALLTHRU) - { - basic_block src_bb = eg->src; - regset live_at_end = src_bb->global_live_at_end; - rtx last_insn, ret_reg; - - gcc_assert (!pre_exit); - /* If this function returns a value at the end, we have to - insert the final mode switch before the return value copy - to its hard register. */ - if (EDGE_COUNT (EXIT_BLOCK_PTR->preds) == 1 - && NONJUMP_INSN_P ((last_insn = BB_END (src_bb))) - && GET_CODE (PATTERN (last_insn)) == USE - && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG) - { - int ret_start = REGNO (ret_reg); - int nregs = hard_regno_nregs[ret_start][GET_MODE (ret_reg)]; - int ret_end = ret_start + nregs; - int short_block = 0; - int maybe_builtin_apply = 0; - int forced_late_switch = 0; - rtx before_return_copy; - - do - { - rtx return_copy = PREV_INSN (last_insn); - rtx return_copy_pat, copy_reg; - int copy_start, copy_num; - int j; - - if (INSN_P (return_copy)) - { - if (GET_CODE (PATTERN (return_copy)) == USE - && GET_CODE (XEXP (PATTERN (return_copy), 0)) == REG - && (FUNCTION_VALUE_REGNO_P - (REGNO (XEXP (PATTERN (return_copy), 0))))) - { - maybe_builtin_apply = 1; - last_insn = return_copy; - continue; - } - /* If the return register is not (in its entirety) - likely spilled, the return copy might be - partially or completely optimized away. */ - return_copy_pat = single_set (return_copy); - if (!return_copy_pat) - { - return_copy_pat = PATTERN (return_copy); - if (GET_CODE (return_copy_pat) != CLOBBER) - break; - } - copy_reg = SET_DEST (return_copy_pat); - if (GET_CODE (copy_reg) == REG) - copy_start = REGNO (copy_reg); - else if (GET_CODE (copy_reg) == SUBREG - && GET_CODE (SUBREG_REG (copy_reg)) == REG) - copy_start = REGNO (SUBREG_REG (copy_reg)); - else - break; - if (copy_start >= FIRST_PSEUDO_REGISTER) - break; - copy_num - = hard_regno_nregs[copy_start][GET_MODE (copy_reg)]; - - /* If the return register is not likely spilled, - as is - the case for floating point on SH4 - then it might - be set by an arithmetic operation that needs a - different mode than the exit block. */ - for (j = n_entities - 1; j >= 0; j--) - { - int e = entity_map[j]; - int mode = MODE_NEEDED (e, return_copy); - - if (mode != num_modes[e] && mode != MODE_EXIT (e)) - break; - } - if (j >= 0) - { - /* For the SH4, floating point loads depend on fpscr, - thus we might need to put the final mode switch - after the return value copy. That is still OK, - because a floating point return value does not - conflict with address reloads. */ - if (copy_start >= ret_start - && copy_start + copy_num <= ret_end - && OBJECT_P (SET_SRC (return_copy_pat))) - forced_late_switch = 1; - break; - } - - if (copy_start >= ret_start - && copy_start + copy_num <= ret_end) - nregs -= copy_num; - else if (!maybe_builtin_apply - || !FUNCTION_VALUE_REGNO_P (copy_start)) - break; - last_insn = return_copy; - } - /* ??? Exception handling can lead to the return value - copy being already separated from the return value use, - as in unwind-dw2.c . - Similarly, conditionally returning without a value, - and conditionally using builtin_return can lead to an - isolated use. */ - if (return_copy == BB_HEAD (src_bb)) - { - short_block = 1; - break; - } - last_insn = return_copy; - } - while (nregs); - - /* If we didn't see a full return value copy, verify that there - is a plausible reason for this. If some, but not all of the - return register is likely spilled, we can expect that there - is a copy for the likely spilled part. */ - gcc_assert (!nregs - || forced_late_switch - || short_block - || !(CLASS_LIKELY_SPILLED_P - (REGNO_REG_CLASS (ret_start))) - || (nregs - != hard_regno_nregs[ret_start][GET_MODE (ret_reg)]) - /* For multi-hard-register floating point - values, sometimes the likely-spilled part - is ordinarily copied first, then the other - part is set with an arithmetic operation. - This doesn't actually cause reload - failures, so let it pass. */ - || (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT - && nregs != 1)); - - if (INSN_P (last_insn)) - { - before_return_copy - = emit_note_before (NOTE_INSN_DELETED, last_insn); - /* Instructions preceding LAST_INSN in the same block might - require a different mode than MODE_EXIT, so if we might - have such instructions, keep them in a separate block - from pre_exit. */ - if (last_insn != BB_HEAD (src_bb)) - src_bb = split_block (src_bb, - PREV_INSN (before_return_copy))->dest; - } - else - before_return_copy = last_insn; - pre_exit = split_block (src_bb, before_return_copy)->src; - } - else - { - pre_exit = split_edge (eg); - COPY_REG_SET (pre_exit->global_live_at_start, live_at_end); - COPY_REG_SET (pre_exit->global_live_at_end, live_at_end); - } - } - - return pre_exit; -} -#endif - -/* Find all insns that need a particular mode setting, and insert the - necessary mode switches. Return true if we did work. */ - -int -optimize_mode_switching (FILE *file) -{ - rtx insn; - int e; - basic_block bb; - int need_commit = 0; - sbitmap *kill; - struct edge_list *edge_list; - static const int num_modes[] = NUM_MODES_FOR_MODE_SWITCHING; -#define N_ENTITIES ARRAY_SIZE (num_modes) - int entity_map[N_ENTITIES]; - struct bb_info *bb_info[N_ENTITIES]; - int i, j; - int n_entities; - int max_num_modes = 0; - bool emited = false; - basic_block post_entry ATTRIBUTE_UNUSED, pre_exit ATTRIBUTE_UNUSED; - - clear_bb_flags (); - - for (e = N_ENTITIES - 1, n_entities = 0; e >= 0; e--) - if (OPTIMIZE_MODE_SWITCHING (e)) - { - int entry_exit_extra = 0; - - /* Create the list of segments within each basic block. - If NORMAL_MODE is defined, allow for two extra - blocks split from the entry and exit block. */ -#if defined (MODE_ENTRY) && defined (MODE_EXIT) - entry_exit_extra = 3; -#endif - bb_info[n_entities] - = xcalloc (last_basic_block + entry_exit_extra, sizeof **bb_info); - entity_map[n_entities++] = e; - if (num_modes[e] > max_num_modes) - max_num_modes = num_modes[e]; - } - - if (! n_entities) - return 0; - -#if defined (MODE_ENTRY) && defined (MODE_EXIT) - /* Split the edge from the entry block, so that we can note that - there NORMAL_MODE is supplied. */ - post_entry = split_edge (single_succ_edge (ENTRY_BLOCK_PTR)); - pre_exit = create_pre_exit (n_entities, entity_map, num_modes); -#endif - - /* Create the bitmap vectors. */ - - antic = sbitmap_vector_alloc (last_basic_block, n_entities); - transp = sbitmap_vector_alloc (last_basic_block, n_entities); - comp = sbitmap_vector_alloc (last_basic_block, n_entities); - - sbitmap_vector_ones (transp, last_basic_block); - - for (j = n_entities - 1; j >= 0; j--) - { - int e = entity_map[j]; - int no_mode = num_modes[e]; - struct bb_info *info = bb_info[j]; - - /* Determine what the first use (if any) need for a mode of entity E is. - This will be the mode that is anticipatable for this block. - Also compute the initial transparency settings. */ - FOR_EACH_BB (bb) - { - struct seginfo *ptr; - int last_mode = no_mode; - HARD_REG_SET live_now; - - REG_SET_TO_HARD_REG_SET (live_now, - bb->global_live_at_start); - for (insn = BB_HEAD (bb); - insn != NULL && insn != NEXT_INSN (BB_END (bb)); - insn = NEXT_INSN (insn)) - { - if (INSN_P (insn)) - { - int mode = MODE_NEEDED (e, insn); - rtx link; - - if (mode != no_mode && mode != last_mode) - { - last_mode = mode; - ptr = new_seginfo (mode, insn, bb->index, live_now); - add_seginfo (info + bb->index, ptr); - RESET_BIT (transp[bb->index], j); - } -#ifdef MODE_AFTER - last_mode = MODE_AFTER (last_mode, insn); -#endif - /* Update LIVE_NOW. */ - for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) - if (REG_NOTE_KIND (link) == REG_DEAD) - reg_dies (XEXP (link, 0), live_now); - - note_stores (PATTERN (insn), reg_becomes_live, &live_now); - for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) - if (REG_NOTE_KIND (link) == REG_UNUSED) - reg_dies (XEXP (link, 0), live_now); - } - } - - info[bb->index].computing = last_mode; - /* Check for blocks without ANY mode requirements. */ - if (last_mode == no_mode) - { - ptr = new_seginfo (no_mode, BB_END (bb), bb->index, live_now); - add_seginfo (info + bb->index, ptr); - } - } -#if defined (MODE_ENTRY) && defined (MODE_EXIT) - { - int mode = MODE_ENTRY (e); - - if (mode != no_mode) - { - bb = post_entry; - - /* By always making this nontransparent, we save - an extra check in make_preds_opaque. We also - need this to avoid confusing pre_edge_lcm when - antic is cleared but transp and comp are set. */ - RESET_BIT (transp[bb->index], j); - - /* Insert a fake computing definition of MODE into entry - blocks which compute no mode. This represents the mode on - entry. */ - info[bb->index].computing = mode; - - if (pre_exit) - info[pre_exit->index].seginfo->mode = MODE_EXIT (e); - } - } -#endif /* NORMAL_MODE */ - } - - kill = sbitmap_vector_alloc (last_basic_block, n_entities); - for (i = 0; i < max_num_modes; i++) - { - int current_mode[N_ENTITIES]; - sbitmap *delete; - sbitmap *insert; - - /* Set the anticipatable and computing arrays. */ - sbitmap_vector_zero (antic, last_basic_block); - sbitmap_vector_zero (comp, last_basic_block); - for (j = n_entities - 1; j >= 0; j--) - { - int m = current_mode[j] = MODE_PRIORITY_TO_MODE (entity_map[j], i); - struct bb_info *info = bb_info[j]; - - FOR_EACH_BB (bb) - { - if (info[bb->index].seginfo->mode == m) - SET_BIT (antic[bb->index], j); - - if (info[bb->index].computing == m) - SET_BIT (comp[bb->index], j); - } - } - - /* Calculate the optimal locations for the - placement mode switches to modes with priority I. */ - - FOR_EACH_BB (bb) - sbitmap_not (kill[bb->index], transp[bb->index]); - edge_list = pre_edge_lcm (file, 1, transp, comp, antic, - kill, &insert, &delete); - - for (j = n_entities - 1; j >= 0; j--) - { - /* Insert all mode sets that have been inserted by lcm. */ - int no_mode = num_modes[entity_map[j]]; - - /* Wherever we have moved a mode setting upwards in the flow graph, - the blocks between the new setting site and the now redundant - computation ceases to be transparent for any lower-priority - mode of the same entity. First set the aux field of each - insertion site edge non-transparent, then propagate the new - non-transparency from the redundant computation upwards till - we hit an insertion site or an already non-transparent block. */ - for (e = NUM_EDGES (edge_list) - 1; e >= 0; e--) - { - edge eg = INDEX_EDGE (edge_list, e); - int mode; - basic_block src_bb; - HARD_REG_SET live_at_edge; - rtx mode_set; - - eg->aux = 0; - - if (! TEST_BIT (insert[e], j)) - continue; - - eg->aux = (void *)1; - - mode = current_mode[j]; - src_bb = eg->src; - - REG_SET_TO_HARD_REG_SET (live_at_edge, - src_bb->global_live_at_end); - - start_sequence (); - EMIT_MODE_SET (entity_map[j], mode, live_at_edge); - mode_set = get_insns (); - end_sequence (); - - /* Do not bother to insert empty sequence. */ - if (mode_set == NULL_RTX) - continue; - - /* If this is an abnormal edge, we'll insert at the end - of the previous block. */ - if (eg->flags & EDGE_ABNORMAL) - { - emited = true; - if (JUMP_P (BB_END (src_bb))) - emit_insn_before (mode_set, BB_END (src_bb)); - else - { - /* It doesn't make sense to switch to normal - mode after a CALL_INSN. The cases in which a - CALL_INSN may have an abnormal edge are - sibcalls and EH edges. In the case of - sibcalls, the dest basic-block is the - EXIT_BLOCK, that runs in normal mode; it is - assumed that a sibcall insn requires normal - mode itself, so no mode switch would be - required after the call (it wouldn't make - sense, anyway). In the case of EH edges, EH - entry points also start in normal mode, so a - similar reasoning applies. */ - gcc_assert (NONJUMP_INSN_P (BB_END (src_bb))); - emit_insn_after (mode_set, BB_END (src_bb)); - } - bb_info[j][src_bb->index].computing = mode; - RESET_BIT (transp[src_bb->index], j); - } - else - { - need_commit = 1; - insert_insn_on_edge (mode_set, eg); - } - } - - FOR_EACH_BB_REVERSE (bb) - if (TEST_BIT (delete[bb->index], j)) - { - make_preds_opaque (bb, j); - /* Cancel the 'deleted' mode set. */ - bb_info[j][bb->index].seginfo->mode = no_mode; - } - } - - sbitmap_vector_free (delete); - sbitmap_vector_free (insert); - clear_aux_for_edges (); - free_edge_list (edge_list); - } - - /* Now output the remaining mode sets in all the segments. */ - for (j = n_entities - 1; j >= 0; j--) - { - int no_mode = num_modes[entity_map[j]]; - - FOR_EACH_BB_REVERSE (bb) - { - struct seginfo *ptr, *next; - for (ptr = bb_info[j][bb->index].seginfo; ptr; ptr = next) - { - next = ptr->next; - if (ptr->mode != no_mode) - { - rtx mode_set; - - start_sequence (); - EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live); - mode_set = get_insns (); - end_sequence (); - - /* Insert MODE_SET only if it is nonempty. */ - if (mode_set != NULL_RTX) - { - emited = true; - if (NOTE_P (ptr->insn_ptr) - && (NOTE_LINE_NUMBER (ptr->insn_ptr) - == NOTE_INSN_BASIC_BLOCK)) - emit_insn_after (mode_set, ptr->insn_ptr); - else - emit_insn_before (mode_set, ptr->insn_ptr); - } - } - - free (ptr); - } - } - - free (bb_info[j]); - } - - /* Finished. Free up all the things we've allocated. */ - - sbitmap_vector_free (kill); - sbitmap_vector_free (antic); - sbitmap_vector_free (transp); - sbitmap_vector_free (comp); - - if (need_commit) - commit_edge_insertions (); - -#if defined (MODE_ENTRY) && defined (MODE_EXIT) - cleanup_cfg (CLEANUP_NO_INSN_DEL); -#else - if (!need_commit && !emited) - return 0; -#endif - - max_regno = max_reg_num (); - allocate_reg_info (max_regno, FALSE, FALSE); - update_life_info_in_dirty_blocks (UPDATE_LIFE_GLOBAL_RM_NOTES, - (PROP_DEATH_NOTES | PROP_KILL_DEAD_CODE - | PROP_SCAN_DEAD_CODE)); - - return 1; -} -#endif /* OPTIMIZE_MODE_SWITCHING */ diff --git a/gcc/mode-switching.c b/gcc/mode-switching.c new file mode 100644 index 00000000000..57eb1d21dc1 --- /dev/null +++ b/gcc/mode-switching.c @@ -0,0 +1,711 @@ +/* CPU mode switching + Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 + Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ + +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "tm.h" +#include "rtl.h" +#include "regs.h" +#include "hard-reg-set.h" +#include "flags.h" +#include "real.h" +#include "insn-config.h" +#include "recog.h" +#include "basic-block.h" +#include "output.h" +#include "tm_p.h" +#include "function.h" + +/* We want target macros for the mode switching code to be able to refer + to instruction attribute values. */ +#include "insn-attr.h" + +#ifdef OPTIMIZE_MODE_SWITCHING + +/* The algorithm for setting the modes consists of scanning the insn list + and finding all the insns which require a specific mode. Each insn gets + a unique struct seginfo element. These structures are inserted into a list + for each basic block. For each entity, there is an array of bb_info over + the flow graph basic blocks (local var 'bb_info'), and contains a list + of all insns within that basic block, in the order they are encountered. + + For each entity, any basic block WITHOUT any insns requiring a specific + mode are given a single entry, without a mode. (Each basic block + in the flow graph must have at least one entry in the segment table.) + + The LCM algorithm is then run over the flow graph to determine where to + place the sets to the highest-priority value in respect of first the first + insn in any one block. Any adjustments required to the transparency + vectors are made, then the next iteration starts for the next-lower + priority mode, till for each entity all modes are exhausted. + + More details are located in the code for optimize_mode_switching(). */ + +/* This structure contains the information for each insn which requires + either single or double mode to be set. + MODE is the mode this insn must be executed in. + INSN_PTR is the insn to be executed (may be the note that marks the + beginning of a basic block). + BBNUM is the flow graph basic block this insn occurs in. + NEXT is the next insn in the same basic block. */ +struct seginfo +{ + int mode; + rtx insn_ptr; + int bbnum; + struct seginfo *next; + HARD_REG_SET regs_live; +}; + +struct bb_info +{ + struct seginfo *seginfo; + int computing; +}; + +/* These bitmaps are used for the LCM algorithm. */ + +static sbitmap *antic; +static sbitmap *transp; +static sbitmap *comp; + +static struct seginfo * new_seginfo (int, rtx, int, HARD_REG_SET); +static void add_seginfo (struct bb_info *, struct seginfo *); +static void reg_dies (rtx, HARD_REG_SET); +static void reg_becomes_live (rtx, rtx, void *); +static void make_preds_opaque (basic_block, int); + + +/* This function will allocate a new BBINFO structure, initialized + with the MODE, INSN, and basic block BB parameters. */ + +static struct seginfo * +new_seginfo (int mode, rtx insn, int bb, HARD_REG_SET regs_live) +{ + struct seginfo *ptr; + ptr = xmalloc (sizeof (struct seginfo)); + ptr->mode = mode; + ptr->insn_ptr = insn; + ptr->bbnum = bb; + ptr->next = NULL; + COPY_HARD_REG_SET (ptr->regs_live, regs_live); + return ptr; +} + +/* Add a seginfo element to the end of a list. + HEAD is a pointer to the list beginning. + INFO is the structure to be linked in. */ + +static void +add_seginfo (struct bb_info *head, struct seginfo *info) +{ + struct seginfo *ptr; + + if (head->seginfo == NULL) + head->seginfo = info; + else + { + ptr = head->seginfo; + while (ptr->next != NULL) + ptr = ptr->next; + ptr->next = info; + } +} + +/* Make all predecessors of basic block B opaque, recursively, till we hit + some that are already non-transparent, or an edge where aux is set; that + denotes that a mode set is to be done on that edge. + J is the bit number in the bitmaps that corresponds to the entity that + we are currently handling mode-switching for. */ + +static void +make_preds_opaque (basic_block b, int j) +{ + edge e; + edge_iterator ei; + + FOR_EACH_EDGE (e, ei, b->preds) + { + basic_block pb = e->src; + + if (e->aux || ! TEST_BIT (transp[pb->index], j)) + continue; + + RESET_BIT (transp[pb->index], j); + make_preds_opaque (pb, j); + } +} + +/* Record in LIVE that register REG died. */ + +static void +reg_dies (rtx reg, HARD_REG_SET live) +{ + int regno, nregs; + + if (!REG_P (reg)) + return; + + regno = REGNO (reg); + if (regno < FIRST_PSEUDO_REGISTER) + for (nregs = hard_regno_nregs[regno][GET_MODE (reg)] - 1; nregs >= 0; + nregs--) + CLEAR_HARD_REG_BIT (live, regno + nregs); +} + +/* Record in LIVE that register REG became live. + This is called via note_stores. */ + +static void +reg_becomes_live (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *live) +{ + int regno, nregs; + + if (GET_CODE (reg) == SUBREG) + reg = SUBREG_REG (reg); + + if (!REG_P (reg)) + return; + + regno = REGNO (reg); + if (regno < FIRST_PSEUDO_REGISTER) + for (nregs = hard_regno_nregs[regno][GET_MODE (reg)] - 1; nregs >= 0; + nregs--) + SET_HARD_REG_BIT (* (HARD_REG_SET *) live, regno + nregs); +} + +/* Make sure if MODE_ENTRY is defined the MODE_EXIT is defined + and vice versa. */ +#if defined (MODE_ENTRY) != defined (MODE_EXIT) + #error "Both MODE_ENTRY and MODE_EXIT must be defined" +#endif + +#if defined (MODE_ENTRY) && defined (MODE_EXIT) +/* Split the fallthrough edge to the exit block, so that we can note + that there NORMAL_MODE is required. Return the new block if it's + inserted before the exit block. Otherwise return null. */ + +static basic_block +create_pre_exit (int n_entities, int *entity_map, const int *num_modes) +{ + edge eg; + edge_iterator ei; + basic_block pre_exit; + + /* The only non-call predecessor at this stage is a block with a + fallthrough edge; there can be at most one, but there could be + none at all, e.g. when exit is called. */ + pre_exit = 0; + FOR_EACH_EDGE (eg, ei, EXIT_BLOCK_PTR->preds) + if (eg->flags & EDGE_FALLTHRU) + { + basic_block src_bb = eg->src; + regset live_at_end = src_bb->global_live_at_end; + rtx last_insn, ret_reg; + + gcc_assert (!pre_exit); + /* If this function returns a value at the end, we have to + insert the final mode switch before the return value copy + to its hard register. */ + if (EDGE_COUNT (EXIT_BLOCK_PTR->preds) == 1 + && NONJUMP_INSN_P ((last_insn = BB_END (src_bb))) + && GET_CODE (PATTERN (last_insn)) == USE + && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG) + { + int ret_start = REGNO (ret_reg); + int nregs = hard_regno_nregs[ret_start][GET_MODE (ret_reg)]; + int ret_end = ret_start + nregs; + int short_block = 0; + int maybe_builtin_apply = 0; + int forced_late_switch = 0; + rtx before_return_copy; + + do + { + rtx return_copy = PREV_INSN (last_insn); + rtx return_copy_pat, copy_reg; + int copy_start, copy_num; + int j; + + if (INSN_P (return_copy)) + { + if (GET_CODE (PATTERN (return_copy)) == USE + && GET_CODE (XEXP (PATTERN (return_copy), 0)) == REG + && (FUNCTION_VALUE_REGNO_P + (REGNO (XEXP (PATTERN (return_copy), 0))))) + { + maybe_builtin_apply = 1; + last_insn = return_copy; + continue; + } + /* If the return register is not (in its entirety) + likely spilled, the return copy might be + partially or completely optimized away. */ + return_copy_pat = single_set (return_copy); + if (!return_copy_pat) + { + return_copy_pat = PATTERN (return_copy); + if (GET_CODE (return_copy_pat) != CLOBBER) + break; + } + copy_reg = SET_DEST (return_copy_pat); + if (GET_CODE (copy_reg) == REG) + copy_start = REGNO (copy_reg); + else if (GET_CODE (copy_reg) == SUBREG + && GET_CODE (SUBREG_REG (copy_reg)) == REG) + copy_start = REGNO (SUBREG_REG (copy_reg)); + else + break; + if (copy_start >= FIRST_PSEUDO_REGISTER) + break; + copy_num + = hard_regno_nregs[copy_start][GET_MODE (copy_reg)]; + + /* If the return register is not likely spilled, - as is + the case for floating point on SH4 - then it might + be set by an arithmetic operation that needs a + different mode than the exit block. */ + for (j = n_entities - 1; j >= 0; j--) + { + int e = entity_map[j]; + int mode = MODE_NEEDED (e, return_copy); + + if (mode != num_modes[e] && mode != MODE_EXIT (e)) + break; + } + if (j >= 0) + { + /* For the SH4, floating point loads depend on fpscr, + thus we might need to put the final mode switch + after the return value copy. That is still OK, + because a floating point return value does not + conflict with address reloads. */ + if (copy_start >= ret_start + && copy_start + copy_num <= ret_end + && OBJECT_P (SET_SRC (return_copy_pat))) + forced_late_switch = 1; + break; + } + + if (copy_start >= ret_start + && copy_start + copy_num <= ret_end) + nregs -= copy_num; + else if (!maybe_builtin_apply + || !FUNCTION_VALUE_REGNO_P (copy_start)) + break; + last_insn = return_copy; + } + /* ??? Exception handling can lead to the return value + copy being already separated from the return value use, + as in unwind-dw2.c . + Similarly, conditionally returning without a value, + and conditionally using builtin_return can lead to an + isolated use. */ + if (return_copy == BB_HEAD (src_bb)) + { + short_block = 1; + break; + } + last_insn = return_copy; + } + while (nregs); + + /* If we didn't see a full return value copy, verify that there + is a plausible reason for this. If some, but not all of the + return register is likely spilled, we can expect that there + is a copy for the likely spilled part. */ + gcc_assert (!nregs + || forced_late_switch + || short_block + || !(CLASS_LIKELY_SPILLED_P + (REGNO_REG_CLASS (ret_start))) + || (nregs + != hard_regno_nregs[ret_start][GET_MODE (ret_reg)]) + /* For multi-hard-register floating point + values, sometimes the likely-spilled part + is ordinarily copied first, then the other + part is set with an arithmetic operation. + This doesn't actually cause reload + failures, so let it pass. */ + || (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT + && nregs != 1)); + + if (INSN_P (last_insn)) + { + before_return_copy + = emit_note_before (NOTE_INSN_DELETED, last_insn); + /* Instructions preceding LAST_INSN in the same block might + require a different mode than MODE_EXIT, so if we might + have such instructions, keep them in a separate block + from pre_exit. */ + if (last_insn != BB_HEAD (src_bb)) + src_bb = split_block (src_bb, + PREV_INSN (before_return_copy))->dest; + } + else + before_return_copy = last_insn; + pre_exit = split_block (src_bb, before_return_copy)->src; + } + else + { + pre_exit = split_edge (eg); + COPY_REG_SET (pre_exit->global_live_at_start, live_at_end); + COPY_REG_SET (pre_exit->global_live_at_end, live_at_end); + } + } + + return pre_exit; +} +#endif + +/* Find all insns that need a particular mode setting, and insert the + necessary mode switches. Return true if we did work. */ + +int +optimize_mode_switching (FILE *file) +{ + rtx insn; + int e; + basic_block bb; + int need_commit = 0; + sbitmap *kill; + struct edge_list *edge_list; + static const int num_modes[] = NUM_MODES_FOR_MODE_SWITCHING; +#define N_ENTITIES ARRAY_SIZE (num_modes) + int entity_map[N_ENTITIES]; + struct bb_info *bb_info[N_ENTITIES]; + int i, j; + int n_entities; + int max_num_modes = 0; + bool emited = false; + basic_block post_entry ATTRIBUTE_UNUSED, pre_exit ATTRIBUTE_UNUSED; + + clear_bb_flags (); + + for (e = N_ENTITIES - 1, n_entities = 0; e >= 0; e--) + if (OPTIMIZE_MODE_SWITCHING (e)) + { + int entry_exit_extra = 0; + + /* Create the list of segments within each basic block. + If NORMAL_MODE is defined, allow for two extra + blocks split from the entry and exit block. */ +#if defined (MODE_ENTRY) && defined (MODE_EXIT) + entry_exit_extra = 3; +#endif + bb_info[n_entities] + = xcalloc (last_basic_block + entry_exit_extra, sizeof **bb_info); + entity_map[n_entities++] = e; + if (num_modes[e] > max_num_modes) + max_num_modes = num_modes[e]; + } + + if (! n_entities) + return 0; + +#if defined (MODE_ENTRY) && defined (MODE_EXIT) + /* Split the edge from the entry block, so that we can note that + there NORMAL_MODE is supplied. */ + post_entry = split_edge (single_succ_edge (ENTRY_BLOCK_PTR)); + pre_exit = create_pre_exit (n_entities, entity_map, num_modes); +#endif + + /* Create the bitmap vectors. */ + + antic = sbitmap_vector_alloc (last_basic_block, n_entities); + transp = sbitmap_vector_alloc (last_basic_block, n_entities); + comp = sbitmap_vector_alloc (last_basic_block, n_entities); + + sbitmap_vector_ones (transp, last_basic_block); + + for (j = n_entities - 1; j >= 0; j--) + { + int e = entity_map[j]; + int no_mode = num_modes[e]; + struct bb_info *info = bb_info[j]; + + /* Determine what the first use (if any) need for a mode of entity E is. + This will be the mode that is anticipatable for this block. + Also compute the initial transparency settings. */ + FOR_EACH_BB (bb) + { + struct seginfo *ptr; + int last_mode = no_mode; + HARD_REG_SET live_now; + + REG_SET_TO_HARD_REG_SET (live_now, + bb->global_live_at_start); + for (insn = BB_HEAD (bb); + insn != NULL && insn != NEXT_INSN (BB_END (bb)); + insn = NEXT_INSN (insn)) + { + if (INSN_P (insn)) + { + int mode = MODE_NEEDED (e, insn); + rtx link; + + if (mode != no_mode && mode != last_mode) + { + last_mode = mode; + ptr = new_seginfo (mode, insn, bb->index, live_now); + add_seginfo (info + bb->index, ptr); + RESET_BIT (transp[bb->index], j); + } +#ifdef MODE_AFTER + last_mode = MODE_AFTER (last_mode, insn); +#endif + /* Update LIVE_NOW. */ + for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) + if (REG_NOTE_KIND (link) == REG_DEAD) + reg_dies (XEXP (link, 0), live_now); + + note_stores (PATTERN (insn), reg_becomes_live, &live_now); + for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) + if (REG_NOTE_KIND (link) == REG_UNUSED) + reg_dies (XEXP (link, 0), live_now); + } + } + + info[bb->index].computing = last_mode; + /* Check for blocks without ANY mode requirements. */ + if (last_mode == no_mode) + { + ptr = new_seginfo (no_mode, BB_END (bb), bb->index, live_now); + add_seginfo (info + bb->index, ptr); + } + } +#if defined (MODE_ENTRY) && defined (MODE_EXIT) + { + int mode = MODE_ENTRY (e); + + if (mode != no_mode) + { + bb = post_entry; + + /* By always making this nontransparent, we save + an extra check in make_preds_opaque. We also + need this to avoid confusing pre_edge_lcm when + antic is cleared but transp and comp are set. */ + RESET_BIT (transp[bb->index], j); + + /* Insert a fake computing definition of MODE into entry + blocks which compute no mode. This represents the mode on + entry. */ + info[bb->index].computing = mode; + + if (pre_exit) + info[pre_exit->index].seginfo->mode = MODE_EXIT (e); + } + } +#endif /* NORMAL_MODE */ + } + + kill = sbitmap_vector_alloc (last_basic_block, n_entities); + for (i = 0; i < max_num_modes; i++) + { + int current_mode[N_ENTITIES]; + sbitmap *delete; + sbitmap *insert; + + /* Set the anticipatable and computing arrays. */ + sbitmap_vector_zero (antic, last_basic_block); + sbitmap_vector_zero (comp, last_basic_block); + for (j = n_entities - 1; j >= 0; j--) + { + int m = current_mode[j] = MODE_PRIORITY_TO_MODE (entity_map[j], i); + struct bb_info *info = bb_info[j]; + + FOR_EACH_BB (bb) + { + if (info[bb->index].seginfo->mode == m) + SET_BIT (antic[bb->index], j); + + if (info[bb->index].computing == m) + SET_BIT (comp[bb->index], j); + } + } + + /* Calculate the optimal locations for the + placement mode switches to modes with priority I. */ + + FOR_EACH_BB (bb) + sbitmap_not (kill[bb->index], transp[bb->index]); + edge_list = pre_edge_lcm (file, 1, transp, comp, antic, + kill, &insert, &delete); + + for (j = n_entities - 1; j >= 0; j--) + { + /* Insert all mode sets that have been inserted by lcm. */ + int no_mode = num_modes[entity_map[j]]; + + /* Wherever we have moved a mode setting upwards in the flow graph, + the blocks between the new setting site and the now redundant + computation ceases to be transparent for any lower-priority + mode of the same entity. First set the aux field of each + insertion site edge non-transparent, then propagate the new + non-transparency from the redundant computation upwards till + we hit an insertion site or an already non-transparent block. */ + for (e = NUM_EDGES (edge_list) - 1; e >= 0; e--) + { + edge eg = INDEX_EDGE (edge_list, e); + int mode; + basic_block src_bb; + HARD_REG_SET live_at_edge; + rtx mode_set; + + eg->aux = 0; + + if (! TEST_BIT (insert[e], j)) + continue; + + eg->aux = (void *)1; + + mode = current_mode[j]; + src_bb = eg->src; + + REG_SET_TO_HARD_REG_SET (live_at_edge, + src_bb->global_live_at_end); + + start_sequence (); + EMIT_MODE_SET (entity_map[j], mode, live_at_edge); + mode_set = get_insns (); + end_sequence (); + + /* Do not bother to insert empty sequence. */ + if (mode_set == NULL_RTX) + continue; + + /* If this is an abnormal edge, we'll insert at the end + of the previous block. */ + if (eg->flags & EDGE_ABNORMAL) + { + emited = true; + if (JUMP_P (BB_END (src_bb))) + emit_insn_before (mode_set, BB_END (src_bb)); + else + { + /* It doesn't make sense to switch to normal + mode after a CALL_INSN. The cases in which a + CALL_INSN may have an abnormal edge are + sibcalls and EH edges. In the case of + sibcalls, the dest basic-block is the + EXIT_BLOCK, that runs in normal mode; it is + assumed that a sibcall insn requires normal + mode itself, so no mode switch would be + required after the call (it wouldn't make + sense, anyway). In the case of EH edges, EH + entry points also start in normal mode, so a + similar reasoning applies. */ + gcc_assert (NONJUMP_INSN_P (BB_END (src_bb))); + emit_insn_after (mode_set, BB_END (src_bb)); + } + bb_info[j][src_bb->index].computing = mode; + RESET_BIT (transp[src_bb->index], j); + } + else + { + need_commit = 1; + insert_insn_on_edge (mode_set, eg); + } + } + + FOR_EACH_BB_REVERSE (bb) + if (TEST_BIT (delete[bb->index], j)) + { + make_preds_opaque (bb, j); + /* Cancel the 'deleted' mode set. */ + bb_info[j][bb->index].seginfo->mode = no_mode; + } + } + + sbitmap_vector_free (delete); + sbitmap_vector_free (insert); + clear_aux_for_edges (); + free_edge_list (edge_list); + } + + /* Now output the remaining mode sets in all the segments. */ + for (j = n_entities - 1; j >= 0; j--) + { + int no_mode = num_modes[entity_map[j]]; + + FOR_EACH_BB_REVERSE (bb) + { + struct seginfo *ptr, *next; + for (ptr = bb_info[j][bb->index].seginfo; ptr; ptr = next) + { + next = ptr->next; + if (ptr->mode != no_mode) + { + rtx mode_set; + + start_sequence (); + EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live); + mode_set = get_insns (); + end_sequence (); + + /* Insert MODE_SET only if it is nonempty. */ + if (mode_set != NULL_RTX) + { + emited = true; + if (NOTE_P (ptr->insn_ptr) + && (NOTE_LINE_NUMBER (ptr->insn_ptr) + == NOTE_INSN_BASIC_BLOCK)) + emit_insn_after (mode_set, ptr->insn_ptr); + else + emit_insn_before (mode_set, ptr->insn_ptr); + } + } + + free (ptr); + } + } + + free (bb_info[j]); + } + + /* Finished. Free up all the things we've allocated. */ + + sbitmap_vector_free (kill); + sbitmap_vector_free (antic); + sbitmap_vector_free (transp); + sbitmap_vector_free (comp); + + if (need_commit) + commit_edge_insertions (); + +#if defined (MODE_ENTRY) && defined (MODE_EXIT) + cleanup_cfg (CLEANUP_NO_INSN_DEL); +#else + if (!need_commit && !emited) + return 0; +#endif + + max_regno = max_reg_num (); + allocate_reg_info (max_regno, FALSE, FALSE); + update_life_info_in_dirty_blocks (UPDATE_LIFE_GLOBAL_RM_NOTES, + (PROP_DEATH_NOTES | PROP_KILL_DEAD_CODE + | PROP_SCAN_DEAD_CODE)); + + return 1; +} +#endif /* OPTIMIZE_MODE_SWITCHING */ |