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authorRichard Henderson <rth@cygnus.com>1998-04-18 16:24:11 -0700
committerJeff Law <law@gcc.gnu.org>1998-04-18 17:24:11 -0600
commit97b2bc8c58b3f438a3837a2bc842b42c372d6ab6 (patch)
tree88850bad88b50f1788055d05e7c6a0a7e16ad06d
parent0fd259829d491775635493c48875ee5c77b978c2 (diff)
downloadgcc-97b2bc8c58b3f438a3837a2bc842b42c372d6ab6.tar.gz
alpha.md (extendsidi2): Kill bogus cvtql+cvtlq case.
* alpha.md (extendsidi2): Kill bogus cvtql+cvtlq case. * alpha.h (PRINT_OPERAND_PUNCT_VALID_P): Accept '(' for s/sv/svi. * alpha.c (print_operand): Handle it. * alpha.md (fix_truncsfdi2): Use it. Add earlyclobber pattern for ALPHA_TP_INSN. (fix_truncdfdi2): Likewise. * alpha/linux.h (FUNCTION_PROFILER): _mcount expects its pv in $28. From-SVN: r19290
-rw-r--r--gcc/ChangeLog12
-rw-r--r--gcc/config/alpha/alpha.c20
-rw-r--r--gcc/config/alpha/alpha.h8
-rw-r--r--gcc/config/alpha/alpha.md41
-rw-r--r--gcc/config/alpha/linux.h2
5 files changed, 66 insertions, 17 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 25ce0286162..e11525528a0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+Sun Apr 19 00:23:23 1998 Richard Henderson <rth@cygnus.com>
+
+ * alpha.md (extendsidi2): Kill bogus cvtql+cvtlq case.
+
+ * alpha.h (PRINT_OPERAND_PUNCT_VALID_P): Accept '(' for s/sv/svi.
+ * alpha.c (print_operand): Handle it.
+ * alpha.md (fix_truncsfdi2): Use it. Add earlyclobber pattern
+ for ALPHA_TP_INSN.
+ (fix_truncdfdi2): Likewise.
+
+ * alpha/linux.h (FUNCTION_PROFILER): _mcount expects its pv in $28.
+
Sat Apr 18 19:06:59 1998 David Edelsohn <edelsohn@mhpcc.edu>
* rs6000.md (floatsidf2_loadaddr): rs6000_fpmem_offset will be
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 6a4c3a8f0c4..e087a9c92d9 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -1417,6 +1417,26 @@ print_operand (file, x, code)
fputs ("su", file);
break;
+ case '(':
+ /* Generates trap-mode suffix for instructions that accept the
+ v, sv, and svi suffix. The only instruction that needs this
+ is cvttq. */
+ switch (alpha_fptm)
+ {
+ case ALPHA_FPTM_N:
+ break;
+ case ALPHA_FPTM_U:
+ fputs ("v", file);
+ break;
+ case ALPHA_FPTM_SU:
+ fputs ("sv", file);
+ break;
+ case ALPHA_FPTM_SUI:
+ fputs ("svi", file);
+ break;
+ }
+ break;
+
case ')':
/* Generates trap-mode suffix for instructions that accept the u, su,
and sui suffix. This is the bulk of the IEEE floating point
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index 42fdc9a0e00..e190ab97810 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -2052,6 +2052,10 @@ literal_section () \
' Generates trap-mode suffix for instructions that accept the
su suffix only (cmpt et al).
+ ( Generates trap-mode suffix for instructions that accept the
+ v, sv, and svi suffix. The only instruction that needs this
+ is cvttq.
+
) Generates trap-mode suffix for instructions that accept the
u, su, and sui suffix. This is the bulk of the IEEE floating
point instructions (addt et al).
@@ -2067,8 +2071,8 @@ literal_section () \
*/
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
- ((CODE) == '&' || (CODE) == '\'' || (CODE) == ')' || (CODE) == '+' \
- || (CODE) == ',' || (CODE) == '-')
+ ((CODE) == '&' || (CODE) == '\'' || (CODE) == '(' || (CODE) == ')' \
+ || (CODE) == '+' || (CODE) == ',' || (CODE) == '-')
/* Print a memory address as an operand to reference that memory location. */
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index 54801173201..bfb0e10f9b8 100644
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -215,20 +215,14 @@
;; First define the arithmetic insns. Note that the 32-bit forms also
;; sign-extend.
-;; Note that we can do sign extensions in both FP and integer registers.
-;; However, the result must be in the same type of register as the input.
-;; The register preferencing code can't handle this case very well, so, for
-;; now, don't let the FP case show up here for preferencing. Also,
-;; sign-extends in FP registers take two instructions.
(define_insn "extendsidi2"
- [(set (match_operand:DI 0 "register_operand" "=r,r,*f")
- (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "r,m,*f")))]
+ [(set (match_operand:DI 0 "register_operand" "=r,r")
+ (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "r,m")))]
""
"@
addl %1,$31,%0
- ldl %0,%1
- cvtql %1,%0\;cvtlq %0,%0"
- [(set_attr "type" "iadd,ld,fadd")])
+ ldl %0,%1"
+ [(set_attr "type" "iadd,ld")])
;; Do addsi3 the way expand_binop would do if we didn't have one. This
;; generates better code. We have the anonymous addsi3 pattern below in
@@ -1507,20 +1501,39 @@
[(set_attr "type" "fadd")
(set_attr "trap" "yes")])
+(define_insn ""
+ [(set (match_operand:DI 0 "register_operand" "=&f")
+ (fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
+ "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
+ "cvt%-q%(c %R1,%0"
+ [(set_attr "type" "fadd")
+ (set_attr "trap" "yes")])
+
(define_insn "fix_truncdfdi2"
[(set (match_operand:DI 0 "register_operand" "=f")
(fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP"
- "cvt%-qc %R1,%0"
- [(set_attr "type" "fadd")])
+ "cvt%-q%(c %R1,%0"
+ [(set_attr "type" "fadd")
+ (set_attr "trap" "yes")])
+
+(define_insn ""
+ [(set (match_operand:DI 0 "register_operand" "=&f")
+ (fix:DI (float_extend:DF
+ (match_operand:SF 1 "reg_or_fp0_operand" "fG"))))]
+ "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
+ "cvt%-q%(c %R1,%0"
+ [(set_attr "type" "fadd")
+ (set_attr "trap" "yes")])
(define_insn "fix_truncsfdi2"
[(set (match_operand:DI 0 "register_operand" "=f")
(fix:DI (float_extend:DF
(match_operand:SF 1 "reg_or_fp0_operand" "fG"))))]
"TARGET_FP"
- "cvt%-qc %R1,%0"
- [(set_attr "type" "fadd")])
+ "cvt%-q%(c %R1,%0"
+ [(set_attr "type" "fadd")
+ (set_attr "trap" "yes")])
(define_insn ""
[(set (match_operand:SF 0 "register_operand" "=&f")
diff --git a/gcc/config/alpha/linux.h b/gcc/config/alpha/linux.h
index 6a2a7aeed6d..a9a438ab829 100644
--- a/gcc/config/alpha/linux.h
+++ b/gcc/config/alpha/linux.h
@@ -57,7 +57,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO) \
- fputs ("\tjsr $28,_mcount\n", (FILE))
+ fputs ("\tlda $28,_mcount\n\tjsr $28,($28),_mcount\n", (FILE))
/* Generate calls to memcpy, etc., not bcopy, etc. */
#define TARGET_MEM_FUNCTIONS