diff options
author | Richard Henderson <rth@redhat.com> | 2004-12-22 23:23:31 -0800 |
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committer | Richard Henderson <rth@gcc.gnu.org> | 2004-12-22 23:23:31 -0800 |
commit | ad4f9e7ebb58d2530243b3d77bfe5265dfdf0693 (patch) | |
tree | fd8d8c67531b6eee9974301b46105b87369a6f52 | |
parent | d5606ec91fcc4962b73ffc9e373c42322a5552f3 (diff) | |
download | gcc-ad4f9e7ebb58d2530243b3d77bfe5265dfdf0693.tar.gz |
i386.md (btsq, btrq, btcq): Fix modes.
* config/i386/i386.md (btsq, btrq, btcq): Fix modes.
(bt peepholes): Likewise.
From-SVN: r92534
-rw-r--r-- | gcc/ChangeLog | 3 | ||||
-rw-r--r-- | gcc/config/i386/i386.md | 24 |
2 files changed, 15 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 50109a10f65..722a951537a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,8 @@ 2004-12-22 Richard Henderson <rth@redhat.com> + * config/i386/i386.md (btsq, btrq, btcq): Fix modes. + (bt peepholes): Likewise. + * varasm.c (force_const_mem): Call set_mem_align. 2004-12-22 Richard Henderson <rth@redhat.com> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 156e65ff2d2..648748cadeb 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12218,9 +12218,9 @@ ;; negdf respectively, so they can never be disabled entirely. (define_insn "*btsq" - [(set (zero_extract:DI (match_operand 0 "register_operand" "+r") + [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (const_int 1)) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && (TARGET_USE_BT || reload_completed)" @@ -12228,9 +12228,9 @@ [(set_attr "type" "alu1")]) (define_insn "*btrq" - [(set (zero_extract:DI (match_operand 0 "register_operand" "+r") + [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (const_int 0)) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && (TARGET_USE_BT || reload_completed)" @@ -12238,9 +12238,9 @@ [(set_attr "type" "alu1")]) (define_insn "*btcq" - [(set (zero_extract:DI (match_operand 0 "register_operand" "+r") + [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (not:DI (zero_extract:DI (match_dup 0) (const_int 1) (match_dup 1)))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && (TARGET_USE_BT || reload_completed)" @@ -12252,9 +12252,9 @@ (define_peephole2 [(match_scratch:DI 2 "r") (parallel [(set (zero_extract:DI - (match_operand 0 "register_operand" "") + (match_operand:DI 0 "register_operand" "") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (const_int 1)) (clobber (reg:CC FLAGS_REG))])] "TARGET_64BIT && !TARGET_USE_BT" @@ -12284,9 +12284,9 @@ (define_peephole2 [(match_scratch:DI 2 "r") (parallel [(set (zero_extract:DI - (match_operand 0 "register_operand" "") + (match_operand:DI 0 "register_operand" "") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (const_int 0)) (clobber (reg:CC FLAGS_REG))])] "TARGET_64BIT && !TARGET_USE_BT" @@ -12316,9 +12316,9 @@ (define_peephole2 [(match_scratch:DI 2 "r") (parallel [(set (zero_extract:DI - (match_operand 0 "register_operand" "") + (match_operand:DI 0 "register_operand" "") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (not:DI (zero_extract:DI (match_dup 0) (const_int 1) (match_dup 1)))) (clobber (reg:CC FLAGS_REG))])] |