diff options
| author | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-02-19 02:14:17 +0000 |
|---|---|---|
| committer | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-02-19 02:14:17 +0000 |
| commit | 70d26ff65e921d9a00d5b7b7ba8b4c693953527c (patch) | |
| tree | 58fca839fbf8f8be51078d382be8b1a2755ae116 | |
| parent | f93b7ec9dfbafd0be5cccd3bc0abe3309e5eaf5a (diff) | |
| download | gcc-70d26ff65e921d9a00d5b7b7ba8b4c693953527c.tar.gz | |
2014-02-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60203
* config/rs6000/rs6000.md (mov<mode>_64bit, TF/TDmode moves):
Split 64-bit moves into 2 patterns. Do not allow the use of
direct move for TDmode in little endian, since the decimal value
has little endian bytes within a word, but the 64-bit pieces are
ordered in a big endian fashion, and normal subreg's of TDmode are
not allowed.
(mov<mode>_64bit_dm): Likewise.
(movtd_64bit_nodm): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207868 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 12 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 20 |
2 files changed, 31 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 58b2b75f1b3..6e3c8546c79 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2014-02-18 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/60203 + * config/rs6000/rs6000.md (mov<mode>_64bit, TF/TDmode moves): + Split 64-bit moves into 2 patterns. Do not allow the use of + direct move for TDmode in little endian, since the decimal value + has little endian bytes within a word, but the 64-bit pieces are + ordered in a big endian fashion, and normal subreg's of TDmode are + not allowed. + (mov<mode>_64bit_dm): Likewise. + (movtd_64bit_nodm): Likewise. + 2014-02-18 Eric Botcazou <ebotcazou@adacore.com> PR tree-optimization/60174 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 1062d26ab4c..b0d44c9a84f 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -9526,10 +9526,16 @@ ;; It's important to list Y->r and r->Y before r->r because otherwise ;; reload, given m->r, will try to pick r->r and reload it, which ;; doesn't make progress. -(define_insn_and_split "*mov<mode>_64bit" + +;; We can't split little endian direct moves of TDmode, because the words are +;; not swapped like they are for TImode or TFmode. Subregs therefore are +;; problematical. Don't allow direct move for this case. + +(define_insn_and_split "*mov<mode>_64bit_dm" [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r,r,wm") (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r,wm,r"))] "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64 + && (<MODE>mode != TDmode || WORDS_BIG_ENDIAN) && (gpc_reg_operand (operands[0], <MODE>mode) || gpc_reg_operand (operands[1], <MODE>mode))" "#" @@ -9538,6 +9544,18 @@ { rs6000_split_multireg_move (operands[0], operands[1]); DONE; } [(set_attr "length" "8,8,8,12,12,8,8,8")]) +(define_insn_and_split "*movtd_64bit_nodm" + [(set (match_operand:TD 0 "nonimmediate_operand" "=m,d,d,Y,r,r") + (match_operand:TD 1 "input_operand" "d,m,d,r,YGHF,r"))] + "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64 && !WORDS_BIG_ENDIAN + && (gpc_reg_operand (operands[0], TDmode) + || gpc_reg_operand (operands[1], TDmode))" + "#" + "&& reload_completed" + [(pc)] +{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; } + [(set_attr "length" "8,8,8,12,12,8")]) + (define_insn_and_split "*mov<mode>_32bit" [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r") (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r"))] |