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author | bernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-07-06 14:21:03 +0000 |
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committer | bernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-07-06 14:21:03 +0000 |
commit | f92430e02ae8a814b88d7f023049ed0c72263c70 (patch) | |
tree | 2a2d891d415bcfdd26b794dc666ecd03b7565eee /gcc/combine.c | |
parent | 2be90eed86f43591d0e182b258156356abb7f18f (diff) | |
download | gcc-f92430e02ae8a814b88d7f023049ed0c72263c70.tar.gz |
* cse.c (find_comparison_args): Use val_mode_signbit_set_p.
* simplify-rtx.c (mode_signbit_p): Use GET_MODE_PRECISION.
(val_mode_signbit_p, val_mode_signbit_set_p): New functions.
(simplify_const_unary_operation, simplify_binary_operation_1,
simplify_const_binary_operation,
simplify_const_relational_operation): Use them. Use
GET_MODE_MASK for masking and sign-extensions.
* combine.c (set_nonzero_bits_and_sign_copies, simplify_set,
combine_simplify_rtx, force_to_mode, reg_nonzero_bits_for_combine,
simplify_shift_const_1, simplify_comparison): Likewise.
* expr.c (convert_modes): Likewise.
* rtlanal.c (nonzero_bits1, canonicalize_condition): Likewise.
* expmed.c (emit_cstore, emit_store_flag_1, emit_store_flag):
Likewise.
* rtl.h (val_mode_signbit_p, val_mode_signbit_set_p): Declare.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@175917 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/combine.c')
-rw-r--r-- | gcc/combine.c | 52 |
1 files changed, 15 insertions, 37 deletions
diff --git a/gcc/combine.c b/gcc/combine.c index 737f300b063..7ac4613955c 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1627,15 +1627,11 @@ set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data) ??? For 2.5, try to tighten up the MD files in this regard instead of this kludge. */ - if (GET_MODE_BITSIZE (GET_MODE (x)) < BITS_PER_WORD + if (GET_MODE_PRECISION (GET_MODE (x)) < BITS_PER_WORD && CONST_INT_P (src) && INTVAL (src) > 0 - && 0 != (UINTVAL (src) - & ((unsigned HOST_WIDE_INT) 1 - << (GET_MODE_BITSIZE (GET_MODE (x)) - 1)))) - src = GEN_INT (UINTVAL (src) - | ((unsigned HOST_WIDE_INT) (-1) - << GET_MODE_BITSIZE (GET_MODE (x)))); + && val_signbit_known_set_p (GET_MODE (x), INTVAL (src))) + src = GEN_INT (INTVAL (src) | ~GET_MODE_MASK (GET_MODE (x))); #endif /* Don't call nonzero_bits if it cannot change anything. */ @@ -5887,8 +5883,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest, going to test the sign bit. */ if (new_code == NE && GET_MODE_CLASS (mode) == MODE_INT && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT - && ((STORE_FLAG_VALUE & GET_MODE_MASK (mode)) - == (unsigned HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (mode) - 1)) + && val_signbit_p (mode, STORE_FLAG_VALUE) && op1 == const0_rtx && mode == GET_MODE (op0) && (i = exact_log2 (nonzero_bits (op0, mode))) >= 0) @@ -6551,10 +6546,8 @@ simplify_set (rtx x) enum machine_mode inner_mode = GET_MODE (inner); /* Here we make sure that we don't have a sign bit on. */ - if (GET_MODE_BITSIZE (inner_mode) <= HOST_BITS_PER_WIDE_INT - && (nonzero_bits (inner, inner_mode) - < ((unsigned HOST_WIDE_INT) 1 - << (GET_MODE_BITSIZE (GET_MODE (src)) - 1)))) + if (val_signbit_known_clear_p (GET_MODE (src), + nonzero_bits (inner, inner_mode))) { SUBST (SET_SRC (x), inner); src = SET_SRC (x); @@ -8445,9 +8438,7 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask, case ASHIFTRT: /* If we are just looking for the sign bit, we don't need this shift at all, even if it has a variable count. */ - if (GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT - && (mask == ((unsigned HOST_WIDE_INT) 1 - << (GET_MODE_BITSIZE (GET_MODE (x)) - 1)))) + if (val_signbit_p (GET_MODE (x), mask)) return force_to_mode (XEXP (x, 0), mode, mask, next_select); /* If this is a shift by a constant, get a mask that contains those bits @@ -9589,15 +9580,11 @@ reg_nonzero_bits_for_combine (const_rtx x, enum machine_mode mode, ??? For 2.5, try to tighten up the MD files in this regard instead of this kludge. */ - if (GET_MODE_BITSIZE (GET_MODE (x)) < GET_MODE_BITSIZE (mode) + if (GET_MODE_PRECISION (GET_MODE (x)) < GET_MODE_PRECISION (mode) && CONST_INT_P (tem) && INTVAL (tem) > 0 - && 0 != (UINTVAL (tem) - & ((unsigned HOST_WIDE_INT) 1 - << (GET_MODE_BITSIZE (GET_MODE (x)) - 1)))) - tem = GEN_INT (UINTVAL (tem) - | ((unsigned HOST_WIDE_INT) (-1) - << GET_MODE_BITSIZE (GET_MODE (x)))); + && val_signbit_known_set_p (GET_MODE (x), INTVAL (tem))) + tem = GEN_INT (INTVAL (tem) | ~GET_MODE_MASK (GET_MODE (x))); #endif return tem; } @@ -9987,11 +9974,9 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode, ASHIFTRT to LSHIFTRT if we know the sign bit is clear. `make_compound_operation' will convert it to an ASHIFTRT for those machines (such as VAX) that don't have an LSHIFTRT. */ - if (GET_MODE_BITSIZE (shift_mode) <= HOST_BITS_PER_WIDE_INT - && code == ASHIFTRT - && ((nonzero_bits (varop, shift_mode) - & ((unsigned HOST_WIDE_INT) 1 - << (GET_MODE_BITSIZE (shift_mode) - 1))) == 0)) + if (code == ASHIFTRT + && val_signbit_known_clear_p (shift_mode, + nonzero_bits (varop, shift_mode))) code = LSHIFTRT; if (((code == LSHIFTRT @@ -11424,10 +11409,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) mode = GET_MODE (XEXP (op0, 0)); if (mode != VOIDmode && GET_MODE_CLASS (mode) == MODE_INT && ! unsigned_comparison_p - && (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) - && ((unsigned HOST_WIDE_INT) const_op - < (((unsigned HOST_WIDE_INT) 1 - << (GET_MODE_BITSIZE (mode) - 1)))) + && val_signbit_known_clear_p (mode, const_op) && have_insn_for (COMPARE, mode)) { op0 = XEXP (op0, 0); @@ -11614,11 +11596,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) /* Check for the cases where we simply want the result of the earlier test or the opposite of that result. */ if (code == NE || code == EQ - || (GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT - && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT - && (STORE_FLAG_VALUE - & (((unsigned HOST_WIDE_INT) 1 - << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1)))) + || (val_signbit_known_set_p (GET_MODE (op0), STORE_FLAG_VALUE) && (code == LT || code == GE))) { enum rtx_code new_code; |