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| author | aesok <aesok@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-09-02 14:29:37 +0000 |
|---|---|---|
| committer | aesok <aesok@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-09-02 14:29:37 +0000 |
| commit | 24dd066854c04dc78c5624f8097da0816d6b532c (patch) | |
| tree | 8800ae6420f6689c40bea9995085ad6bf47c0f65 /gcc/combine.c | |
| parent | dbd6de328ae1bdb74aa9ad274035c2e5a25ff99c (diff) | |
| download | gcc-24dd066854c04dc78c5624f8097da0816d6b532c.tar.gz | |
* target.def (class_likely_spilled_p): New hook.
* doc/tm.texi.in (TARGET_CLASS_LIKELY_SPILLED_P): Document.
* doc/tm.texi: Regenerate.
* targhooks.c (default_class_likely_spilled_p): New function.
* targhooks.h (default_class_likely_spilled_p): Declare.
* regs.h (CLASS_LIKELY_SPILLED_P): Remove.
* combine.c: (cant_combine_insn_p, likely_spilled_retval_p): Use
TARGET_CLASS_LIKELY_SPILLED_P target hook. Use HARD_REGISTER_P macro.
Use fixed_reg_set instead of fixed_regs.
* cse.c (hash_rtx_cb): Use TARGET_CLASS_LIKELY_SPILLED_P target hook.
* calls.c (avoid_likely_spilled_reg): Ditto.
* ira-conflicts.c: (ira_build_conflicts): Ditto.
* ira.c (update_equiv_regs): Ditto.
* mode-switching.c (create_pre_exit): Ditto.
* regmove.c (find_matches): Ditto.
(regclass_compatible_p): Use TARGET_CLASS_LIKELY_SPILLED_P target
hook.
* reload.c (SMALL_REGISTER_CLASS_P): Remove macro.
(small_register_class_p): New inline function.
(push_secondary_reload, find_reusable_reload, find_reloads): Use
small_register_class_p instead of SMALL_REGISTER_CLASS_P.
* config/i386/i386.h (CLASS_LIKELY_SPILLED_P): Remove.
* config/i386/i386.c (ix86_class_likely_spilled_p): New.
(TARGET_CLASS_LIKELY_SPILLED_P): Define.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@163779 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/combine.c')
| -rw-r--r-- | gcc/combine.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/gcc/combine.c b/gcc/combine.c index 273a9820df8..4c9495808b9 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -2137,12 +2137,12 @@ cant_combine_insn_p (rtx insn) if (GET_CODE (dest) == SUBREG) dest = SUBREG_REG (dest); if (REG_P (src) && REG_P (dest) - && ((REGNO (src) < FIRST_PSEUDO_REGISTER - && ! fixed_regs[REGNO (src)] - && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (REGNO (src)))) - || (REGNO (dest) < FIRST_PSEUDO_REGISTER - && ! fixed_regs[REGNO (dest)] - && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (REGNO (dest)))))) + && ((HARD_REGISTER_P (src) + && ! TEST_HARD_REG_BIT (fixed_reg_set, REGNO (src)) + && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (src)))) + || (HARD_REGISTER_P (dest) + && ! TEST_HARD_REG_BIT (fixed_reg_set, REGNO (dest)) + && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (dest)))))) return 1; return 0; @@ -2223,7 +2223,7 @@ likely_spilled_retval_p (rtx insn) do { if ((mask & 1 << nregs) - && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno + nregs))) + && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno + nregs))) return 1; } while (nregs--); return 0; |