gcc/

	* common/config/i386/i386-common.c (OPTION_MASK_ISA_PREFETCHWT1_SET),
	(OPTION_MASK_ISA_PREFETCHWT1_UNSET): New.
	(ix86_handle_option): Handle OPT_mprefetchwt1.
	* config/i386/cpuid.h (bit_PREFETCHWT1): New.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
	PREFETCHWT1 CPUID.
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	OPTION_MASK_ISA_PREFETCHWT1.
	* config/i386/i386.c (ix86_target_string): Handle mprefetchwt1.
	(PTA_PREFETCHWT1): New.
	(ix86_option_override_internal): Handle PTA_PREFETCHWT1.
	(ix86_valid_target_attribute_inner_p): Handle OPT_mprefetchwt1.
	* config/i386/i386.h (TARGET_PREFETCHWT1), (TARGET_PREFETCHWT1_P):
	  New.
	* config/i386/i386.md (prefetch): Check TARGET_PREFETCHWT1
	(*prefetch_avx512pf_<mode>_: Change into ...
	 (*prefetch_prefetchwt1_<mode>: This.
	* config/i386/i386.opt (mprefetchwt1): New.
	* config/i386/xmmintrin.h (_mm_hint): Add _MM_HINT_ET1.
	(_mm_prefetch): Handle intent to write.
	* doc/invoke.texi (mprefetchwt1), (mno-prefetchwt1): Doccument.

gcc/testsuite/
	* gcc.target/i386/avx-1.c: Update __builtin_prefetch.
	* gcc.target/i386/prefetchwt1-1.c: New.
	* g++.dg/other/i386-2.C: Add new option.
	* g++.dg/other/i386-3.C: Ditto.
	* gcc.target/i386/sse-12.c: Ditto.
	* gcc.target/i386/sse-13.c: Update __builtin_prefetch, add new option.
	* gcc.target/i386/sse-22.c: Add new option.
	* gcc.target/i386/sse-23.c: Update __builtin_prefetch, add new option.




git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208115 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 15 insertions, 0 deletions

diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c
index b7f9ff6b642..a6ab5552cce 100644
--- a/gcc/common/config/i386/i386-common.c
+++ b/gcc/common/config/i386/i386-common.c
@@ -69,6 +69,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
 #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED
 #define OPTION_MASK_ISA_ADX_SET OPTION_MASK_ISA_ADX
+#define OPTION_MASK_ISA_PREFETCHWT1_SET OPTION_MASK_ISA_PREFETCHWT1
 
 /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
    as -msse4.2.  */
@@ -154,6 +155,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
 #define OPTION_MASK_ISA_RDSEED_UNSET OPTION_MASK_ISA_RDSEED
 #define OPTION_MASK_ISA_ADX_UNSET OPTION_MASK_ISA_ADX
+#define OPTION_MASK_ISA_PREFETCHWT1_UNSET OPTION_MASK_ISA_PREFETCHWT1
 
 /* SSE4 includes both SSE4.1 and SSE4.2.  -mno-sse4 should the same
    as -mno-sse4.1. */
@@ -757,6 +759,19 @@ ix86_handle_option (struct gcc_options *opts,
 	}
       return true;
 
+    case OPT_mprefetchwt1:
+      if (value)
+	{
+	  opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1_SET;
+	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PREFETCHWT1_SET;
+	}
+      else
+	{
+	  opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PREFETCHWT1_UNSET;
+	  opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PREFETCHWT1_UNSET;
+	}
+      return true;
+
   /* Comes from final.c -- no real reason to change it.  */
 #define MAX_CODE_ALIGN 16