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| author | tocarip <tocarip@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-11-21 15:52:49 +0000 |
|---|---|---|
| committer | tocarip <tocarip@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-11-21 15:52:49 +0000 |
| commit | 741c191bb152e02fccc82db724d2f8480d71fa1e (patch) | |
| tree | 61c4509cf0f85572ee22147effc6cd91804db37f /gcc/common | |
| parent | afee0628a96bf21a834c04427c6207213faaeefe (diff) | |
| download | gcc-741c191bb152e02fccc82db724d2f8480d71fa1e.tar.gz | |
Support clwb x86 instruction.
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_CLWB_UNSET,
OPTION_MASK_ISA_CLWB_SET): New.
(ix86_handle_option): Handle OPT_mclwb.
* config.gcc: Add clwbintrin.h.
* config/i386/clwbintrin.h: New file.
* config/i386/cpuid.h (bit_CLWB): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect clwb.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__CLWB__.
* config/i386/i386.c (ix86_target_string): Add -mclwb.
(PTA_CLWB): Define.
(ix86_option_override_internal): Handle new option.
(ix86_valid_target_attribute_inner_p): Add clwb.
(ix86_builtins): Add IX86_BUILTIN_CLWB.
(ix86_init_mmx_sse_builtins): Add __builtin_ia32_clwb.
(ix86_expand_builtin): Handle IX86_BUILTIN_CLWB.
* config/i386/i386.h (TARGET_CLWB, TARGET_CLWB_P): Define.
* config/i386/i386.md (unspecv): Add UNSPECV_CLWB.
(clwb): New instruction.
* config/i386/i386.opt: Add mclwb.
* config/i386/x86intrin.h: Include clwbintrin.h.
gcc/testsuite/
* g++.dg/other/i386-2.C: Add -mclwb.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/clwb-1.c: New test.
* gcc.target/i386/sse-12.c: Add new options.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217933 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/i386/i386-common.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index 1c4f15e53dc..bad09887706 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -85,6 +85,7 @@ along with GCC; see the file COPYING3. If not see (OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_XSAVE) #define OPTION_MASK_ISA_XSAVEC_SET \ (OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE) +#define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same as -msse4.2. */ @@ -181,6 +182,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_CLFLUSHOPT_UNSET OPTION_MASK_ISA_CLFLUSHOPT #define OPTION_MASK_ISA_XSAVEC_UNSET OPTION_MASK_ISA_XSAVEC #define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES +#define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same as -mno-sse4.1. */ @@ -901,6 +903,19 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mclwb: + if (value) + { + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLWB_SET; + } + else + { + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CLWB_UNSET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLWB_UNSET; + } + return true; + /* Comes from final.c -- no real reason to change it. */ #define MAX_CODE_ALIGN 16 |