[AArch64] Fix some saturating math NEON intrinsics types.

[gcc/]
	* config/aarch64/iterators.md (VCOND): Handle SI and HI modes.
	Update comments.
	(VCONQ): Make comment more helpful.
	(VCON): Delete.
	* config/aarch64/aarch64-simd.md
	(aarch64_sqdmulh_lane<mode>):
	Use VCOND for operands 2.  Update lane checking and flipping logic.
	(aarch64_sqrdmulh_lane<mode>): Likewise.
	(aarch64_sq<r>dmulh_lane<mode>_internal): Likewise.
	(aarch64_sqdmull2<mode>): Remove VCON, use VQ_HSI mode iterator.
	(aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal, VD_HSI): Change mode
	attribute of operand 3 to VCOND.
	(aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal, SD_HSI): Likewise.
	(aarch64_sqdml<SBINQOPS:as>l2_lane<mode>_internal): Likewise.
	(aarch64_sqdmull_lane<mode>_internal, VD_HSI): Likewise.
	(aarch64_sqdmull_lane<mode>_internal, SD_HSI): Likewise.
	(aarch64_sqdmull2_lane<mode>_internal): Likewise.
	(aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal, VD_HSI: New
	define_insn.
	(aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal, SD_HSI): Likewise.
	(aarch64_sqdml<SBINQOPS:as>l2_laneq<mode>_internal): Likewise.
	(aarch64_sqdmull_laneq<mode>_internal, VD_HSI): Likewise.
	(aarch64_sqdmull_laneq<mode>_internal, SD_HSI): Likewise.
	(aarch64_sqdmull2_laneq<mode>_internal): Likewise.
	(aarch64_sqdmlal_lane<mode>): Change mode attribute of penultimate
	operand to VCOND.  Update lane flipping and bounds checking logic.
	(aarch64_sqdmlal2_lane<mode>): Likewise.
	(aarch64_sqdmlsl_lane<mode>): Likewise.
	(aarch64_sqdmull_lane<mode>): Likewise.
	(aarch64_sqdmull2_lane<mode>): Likewise.
	(aarch64_sqdmlal_laneq<mode>):
	Replace VCON usage with VCONQ.
	Emit aarch64_sqdmlal_laneq<mode>_internal insn.
	(aarch64_sqdmlal2_laneq<mode>): Emit
	aarch64_sqdmlal2_laneq<mode>_internal insn.
	Replace VCON with VCONQ.
	(aarch64_sqdmlsl2_lane<mode>): Replace VCON with VCONQ.
	(aarch64_sqdmlsl2_laneq<mode>): Likewise.
	(aarch64_sqdmull_laneq<mode>): Emit
	aarch64_sqdmull_laneq<mode>_internal insn.
	Replace VCON with VCONQ.
	(aarch64_sqdmull2_laneq<mode>): Emit
	aarch64_sqdmull2_laneq<mode>_internal insn.
	(aarch64_sqdmlsl_laneq<mode>): Replace VCON usage with VCONQ.
	* config/aarch64/arm_neon.h (vqdmlal_high_lane_s16): Change type
	of 3rd argument to int16x4_t.
	(vqdmlalh_lane_s16): Likewise.
	(vqdmlslh_lane_s16): Likewise.
	(vqdmull_high_lane_s16): Likewise.
	(vqdmullh_lane_s16): Change type of 2nd argument to int16x4_t.
	(vqdmlal_lane_s16): Don't create temporary int16x8_t value.
	(vqdmlsl_lane_s16): Likewise.
	(vqdmull_lane_s16): Don't create temporary int16x8_t value.
	(vqdmlal_high_lane_s32): Change type 3rd argument to int32x2_t.
	(vqdmlals_lane_s32): Likewise.
	(vqdmlsls_lane_s32): Likewise.
	(vqdmull_high_lane_s32): Change type 2nd argument to int32x2_t.
	(vqdmulls_lane_s32): Likewise.
	(vqdmlal_lane_s32): Don't create temporary int32x4_t value.
	(vqdmlsl_lane_s32): Likewise.
	(vqdmull_lane_s32): Don't create temporary int32x4_t value.
	(vqdmulhh_lane_s16): Change type of second argument to int16x4_t.
	(vqrdmulhh_lane_s16): Likewise.
	(vqdmlsl_high_lane_s16): Likewise.
	(vqdmulhs_lane_s32): Change type of second argument to int32x2_t.
	(vqdmlsl_high_lane_s32): Likewise.
	(vqrdmulhs_lane_s32): Likewise.

[gcc/testsuite]
	* gcc.target/aarch64/simd/vqdmulhh_lane_s16.c: New test.
	* gcc.target/aarch64/simd/vqdmulhs_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlal_high_lane_s16.c: New test.
	* gcc.target/aarch64/simd/vqdmlal_high_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlal_high_laneq_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlal_high_laneq_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlal_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlal_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlal_laneq_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlal_laneq_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlalh_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlals_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlsl_high_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlsl_high_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlsl_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlsl_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlsl_laneq_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlslh_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlsls_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmulh_laneq_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmulh_laneq_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmulhq_laneq_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmulhq_laneq_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmull_high_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmull_high_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmull_high_laneq_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmull_high_laneq_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmull_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmull_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmull_laneq_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmull_laneq_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmullh_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmulls_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqrdmulh_laneq_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqrdmulh_laneq_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqrdmulhq_laneq_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqrdmulhq_laneq_s32.c: Likewise.
	* gcc.target/aarch64/vector_intrinsics.c: Simplify arm_neon.h include.
	(test_vqdmlal_high_lane_s16): Fix parameter type.
	(test_vqdmlal_high_lane_s32): Likewise.
	(test_vqdmull_high_lane_s16): Likewise.
	(test_vqdmull_high_lane_s32): Likewise.
	(test_vqdmlsl_high_lane_s32): Likewise.
	(test_vqdmlsl_high_lane_s16): Likewise.
	* gcc.target/aarch64/scalar_intrinsics.c (test_vqdmlalh_lane_s16):
	Fix argument type.
	(test_vqdmlals_lane_s32): Likewise.
	(test_vqdmlslh_lane_s16): Likewise.
	(test_vqdmlsls_lane_s32): Likewise.
	(test_vqdmulhh_lane_s16): Likewise.
	(test_vqdmulhs_lane_s32): Likewise.
	(test_vqdmullh_lane_s16): Likewise.
	(test_vqdmulls_lane_s32): Likewise.
	(test_vqrdmulhh_lane_s16): Likewise.
	(test_vqrdmulhs_lane_s32): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211842 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 4 insertions, 12 deletions

diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index bf7b6830e00..5c304bff239 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -410,14 +410,15 @@
 			(SI   "SI") (HI   "HI")
 			(QI   "QI")])
 
-;; Define container mode for lane selection.
-(define_mode_attr VCOND [(V4HI "V4HI") (V8HI "V4HI")
+;; 64-bit container modes the inner or scalar source mode.
+(define_mode_attr VCOND [(HI "V4HI") (SI "V2SI")
+			 (V4HI "V4HI") (V8HI "V4HI")
 			 (V2SI "V2SI") (V4SI "V2SI")
 			 (DI   "DI") (V2DI "DI")
 			 (V2SF "V2SF") (V4SF "V2SF")
 			 (V2DF "DF")])
 
-;; Define container mode for lane selection.
+;; 128-bit container modes the inner or scalar source mode.
 (define_mode_attr VCONQ [(V8QI "V16QI") (V16QI "V16QI")
 			 (V4HI "V8HI") (V8HI "V8HI")
 			 (V2SI "V4SI") (V4SI "V4SI")
@@ -426,15 +427,6 @@
 			 (V2DF "V2DF") (SI   "V4SI")
 			 (HI   "V8HI") (QI   "V16QI")])
 
-;; Define container mode for lane selection.
-(define_mode_attr VCON [(V8QI "V16QI") (V16QI "V16QI")
-			(V4HI "V8HI") (V8HI "V8HI")
-			(V2SI "V4SI") (V4SI "V4SI")
-			(DI   "V2DI") (V2DI "V2DI")
-			(V2SF "V4SF") (V4SF "V4SF")
-			(V2DF "V2DF") (SI   "V4SI")
-			(HI   "V8HI") (QI   "V16QI")])
-
 ;; Half modes of all vector modes.
 (define_mode_attr VHALF [(V8QI "V4QI")  (V16QI "V8QI")
 			 (V4HI "V2HI")  (V8HI  "V4HI")