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authorrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2004-01-19 09:55:42 +0000
committerrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2004-01-19 09:55:42 +0000
commitdf9e12ce41ffa6240d58c4abe427381c989c81f0 (patch)
treee5b933c058bc49fc68edc155cb0d66893c2c50c5 /gcc/config/alpha/alpha.h
parentbc5cab3be0459fd8fa4a8890dfa57591f35979ff (diff)
downloadgcc-df9e12ce41ffa6240d58c4abe427381c989c81f0.tar.gz
* alpha.h (HARD_REGNO_MODE_OK): Disallow SImode in FP regs.
* alpha.md (UNSPEC_NT_LDA): Remove. (UNSPEC_CVTLQ, cvtlq): New. (extendsidi2_1): Rename from extendsidi2_nofix; remove f/f. (extendsidi2_fix): Remove. (extendsidi2 splitter): Use cvtlq. (extendsidi2 fp peepholes): Remove. (cvtql): Use SFmode instead of SImode. (fix_trunc?fsi): Update to match. (floatsisf2_ieee, floatsisf2, floatsidf2_ieee, floatsidf2): New. (movsi): Rename from movsi_nofix, remove f alternatives. (movsi_nt_vms): Similarly. (movsi_fix, movsi_nt_vms_fix): Remove. (nt_lda): Remove. * alpha.c (alpha_expand_prologue): Use adddi3, not nt_lda. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@76145 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/alpha/alpha.h')
-rw-r--r--gcc/config/alpha/alpha.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index 0eeb9de2616..8135b57333d 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -614,12 +614,11 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
On Alpha, the integer registers can hold any mode. The floating-point
- registers can hold 32-bit and 64-bit integers as well, but not 16-bit
- or 8-bit values. */
+ registers can hold 64-bit integers as well, but not smaller values. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
((REGNO) >= 32 && (REGNO) <= 62 \
- ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \
+ ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
: 1)
/* Value is 1 if MODE is a supported vector mode. */