diff options
| author | kenner <kenner@138bc75d-0d04-0410-961f-82ee72b054a4> | 1995-03-18 22:00:29 +0000 |
|---|---|---|
| committer | kenner <kenner@138bc75d-0d04-0410-961f-82ee72b054a4> | 1995-03-18 22:00:29 +0000 |
| commit | ea8367f844a170bdf140c4b8baa17a1f36f2f12d (patch) | |
| tree | c06d025ea5dc02bd204abae377e7039147c1b152 /gcc/config/alpha | |
| parent | 1f28c11ef349262497827d88cc6ba110df4abc2c (diff) | |
| download | gcc-ea8367f844a170bdf140c4b8baa17a1f36f2f12d.tar.gz | |
(movsi): Allow FP regs and add case for store of FP reg. Remove cvtlq
from MEM to FP reg case.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@9210 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/alpha')
| -rw-r--r-- | gcc/config/alpha/alpha.md | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 510ad3fdd5e..570aaa08bed 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -1,5 +1,5 @@ ;; Machine description for DEC Alpha for GNU C compiler -;; Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc. +;; Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; This file is part of GNU CC. @@ -2842,16 +2842,9 @@ operands[1] = force_reg (DFmode, operands[1]); }") -;; There is a problem with 32-bit values in FP registers. We keep such -;; values in the register as a quadword. This is done on loads by using -;; the cvtlq instruction. On stores, we can't do anything directly from -;; floating-point registers. Disallow such an operation and let reload -;; use an integer register instead. Don't encourage 32-bit values to -;; be placed in FP registers at all. - (define_insn "" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,r,m,*f,*f,*f") - (match_operand:SI 1 "input_operand" "r,J,I,K,L,m,rJ,*f,J,m"))] + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,r,m,f,f,f,m") + (match_operand:SI 1 "input_operand" "r,J,I,K,L,m,rJ,f,J,m,fG"))] "register_operand (operands[0], SImode) || reg_or_0_operand (operands[1], SImode)" "@ @@ -2864,8 +2857,9 @@ stl %r1,%0 cpys %1,%1,%0 cpys $f31,$f31,%0 - lds %0,%1\;cvtlq %0,%0" - [(set_attr "type" "iaddlog,iaddlog,iaddlog,iaddlog,iaddlog,ld,st,fpop,fpop,ld")]) + lds %0,%1 + sts %R1,%0" + [(set_attr "type" "iaddlog,iaddlog,iaddlog,iaddlog,iaddlog,ld,st,fpop,fpop,ld,st")]) (define_insn "" [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,r,f,f") |