diff options
| author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-02-20 02:10:57 +0000 |
|---|---|---|
| committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-02-20 02:10:57 +0000 |
| commit | 85c36fd1d38e057cd4147384cc4b876238db988a (patch) | |
| tree | 0771e267aa01450814af88276ed12edcd67192aa /gcc/config/arc/arc.c | |
| parent | 53861d5d19cd1b5ee83842e867931fa37ab4743a (diff) | |
| download | gcc-85c36fd1d38e057cd4147384cc4b876238db988a.tar.gz | |
* config/alpha/alpha.c, config/alpha/alpha.md,
config/alpha/lib1funcs.asm, config/alpha/vms-crt0-64.c,
config/alpha/vms-psxcrt0-64.c, config/arc/arc.c,
config/arc/arc.h, config/arm/arm.c, config/arm/arm.md,
config/arm/lib1funcs.asm: Follow spelling conventions.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122150 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arc/arc.c')
| -rw-r--r-- | gcc/config/arc/arc.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 78a95f40ce9..919f03b39a3 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -262,7 +262,7 @@ arc_select_cc_mode (enum rtx_code op, indexed by hard register number, and one indexed by mode. */ /* The purpose of arc_mode_class is to shrink the range of modes so that - they all fit (as bit numbers) in a 32 bit word (again). Each real mode is + they all fit (as bit numbers) in a 32-bit word (again). Each real mode is mapped into one arc_mode_class mode. */ enum arc_mode_class { @@ -479,7 +479,7 @@ long_immediate_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) case CONST_INT : return !SMALL_INT (INTVAL (op)); case CONST_DOUBLE : - /* These can happen because large unsigned 32 bit constants are + /* These can happen because large unsigned 32-bit constants are represented this way (the multiplication patterns can cause these to be generated). They also occur for SFmode values. */ return 1; @@ -516,7 +516,7 @@ long_immediate_loadstore_operand (rtx op, assume that it does. */ return 1; case CONST_DOUBLE : - /* These can happen because large unsigned 32 bit constants are + /* These can happen because large unsigned 32-bit constants are represented this way (the multiplication patterns can cause these to be generated). They also occur for SFmode values. */ return 1; @@ -550,10 +550,10 @@ move_src_operand (rtx op, enum machine_mode mode) case CONST_DOUBLE : /* We can handle DImode integer constants in SImode if the value (signed or unsigned) will fit in 32 bits. This is needed because - large unsigned 32 bit constants are represented as CONST_DOUBLEs. */ + large unsigned 32-bit constants are represented as CONST_DOUBLEs. */ if (mode == SImode) return arc_double_limm_p (op); - /* We can handle 32 bit floating point constants. */ + /* We can handle 32-bit floating point constants. */ if (mode == SFmode) return GET_MODE (op) == SFmode; return 0; |