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authorkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2004-02-01 21:21:45 +0000
committerkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2004-02-01 21:21:45 +0000
commit1a83b3ff3187688515d6543d1ebaa29426fd8eed (patch)
tree0f25f1bf0dccfa2df3cd1cf00ba9b4c252d52416 /gcc/config/avr
parent1857f8d79f7ee98d5bb14a3ee1b0849f4b305707 (diff)
downloadgcc-1a83b3ff3187688515d6543d1ebaa29426fd8eed.tar.gz
* config/arm/arm.c, config/arm/arm.h, config/arm/arm.md,
config/arm/linux-gas.h, config/arm/netbsd-elf.h, config/arm/netbsd.h, config/arm/pe.c, config/avr/avr.c, config/avr/avr.h, config/avr/avr.md, config/c4x/c4x.h, config/cris/cris.h, config/fr30/fr30.h, config/frv/frv.c, config/frv/frv.h, config/ip2k/ip2k.c, config/iq2000/iq2000.c, config/iq2000/iq2000.h, config/m32r/m32r.c, config/m68hc11/m68hc11.c, config/m68hc11/m68hc11.h, config/m68hc11/m68hc11.md, config/m68k/m68k.md, config/mcore/mcore.c, config/mcore/mcore.h, config/mcore/mcore.md, config/mips/mips.c, config/ns32k/ns32k.h, config/ns32k/ns32k.md, config/rs6000/rs6000.c, config/s390/s390.c, config/s390/s390.md, config/sparc/sparc.c, config/v850/v850.c, config/xtensa/xtensa.h, config/xtensa/xtensa.md: Replace "gen_rtx (FOO, " with "gen_rtx_FOO (". git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@77080 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/avr')
-rw-r--r--gcc/config/avr/avr.c17
-rw-r--r--gcc/config/avr/avr.h4
-rw-r--r--gcc/config/avr/avr.md8
3 files changed, 14 insertions, 15 deletions
diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index 7f86187c4f2..331f7cdfa64 100644
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -83,10 +83,10 @@ static bool avr_return_in_memory (tree, tree);
/* Allocate registers from r25 to r8 for parameters for function calls. */
#define FIRST_CUM_REG 26
-/* Temporary register RTX (gen_rtx (REG,QImode,TMP_REGNO)) */
+/* Temporary register RTX (gen_rtx_REG (QImode, TMP_REGNO)) */
static GTY(()) rtx tmp_reg_rtx;
-/* Zeroed register RTX (gen_rtx (REG,QImode,ZERO_REGNO)) */
+/* Zeroed register RTX (gen_rtx_REG (QImode, ZERO_REGNO)) */
static GTY(()) rtx zero_reg_rtx;
/* AVR register names {"r0", "r1", ..., "r31"} */
@@ -1472,7 +1472,7 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
int bytes = avr_num_arg_regs (mode, type);
if (cum->nregs && bytes <= cum->nregs)
- return gen_rtx (REG, mode, cum->regno - bytes);
+ return gen_rtx_REG (mode, cum->regno - bytes);
return NULL_RTX;
}
@@ -2782,7 +2782,7 @@ out_shift_with_cnt (const char *template, rtx insn, rtx operands[],
/* No scratch register available, use one from LD_REGS (saved in
__tmp_reg__) that doesn't overlap with registers to shift. */
- op[3] = gen_rtx (REG, QImode,
+ op[3] = gen_rtx_REG (QImode,
((true_regnum (operands[0]) - 1) & 15) + 16);
op[4] = tmp_reg_rtx;
saved_in_tmp = 1;
@@ -5001,9 +5001,8 @@ avr_reorg (void)
rtx t = XEXP (src,0);
PUT_CODE (t, swap_condition (GET_CODE (t)));
- SET_SRC (pattern) = gen_rtx (NEG,
- GET_MODE (SET_SRC (pattern)),
- SET_SRC (pattern));
+ SET_SRC (pattern) = gen_rtx_NEG (GET_MODE (SET_SRC (pattern)),
+ SET_SRC (pattern));
INSN_CODE (next) = -1;
INSN_CODE (insn) = -1;
}
@@ -5028,7 +5027,7 @@ avr_libcall_value (enum machine_mode mode)
int offs = GET_MODE_SIZE (mode);
if (offs < 2)
offs = 2;
- return gen_rtx (REG, mode, RET_REGISTER + 2 - offs);
+ return gen_rtx_REG (mode, RET_REGISTER + 2 - offs);
}
/* Create an RTX representing the place where a
@@ -5050,7 +5049,7 @@ avr_function_value (tree type, tree func ATTRIBUTE_UNUSED)
else if (offs > GET_MODE_SIZE (SImode) && offs < GET_MODE_SIZE (DImode))
offs = GET_MODE_SIZE (DImode);
- return gen_rtx (REG, BLKmode, RET_REGISTER + 2 - offs);
+ return gen_rtx_REG (BLKmode, RET_REGISTER + 2 - offs);
}
/* Returns nonzero if the number MASK has only one bit set. */
diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index 2c50d204d8d..df1c9677738 100644
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -793,8 +793,8 @@ extern int avr_case_values_threshold;
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
- emit_move_insn (gen_rtx (MEM, HImode, plus_constant ((TRAMP), 2)), CXT); \
- emit_move_insn (gen_rtx (MEM, HImode, plus_constant ((TRAMP), 6)), FNADDR); \
+ emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT); \
+ emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
}
/* Store in cc_status the expressions
that the condition codes will describe
diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md
index e253e38a717..8b29a210775 100644
--- a/gcc/config/avr/avr.md
+++ b/gcc/config/avr/avr.md
@@ -371,8 +371,8 @@
operands[5] = addr0;
operands[6] = addr1;
- operands[0] = gen_rtx (MEM, BLKmode, addr0);
- operands[1] = gen_rtx (MEM, BLKmode, addr1);
+ operands[0] = gen_rtx_MEM (BLKmode, addr0);
+ operands[1] = gen_rtx_MEM (BLKmode, addr1);
}")
(define_insn "*movstrqi_insn"
@@ -444,7 +444,7 @@
addr0 = copy_to_mode_reg (Pmode, XEXP (operands[0], 0));
operands[4] = addr0;
- operands[0] = gen_rtx (MEM, BLKmode, addr0);
+ operands[0] = gen_rtx_MEM (BLKmode, addr0);
}")
(define_insn "*clrstrqi"
@@ -499,7 +499,7 @@
if (! (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 0))
FAIL;
addr = copy_to_mode_reg (Pmode, XEXP (operands[1],0));
- operands[1] = gen_rtx (MEM, BLKmode, addr);
+ operands[1] = gen_rtx_MEM (BLKmode, addr);
operands[5] = addr;
operands[4] = gen_reg_rtx (HImode);
}")