* config/bfin/bfin.md (reload_outpdi, reload_inpdi): New patterns.

	* config/bfin/bfin.c (bfin_secondary_reload): Make sure we use them.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@128470 138bc75d-0d04-0410-961f-82ee72b054a4

2 files changed, 52 insertions, 3 deletions

diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index 7b2f9880641..ed456a880bb 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -2045,8 +2045,8 @@ bfin_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
    scratch register.  */
 
 static enum reg_class
-bfin_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x, enum reg_class class,
-		     enum machine_mode mode, secondary_reload_info *sri)
+bfin_secondary_reload (bool in_p, rtx x, enum reg_class class,
+		       enum machine_mode mode, secondary_reload_info *sri)
 {
   /* If we have HImode or QImode, we can only use DREGS as secondary registers;
      in most other cases we can also use PREGS.  */
@@ -2099,8 +2099,16 @@ bfin_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x, enum reg_class class,
 
   if (class == AREGS || class == EVEN_AREGS || class == ODD_AREGS)
     {
+      if (code == MEM)
+	{
+	  sri->icode = in_p ? CODE_FOR_reload_inpdi : CODE_FOR_reload_outpdi;
+	  return NO_REGS;
+	}
+
       if (x != const0_rtx && x_class != DREGS)
-	return DREGS;
+	{
+	  return DREGS;
+	}
       else
 	return NO_REGS;
     }
@@ -2116,6 +2124,7 @@ bfin_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x, enum reg_class class,
   if (code == MEM)
     if (! reg_class_subset_p (class, default_class))
       return default_class;
+
   return NO_REGS;
 }
 
diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md
index e465cd54e0b..0184999ab17 100644
--- a/gcc/config/bfin/bfin.md
+++ b/gcc/config/bfin/bfin.md
@@ -1746,6 +1746,46 @@
   DONE;
 })
 
+(define_insn "reload_inpdi"
+  [(set (match_operand:PDI 0 "register_operand" "=e")
+	(match_operand:PDI 1 "memory_operand" "m"))
+   (clobber (match_operand:SI 2 "register_operand" "=d"))]
+  ""
+{
+  rtx xops[4];
+  xops[0] = operands[0];
+  xops[1] = operands[2];
+  split_di (operands + 1, 1, xops + 2, xops + 3);
+  output_asm_insn ("%1 = %2;", xops);
+  output_asm_insn ("%w0 = %1;", xops);
+  output_asm_insn ("%1 = %3;", xops);
+  output_asm_insn ("%x0 = %1;", xops);
+  return "";
+}
+ [(set_attr "seq_insns" "multi")
+  (set_attr "type" "mcld")
+  (set_attr "length" "12")])
+
+(define_insn "reload_outpdi"
+  [(set (match_operand:PDI 0 "memory_operand" "=m")
+	(match_operand:PDI 1 "register_operand" "e"))
+   (clobber (match_operand:SI 2 "register_operand" "=d"))]
+  ""
+{
+  rtx xops[4];
+  xops[0] = operands[1];
+  xops[1] = operands[2];
+  split_di (operands, 1, xops + 2, xops + 3);
+  output_asm_insn ("%1 = %w0;", xops);
+  output_asm_insn ("%2 = %1;", xops);
+  output_asm_insn ("%1 = %x0;", xops);
+  output_asm_insn ("%3 = %1;", xops);
+  return "";
+}
+ [(set_attr "seq_insns" "multi")
+  (set_attr "type" "mcld")
+  (set_attr "length" "12")])
+
 ;; Jump instructions
 
 (define_insn "jump"