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| author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-02-19 01:27:56 +0000 |
|---|---|---|
| committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-02-19 01:27:56 +0000 |
| commit | 5f858eacae386efb1420612bd4f679f69af8d94c (patch) | |
| tree | cacf82eac8b292b364f41964a5c3436fc7b7d2c9 /gcc/config/frv/predicates.md | |
| parent | a61b32a8e00a1fcb480653e7f5acbe9cd0a030d6 (diff) | |
| download | gcc-5f858eacae386efb1420612bd4f679f69af8d94c.tar.gz | |
* config/frv/frv.c, config/frv/frv.h, config/frv/frv.md,
config/frv/predicates.md: Follow spelling conventions.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122118 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/frv/predicates.md')
| -rw-r--r-- | gcc/config/frv/predicates.md | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/gcc/config/frv/predicates.md b/gcc/config/frv/predicates.md index 4c32120237e..a1eaf9a799a 100644 --- a/gcc/config/frv/predicates.md +++ b/gcc/config/frv/predicates.md @@ -105,7 +105,7 @@ return FALSE; }) -;; Return 1 if operand is a GPR register or 12 bit signed immediate. +;; Return 1 if operand is a GPR register or 12-bit signed immediate. (define_predicate "gpr_or_int12_operand" (match_code "reg,subreg,const_int,const") @@ -165,7 +165,7 @@ return FALSE; }) -;; Return 1 if operand is a register or 10 bit signed immediate. +;; Return 1 if operand is a register or 10-bit signed immediate. (define_predicate "gpr_or_int10_operand" (match_code "reg,subreg,const_int") @@ -486,7 +486,7 @@ || frv_legitimate_memory_operand (op, mode, FALSE)); }) -;; Return 1 if operand is a 12 bit signed immediate. +;; Return 1 if operand is a 12-bit signed immediate. (define_predicate "int12_operand" (match_code "const_int") @@ -1110,7 +1110,7 @@ return ((INTVAL (op) & 0xffff) == 0); }) -;; Return 1 if operand is a 16 bit unsigned immediate. +;; Return 1 if operand is a 16-bit unsigned immediate. (define_predicate "uint16_operand" (match_code "const_int") @@ -1445,7 +1445,7 @@ } }) -;; Return 1 if operand is a register or 6 bit signed immediate. +;; Return 1 if operand is a register or 6-bit signed immediate. (define_predicate "fpr_or_int6_operand" (match_code "reg,subreg,const_int") @@ -1470,7 +1470,7 @@ return FPR_OR_PSEUDO_P (REGNO (op)); }) -;; Return 1 if operand is a 6 bit signed immediate. +;; Return 1 if operand is a 6-bit signed immediate. (define_predicate "int6_operand" (match_code "const_int") @@ -1481,7 +1481,7 @@ return IN_RANGE_P (INTVAL (op), -32, 31); }) -;; Return 1 if operand is a 5 bit signed immediate. +;; Return 1 if operand is a 5-bit signed immediate. (define_predicate "int5_operand" (match_code "const_int") @@ -1489,7 +1489,7 @@ return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), -16, 15); }) -;; Return 1 if operand is a 5 bit unsigned immediate. +;; Return 1 if operand is a 5-bit unsigned immediate. (define_predicate "uint5_operand" (match_code "const_int") @@ -1497,7 +1497,7 @@ return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), 0, 31); }) -;; Return 1 if operand is a 4 bit unsigned immediate. +;; Return 1 if operand is a 4-bit unsigned immediate. (define_predicate "uint4_operand" (match_code "const_int") @@ -1505,7 +1505,7 @@ return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), 0, 15); }) -;; Return 1 if operand is a 1 bit unsigned immediate (0 or 1). +;; Return 1 if operand is a 1-bit unsigned immediate (0 or 1). (define_predicate "uint1_operand" (match_code "const_int") |