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author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-02-23 13:45:36 +0000 |
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committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-02-23 13:45:36 +0000 |
commit | 4a1ea6f4bfb55aed43f78600932ae7aad48419e6 (patch) | |
tree | ba8f4089f25e702072a6b45d0e9c8efab5cf72c9 /gcc/config/h8300 | |
parent | 9d4c611a6b79582cf0e6baaef77a268ec26440d9 (diff) | |
download | gcc-4a1ea6f4bfb55aed43f78600932ae7aad48419e6.tar.gz |
* config/h8300/h8300.md (mulqihi3): Tighten predicates to
register_operand.
(mulhisi3): Likewise.
(umulqisi3): Likewise.
(umulhisi3): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@49994 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/h8300')
-rw-r--r-- | gcc/config/h8300/h8300.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index b9dc6403222..d99103efa60 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -841,7 +841,7 @@ (define_insn "mulqihi3" [(set (match_operand:HI 0 "register_operand" "=r") - (mult:HI (sign_extend:HI (match_operand:QI 1 "general_operand" "%0")) + (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%0")) (sign_extend:HI (match_operand:QI 2 "register_operand" "r"))))] "TARGET_H8300H || TARGET_H8300S" "mulxs.b %X2,%T0" @@ -850,7 +850,7 @@ (define_insn "mulhisi3" [(set (match_operand:SI 0 "register_operand" "=r") - (mult:SI (sign_extend:SI (match_operand:HI 1 "general_operand" "%0")) + (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "%0")) (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))] "TARGET_H8300H || TARGET_H8300S" "mulxs.w %T2,%S0" @@ -859,7 +859,7 @@ (define_insn "umulqihi3" [(set (match_operand:HI 0 "register_operand" "=r") - (mult:HI (zero_extend:HI (match_operand:QI 1 "general_operand" "%0")) + (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "%0")) (zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))] "" "mulxu %X2,%T0" @@ -868,7 +868,7 @@ (define_insn "umulhisi3" [(set (match_operand:SI 0 "register_operand" "=r") - (mult:SI (zero_extend:SI (match_operand:HI 1 "general_operand" "%0")) + (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "%0")) (zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))] "TARGET_H8300H || TARGET_H8300S" "mulxu.w %T2,%S0" |