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authorUros Bizjak <ubizjak@gmail.com>2021-05-13 11:09:53 +0200
committerUros Bizjak <ubizjak@gmail.com>2021-05-13 11:10:50 +0200
commitf1693741cb2b2db519bb82155a3c0880fd820ea3 (patch)
tree0be1b8a2b7cd93aecf794200670ce33e5c102e01 /gcc/config/i386/i386-expand.c
parent23eb66d1d46a34cb28c4acbdf8a1deb80a7c5a05 (diff)
downloadgcc-f1693741cb2b2db519bb82155a3c0880fd820ea3.tar.gz
i386: Fix up V2SFmode vcond* with -mxop [PR100581]
ix86_expand_sse_movcc has special TARGET_XOP handling and the recent addition of support of v*cond* patterns for V2SFmode results in ICEs because the expected pattern doesn't exist. We can handle it using 128-bit vpcmov (if we ignore the upper 64 bits like we ignore in other TARGET_MMX_WITH_SSE support). 2021-05-13 Uroš Bizjak <ubizjak@gmail.com> gcc/ PR target/100581 * config/i386/i386-expand.c (ix86_expand_sse_movcc): Force mode sizes < 16 to a register when constructing vpcmov pattern. * config/i386/mmx.md (*xop_pcmov_<mode>): Use MMXMODE124 mode. gcc/testsuite/ PR target/100581 * g++.target/i386/pr100581.C: New test.
Diffstat (limited to 'gcc/config/i386/i386-expand.c')
-rw-r--r--gcc/config/i386/i386-expand.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index dd230081b16..92488b869ec 100644
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -3661,7 +3661,8 @@ ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false)
{
op_true = force_reg (mode, op_true);
- if (!nonimmediate_operand (op_false, mode))
+ if (GET_MODE_SIZE (mode) < 16
+ || !nonimmediate_operand (op_false, mode))
op_false = force_reg (mode, op_false);
emit_insn (gen_rtx_SET (dest, gen_rtx_IF_THEN_ELSE (mode, cmp,