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authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>2008-08-22 13:58:52 +0000
committeruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>2008-08-22 13:58:52 +0000
commit6be36710014a580db25d163b86e7dc4f76a49dd9 (patch)
tree2b127590b7b77ae3d3d96c86d61ca2e85f2f8eef /gcc/config/i386/i386.md
parent14e9946904de8fa6cbcbf46ac27de2613d8cdffe (diff)
downloadgcc-6be36710014a580db25d163b86e7dc4f76a49dd9.tar.gz
PR target/37184
* config/i386/i386.c (ix86_match_ccmode): Handle CCAmode, CCCmode, CCOmode and CCSmode destination modes. PR target/37191 * config/i386/mmx.md (*vec_extractv2sf_0): Avoid combining registers from different units in a single alternative. (*vec_extractv2sf_1): Ditto. (*vec_extractv2si_0): Ditto. (*vec_extractv2si_1): Ditto. * config/i386/sse.md (sse2_storehpd): Ditto. (sse2_storelpd): Ditto. (sse2_loadhpd): Ditto. (sse2_loadlpd): Ditto. PR target/37197 * config/i386/i386.md (clzsi2_abm): Fix operand 1 constraints. (popcountsi2): Ditto. (clzdi2_abm): Ditto. (popcountdi2): Ditto. (clzhi2_abm): Ditto. (popcounthi2): Ditto. testsuite/ChangeLog: PR target/37184 * gcc.target/i386/pr37184.c: New test. PR target/37191 * gcc.target/i386/pr37191.c: New test. PR target/37197 * gcc.target/i386/pr37197.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@139471 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/i386.md')
-rw-r--r--gcc/config/i386/i386.md12
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index f8d4c7db118..49fde6b428a 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -15285,7 +15285,7 @@
(define_insn "clzsi2_abm"
[(set (match_operand:SI 0 "register_operand" "=r")
- (clz:SI (match_operand:SI 1 "nonimmediate_operand" "")))
+ (clz:SI (match_operand:SI 1 "nonimmediate_operand" "rm")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_ABM"
"lzcnt{l}\t{%1, %0|%0, %1}"
@@ -15305,7 +15305,7 @@
(define_insn "popcountsi2"
[(set (match_operand:SI 0 "register_operand" "=r")
- (popcount:SI (match_operand:SI 1 "nonimmediate_operand" "")))
+ (popcount:SI (match_operand:SI 1 "nonimmediate_operand" "rm")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_POPCNT"
"popcnt{l}\t{%1, %0|%0, %1}"
@@ -15412,7 +15412,7 @@
(define_insn "clzdi2_abm"
[(set (match_operand:DI 0 "register_operand" "=r")
- (clz:DI (match_operand:DI 1 "nonimmediate_operand" "")))
+ (clz:DI (match_operand:DI 1 "nonimmediate_operand" "rm")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && TARGET_ABM"
"lzcnt{q}\t{%1, %0|%0, %1}"
@@ -15432,7 +15432,7 @@
(define_insn "popcountdi2"
[(set (match_operand:DI 0 "register_operand" "=r")
- (popcount:DI (match_operand:DI 1 "nonimmediate_operand" "")))
+ (popcount:DI (match_operand:DI 1 "nonimmediate_operand" "rm")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && TARGET_POPCNT"
"popcnt{q}\t{%1, %0|%0, %1}"
@@ -15473,7 +15473,7 @@
(define_insn "clzhi2_abm"
[(set (match_operand:HI 0 "register_operand" "=r")
- (clz:HI (match_operand:HI 1 "nonimmediate_operand" "")))
+ (clz:HI (match_operand:HI 1 "nonimmediate_operand" "rm")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_ABM"
"lzcnt{w}\t{%1, %0|%0, %1}"
@@ -15493,7 +15493,7 @@
(define_insn "popcounthi2"
[(set (match_operand:HI 0 "register_operand" "=r")
- (popcount:HI (match_operand:HI 1 "nonimmediate_operand" "")))
+ (popcount:HI (match_operand:HI 1 "nonimmediate_operand" "rm")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_POPCNT"
"popcnt{w}\t{%1, %0|%0, %1}"