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| author | Hongtao Liu <hongtao.liu@intel.com> | 2019-06-26 04:46:29 +0000 |
|---|---|---|
| committer | Hongtao Liu <liuhongt@gcc.gnu.org> | 2019-06-26 04:46:29 +0000 |
| commit | e21b52afe92f2596a5b0963d6efb5be44ab3b227 (patch) | |
| tree | 699ae022ef64b1f8800a1c563659e4cac0d64f24 /gcc/config/i386/i386.opt | |
| parent | b48826985b8b0bba790688ebe717cf626019a415 (diff) | |
| download | gcc-e21b52afe92f2596a5b0963d6efb5be44ab3b227.tar.gz | |
Enable GCC support for AVX512_VP2INTERSECT which will be in tigerlaker.
There are two instructions for AVX512_VP2INTERSECT:
VP2INTERSECTD and VP2INTERSECTQ.
gcc/
2019-06-05 Hongtao Liu <hongtao.liu@intel.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX512VP2INTERSECT_SET,
OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET): New macros.
(OPTION_MASK_ISA2_AVX512F_UNSET): Add
OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET.
(ix86_handle_option): Handle -mavx512vp2intersect.
* config/i386/avx512vp2intersectintrin.h: New.
* config/i386/avx512vp2intersectvlintrin.h: New.
* config/i386/cpuid.h (bit_AVX512VP2INTERSECT): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
AVX512VP2INTERSECT.
* config/i386/i386-builtin-types.def: Add new types.
* config/i386/i386-builtin.def: Add new builtins.
* config/i386/i386-builtins.c: (enum processor_features): Add
F_AVX512VP2INTERSECT.
(static const _isa_names_table isa_names_table): Ditto.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__AVX512VP2INTERSECT__.
* config/i386/i386-expand.c (ix86_expand_builtin): Expand
IX86_BUILTIN_2INTERSECTD512, IX86_BUILTIN_2INTERSECTQ512,
IX86_BUILTIN_2INTERSECTD256, IX86_BUILTIN_2INTERSECTQ256,
IX86_BUILTIN_2INTERSECTD128, IX86_BUILTIN_2INTERSECTQ128.
* config/i386/i386-modes.def (P2QI, P2HI): New modes.
* config/i386/i386-options.c (ix86_target_string): Add
-mavx512vp2intersect.
(ix86_option_override_internal): Handle AVX512VP2INTERSECT.
* config/i386/i386.c (ix86_hard_regno_nregs): Allocate two regs for
P2HImode and P2QImode.
(ix86_hard_regno_mode_ok): Register pair only starts at even hardreg
number for P2QImode and P2HImode.
(ix86_regmode_natural_size): New function.
* config/i386/i386.h (TARGET_AVX512VP2INTERSECT,
TARGET_AVX512VP2INTERSECT_P, PTA_AVX512VP2INTERSECT
REGMODE_NATURAL_SIZE, MASK_PAIR_REGNO_P): New.
* config/i386/i386-protos.h (ix86_regmode_natural_size): Declare
* config/i386/i386.opt: Add -mavx512vp2intersect.
* config/i386/immintrin.h: Include avx512vp2intersectintrin.h and
avx512vp2intersectvlintrin.h.
* config/i386/sse.md (define_c_enum "unspec"): Add UNSPEC_VP2INTERSECT.
(define_mode_iterator VI48_AVX512VP2VL): New.
(avx512vp2intersect_2intersect<mode>,
avx512vp2intersect_2intersectv16si): New define_insn patterns.
* config.gcc: Add avx512vp2intersectvlintrin.h and
avx512vp2intersectintrin.h to extra_headers.
* doc/invoke.texi: Document -mavx512vp2intersect.
gcc/testsuite
2019-06-06 Hongtao Liu <hongtao.liu@intel.com>
Olga Makhotina <olga.makhotina@intel.com>
* gcc.target/i386/avx512-check.h: Handle bit_AVX512VP2INTERSECT.
* gcc.target/i386/avx512vp2intersect-2intersect-1a.c: New test.
* gcc.target/i386/avx512vp2intersect-2intersect-1b.c: Likewise.
* gcc.target/i386/avx512vp2intersect-2intersectvl-1a.c: Likewise.
* gcc.target/i386/avx512vp2intersect-2intersectvl-1b.c: Likewise.
* gcc.target/i386/sse-12.c: Add -mavx512vp2intersect.
* gcc.target/i386/sse-13.c: Likewsie.
* gcc.target/i386/sse-14.c: Likewise.
* gcc.target/i386/sse-22.c: Likewise.
* gcc.target/i386/sse-23.c: Likewise.
* g++.dg/other/i386-2.C: Likewise.
* g++.dg/other/i386-3.C: Likewise.
Co-Authored-By: H.J. Lu <hongjiu.lu@intel.com>
Co-Authored-By: Olga Makhotina <olga.makhotina@intel.com>
From-SVN: r272668
Diffstat (limited to 'gcc/config/i386/i386.opt')
| -rw-r--r-- | gcc/config/i386/i386.opt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index b6e751f8793..599e799ea5e 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -749,6 +749,10 @@ mavx512bitalg Target Report Mask(ISA_AVX512BITALG) Var(ix86_isa_flags) Save Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512BITALG built-in functions and code generation. +mavx512vp2intersect +Target Report Mask(ISA_AVX512VP2INTERSECT) Var(ix86_isa_flags2) Save +Support AVX512VP2INTERSECT built-in functions and code generation. + mfma Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation. |