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authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>2007-06-02 09:07:00 +0000
committeruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>2007-06-02 09:07:00 +0000
commitf0dd3debeb32c85a6aae502acb4ee280bd95bb9e (patch)
tree1a46abf87b3bfec77fc9f40db121f3c193579003 /gcc/config/i386/sse.md
parent07c46636ce59515e30fddc0217bcb7dfe31173ba (diff)
downloadgcc-f0dd3debeb32c85a6aae502acb4ee280bd95bb9e.tar.gz
* config/i386/i386.h (enum reg_class) [SSE_FIRST_REG]: New.
(SSE_CLASS_P): Use reg_class_subset_p between SSE_REGS. (REG_CLASS_NAMES): Add "FIRST_SSE_REG" string. (REG_CLASS_CONTENTS): Add members of FIRST_SSE_REG class. * config/i386/constraints.md ("z"): New register constraint for members of SSE_FIRST_REG class. * config/i386/i386-modes.def (CCA, CCC, CCO, CCS): New compare modes. * config/i386/i386.c (regclass_map): Change class of %xmm0 to SSE_FIRST_REG class. (put_condition_code) [EQ, NE]: Output suffixes for new compare modes. (ix86_cc_modes_compatible): Handle CCA, CCC, CCO and CCS modes. (IX86_BUILTIN_PCMPESTRI128): New for SSE4.2. (IX86_BUILTIN_PCMPESTRM128): Likewise. (IX86_BUILTIN_PCMPESTRA128): Likewise. (IX86_BUILTIN_PCMPESTRC128): Likewise. (IX86_BUILTIN_PCMPESTRO128): Likewise. (IX86_BUILTIN_PCMPESTRS128): Likewise. (IX86_BUILTIN_PCMPESTRZ128): Likewise. (IX86_BUILTIN_PCMPISTRI128): Likewise. (IX86_BUILTIN_PCMPISTRM128): Likewise. (IX86_BUILTIN_PCMPISTRA128): Likewise. (IX86_BUILTIN_PCMPISTRC128): Likewise. (IX86_BUILTIN_PCMPISTRO128): Likewise. (IX86_BUILTIN_PCMPISTRS128): Likewise. (IX86_BUILTIN_PCMPISTRZ128): Likewise. (struct builtin_description): Change "flag" field to unsigned. (bdesc_pcmpestr): New builtin description table. (bdesc_pcmpistr): Likewise. (ix86_init_mmx_sse_builtins): Define int_ftype_v16qi_int_v16qi_int_int, v16qi_ftype_v16qi_int_v16qi_int_int and int_ftype_v16qi_v16qi_int. Initialize pcmp[ei]str[im] insns for SSE4.2. (ix86_expand_sse_pcmpestr): New subroutine of ix86_expand_builtin. (ix86_expand_sse_pcmpistr): Likewise. (ix86_expand_builtin): Expand pcmp[ei]str[im] builtins for SSE4.2. * config/i386/i386.md (UNSPEC_PCMPESTR): New for SSE4.2. (UNSPEC_PCMPISTR): Likewise. * config/i386/sse.md (sse4_2_pcmpestr): New insn patern and splitter. (sse4_2_pcmpestri):New isns pattern. (sse4_2_pcmpestrm): Likewise. (sse4_2_pcmpestr_cconly): Likewise. (sse4_2_pcmpistr): New insn patern and splitter. (sse4_2_pcmpistri):New isns pattern. (sse4_2_pcmpistrm): Likewise. (sse4_2_pcmpistr_cconly): Likewise. * config/i386/smmintrin.h: Enable pcmp[ei]str[im] intrinsics in SSE4.2. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@125279 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/sse.md')
-rw-r--r--gcc/config/i386/sse.md243
1 files changed, 243 insertions, 0 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 76351926127..da7e582b9ab 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6383,3 +6383,246 @@
[(set_attr "type" "ssecvt")
(set_attr "prefix_extra" "1")
(set_attr "mode" "V4SF")])
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Intel SSE4.2 string/text processing instructions
+;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(define_insn_and_split "sse4_2_pcmpestr"
+ [(set (match_operand:SI 0 "register_operand" "=c,c")
+ (unspec:SI
+ [(match_operand:V16QI 2 "register_operand" "x,x")
+ (match_operand:SI 3 "register_operand" "a,a")
+ (match_operand:V16QI 4 "nonimmediate_operand" "x,m")
+ (match_operand:SI 5 "register_operand" "d,d")
+ (match_operand:SI 6 "const_0_to_255_operand" "n,n")]
+ UNSPEC_PCMPESTR))
+ (set (match_operand:V16QI 1 "register_operand" "=z,z")
+ (unspec:V16QI
+ [(match_dup 2)
+ (match_dup 3)
+ (match_dup 4)
+ (match_dup 5)
+ (match_dup 6)]
+ UNSPEC_PCMPESTR))
+ (set (reg:CC FLAGS_REG)
+ (unspec:CC
+ [(match_dup 2)
+ (match_dup 3)
+ (match_dup 4)
+ (match_dup 5)
+ (match_dup 6)]
+ UNSPEC_PCMPESTR))]
+ "TARGET_SSE4_2
+ && !(reload_completed || reload_in_progress)"
+ "#"
+ "&& 1"
+ [(const_int 0)]
+{
+ int ecx = !find_regno_note (curr_insn, REG_UNUSED, REGNO (operands[0]));
+ int xmm0 = !find_regno_note (curr_insn, REG_UNUSED, REGNO (operands[1]));
+ int flags = !find_regno_note (curr_insn, REG_UNUSED, FLAGS_REG);
+
+ if (ecx)
+ emit_insn (gen_sse4_2_pcmpestri (operands[0], operands[2],
+ operands[3], operands[4],
+ operands[5], operands[6]));
+ if (xmm0)
+ emit_insn (gen_sse4_2_pcmpestrm (operands[1], operands[2],
+ operands[3], operands[4],
+ operands[5], operands[6]));
+ if (flags && !(ecx || xmm0))
+ emit_insn (gen_sse4_2_pcmpestr_cconly (operands[2], operands[3],
+ operands[4], operands[5],
+ operands[6]));
+ DONE;
+}
+ [(set_attr "type" "sselog")
+ (set_attr "prefix_data16" "1")
+ (set_attr "prefix_extra" "1")
+ (set_attr "memory" "none,load")
+ (set_attr "mode" "TI")])
+
+(define_insn "sse4_2_pcmpestri"
+ [(set (match_operand:SI 0 "register_operand" "=c,c")
+ (unspec:SI
+ [(match_operand:V16QI 1 "register_operand" "x,x")
+ (match_operand:SI 2 "register_operand" "a,a")
+ (match_operand:V16QI 3 "nonimmediate_operand" "x,m")
+ (match_operand:SI 4 "register_operand" "d,d")
+ (match_operand:SI 5 "const_0_to_255_operand" "n,n")]
+ UNSPEC_PCMPESTR))
+ (set (reg:CC FLAGS_REG)
+ (unspec:CC
+ [(match_dup 1)
+ (match_dup 2)
+ (match_dup 3)
+ (match_dup 4)
+ (match_dup 5)]
+ UNSPEC_PCMPESTR))]
+ "TARGET_SSE4_2"
+ "pcmpestri\t{%5, %3, %1|%1, %3, %5}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix_data16" "1")
+ (set_attr "prefix_extra" "1")
+ (set_attr "memory" "none,load")
+ (set_attr "mode" "TI")])
+
+(define_insn "sse4_2_pcmpestrm"
+ [(set (match_operand:V16QI 0 "register_operand" "=z,z")
+ (unspec:V16QI
+ [(match_operand:V16QI 1 "register_operand" "x,x")
+ (match_operand:SI 2 "register_operand" "a,a")
+ (match_operand:V16QI 3 "nonimmediate_operand" "x,m")
+ (match_operand:SI 4 "register_operand" "d,d")
+ (match_operand:SI 5 "const_0_to_255_operand" "n,n")]
+ UNSPEC_PCMPESTR))
+ (set (reg:CC FLAGS_REG)
+ (unspec:CC
+ [(match_dup 1)
+ (match_dup 2)
+ (match_dup 3)
+ (match_dup 4)
+ (match_dup 5)]
+ UNSPEC_PCMPESTR))]
+ "TARGET_SSE4_2"
+ "pcmpestrm\t{%5, %3, %1|%1, %3, %5}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix_data16" "1")
+ (set_attr "prefix_extra" "1")
+ (set_attr "memory" "none,load")
+ (set_attr "mode" "TI")])
+
+(define_insn "sse4_2_pcmpestr_cconly"
+ [(set (reg:CC FLAGS_REG)
+ (unspec:CC
+ [(match_operand:V16QI 0 "register_operand" "x,x,x,x")
+ (match_operand:SI 1 "register_operand" "a,a,a,a")
+ (match_operand:V16QI 2 "nonimmediate_operand" "x,m,x,m")
+ (match_operand:SI 3 "register_operand" "d,d,d,d")
+ (match_operand:SI 4 "const_0_to_255_operand" "n,n,n,n")]
+ UNSPEC_PCMPESTR))
+ (clobber (match_scratch:SI 5 "=c,c,X,X"))
+ (clobber (match_scratch:V16QI 6 "=X,X,z,z"))]
+ "TARGET_SSE4_2"
+ "@
+ pcmpestri\t{%4, %2, %0|%0, %2, %4}
+ pcmpestri\t{%4, %2, %0|%0, %2, %4}
+ pcmpestrm\t{%4, %2, %0|%0, %2, %4}
+ pcmpestrm\t{%4, %2, %0|%0, %2, %4}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix_data16" "1")
+ (set_attr "prefix_extra" "1")
+ (set_attr "memory" "none,load,none,load")
+ (set_attr "mode" "TI")])
+
+(define_insn_and_split "sse4_2_pcmpistr"
+ [(set (match_operand:SI 0 "register_operand" "=c,c")
+ (unspec:SI
+ [(match_operand:V16QI 2 "register_operand" "x,x")
+ (match_operand:V16QI 3 "nonimmediate_operand" "x,m")
+ (match_operand:SI 4 "const_0_to_255_operand" "n,n")]
+ UNSPEC_PCMPISTR))
+ (set (match_operand:V16QI 1 "register_operand" "=z,z")
+ (unspec:V16QI
+ [(match_dup 2)
+ (match_dup 3)
+ (match_dup 4)]
+ UNSPEC_PCMPISTR))
+ (set (reg:CC FLAGS_REG)
+ (unspec:CC
+ [(match_dup 2)
+ (match_dup 3)
+ (match_dup 4)]
+ UNSPEC_PCMPISTR))]
+ "TARGET_SSE4_2
+ && !(reload_completed || reload_in_progress)"
+ "#"
+ "&& 1"
+ [(const_int 0)]
+{
+ int ecx = !find_regno_note (curr_insn, REG_UNUSED, REGNO (operands[0]));
+ int xmm0 = !find_regno_note (curr_insn, REG_UNUSED, REGNO (operands[1]));
+ int flags = !find_regno_note (curr_insn, REG_UNUSED, FLAGS_REG);
+
+ if (ecx)
+ emit_insn (gen_sse4_2_pcmpistri (operands[0], operands[2],
+ operands[3], operands[4]));
+ if (xmm0)
+ emit_insn (gen_sse4_2_pcmpistrm (operands[1], operands[2],
+ operands[3], operands[4]));
+ if (flags && !(ecx || xmm0))
+ emit_insn (gen_sse4_2_pcmpistr_cconly (operands[2], operands[3],
+ operands[4]));
+ DONE;
+}
+ [(set_attr "type" "sselog")
+ (set_attr "prefix_data16" "1")
+ (set_attr "prefix_extra" "1")
+ (set_attr "memory" "none,load")
+ (set_attr "mode" "TI")])
+
+(define_insn "sse4_2_pcmpistri"
+ [(set (match_operand:SI 0 "register_operand" "=c,c")
+ (unspec:SI
+ [(match_operand:V16QI 1 "register_operand" "x,x")
+ (match_operand:V16QI 2 "nonimmediate_operand" "x,m")
+ (match_operand:SI 3 "const_0_to_255_operand" "n,n")]
+ UNSPEC_PCMPISTR))
+ (set (reg:CC FLAGS_REG)
+ (unspec:CC
+ [(match_dup 1)
+ (match_dup 2)
+ (match_dup 3)]
+ UNSPEC_PCMPISTR))]
+ "TARGET_SSE4_2"
+ "pcmpistri\t{%3, %2, %1|%1, %2, %3}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix_data16" "1")
+ (set_attr "prefix_extra" "1")
+ (set_attr "memory" "none,load")
+ (set_attr "mode" "TI")])
+
+(define_insn "sse4_2_pcmpistrm"
+ [(set (match_operand:V16QI 0 "register_operand" "=z,z")
+ (unspec:V16QI
+ [(match_operand:V16QI 1 "register_operand" "x,x")
+ (match_operand:V16QI 2 "nonimmediate_operand" "x,m")
+ (match_operand:SI 3 "const_0_to_255_operand" "n,n")]
+ UNSPEC_PCMPISTR))
+ (set (reg:CC FLAGS_REG)
+ (unspec:CC
+ [(match_dup 1)
+ (match_dup 2)
+ (match_dup 3)]
+ UNSPEC_PCMPISTR))]
+ "TARGET_SSE4_2"
+ "pcmpistrm\t{%3, %2, %1|%1, %2, %3}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix_data16" "1")
+ (set_attr "prefix_extra" "1")
+ (set_attr "memory" "none,load")
+ (set_attr "mode" "TI")])
+
+(define_insn "sse4_2_pcmpistr_cconly"
+ [(set (reg:CC FLAGS_REG)
+ (unspec:CC
+ [(match_operand:V16QI 0 "register_operand" "x,x,x,x")
+ (match_operand:V16QI 1 "nonimmediate_operand" "x,m,x,m")
+ (match_operand:SI 2 "const_0_to_255_operand" "n,n,n,n")]
+ UNSPEC_PCMPISTR))
+ (clobber (match_scratch:SI 3 "=c,c,X,X"))
+ (clobber (match_scratch:V16QI 4 "=X,X,z,z"))]
+ "TARGET_SSE4_2"
+ "@
+ pcmpistri\t{%2, %1, %0|%0, %1, %2}
+ pcmpistri\t{%2, %1, %0|%0, %1, %2}
+ pcmpistrm\t{%2, %1, %0|%0, %1, %2}
+ pcmpistrm\t{%2, %1, %0|%0, %1, %2}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix_data16" "1")
+ (set_attr "prefix_extra" "1")
+ (set_attr "memory" "none,load,none,load")
+ (set_attr "mode" "TI")])