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author | hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-11-12 13:26:51 +0000 |
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committer | hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-11-12 13:26:51 +0000 |
commit | 5cbbe3dec78c64b6ad7b89357384e0bced781257 (patch) | |
tree | 76b7d3ee8a4b157a605bf72f38d720713f152b4e /gcc/config/i386/x86-tune.def | |
parent | c6829ed5779df9545071cabf6f9b4c75e3e33e07 (diff) | |
download | gcc-5cbbe3dec78c64b6ad7b89357384e0bced781257.tar.gz |
Properly handle AVX256 unaligned load and store
PR target/59084
* config/i386/i386.c (ix86_option_override_internal): Check
X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL and
X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL for
MASK_AVX256_SPLIT_UNALIGNED_LOAD and
MASK_AVX256_SPLIT_UNALIGNED_STORE.
* config/i386/x86-tune.def (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL):
Clear m_COREI7_AVX and update comments.
(X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@204700 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/x86-tune.def')
-rw-r--r-- | gcc/config/i386/x86-tune.def | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 23879f9ec18..54867d2f31f 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -376,15 +376,15 @@ DEF_TUNE (X86_TUNE_USE_VECTOR_CONVERTS, "use_vector_converts", m_AMDFAM10) /* AVX instruction selection tuning (some of SSE flags affects AVX, too) */ /*****************************************************************************/ -/* X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL: if true, unaligned loads are +/* X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL: if false, unaligned loads are split. */ DEF_TUNE (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL, "256_unaligned_load_optimal", - ~(m_COREI7 | m_GENERIC)) + ~(m_COREI7 | m_COREI7_AVX | m_GENERIC)) -/* X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL: if true, unaligned loads are +/* X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL: if false, unaligned stores are split. */ -DEF_TUNE (X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL, "256_unaligned_load_optimal", - ~(m_COREI7 | m_BDVER | m_GENERIC)) +DEF_TUNE (X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL, "256_unaligned_store_optimal", + ~(m_COREI7 | m_COREI7_AVX | m_BDVER | m_GENERIC)) /* X86_TUNE_AVX128_OPTIMAL: Enable 128-bit AVX instruction generation for the auto-vectorizer. */ |